cse 140 lecture 11 standard combinational modules
play

CSE 140 Lecture 11 Standard Combinational Modules CK Cheng and Diba - PowerPoint PPT Presentation

CSE 140 Lecture 11 Standard Combinational Modules CK Cheng and Diba Mirza CSE Dept. UC San Diego 1 Part III - Standard Combinational Modules (Harris: 2.8, 5) Signal Transport Decoder: Decode address Encoder: Encode address


  1. CSE 140 Lecture 11 Standard Combinational Modules CK Cheng and Diba Mirza CSE Dept. UC San Diego 1

  2. Part III - Standard Combinational Modules (Harris: 2.8, 5) Signal Transport • Decoder: Decode address • Encoder: Encode address • Multiplexer (Mux): Select data by address • Demultiplexier (DeMux): Direct data by address • Shifter: Shift bit location Data Operator • Adder: Add two binary numbers • Multiplier: Multiply two binary numbers 2

  3. 1. Decoder • Definition • Logic Diagram • Application (Universal Set) • Tree of Decoders 3

  4. iClicker: Decoder Definition A. A device that decodes B. An electronic device that converts signals from one form to another C. A machine that converts a coded text into ordinary language D. A device or program that translates encoded data into its original format E. All of the above 4

  5. Decoder Definition: A digital module that converts a binary address to the assertion of the addressed device E (enable) y 0 0 I 0 0 y 1 1 . 2 1 I 1 3 . 4 5 I 2 2 6 y 7 n to 2 n decoder 7 2 n outputs n inputs function: 2 3 = 8 n= 3 y i = 1 if E= 1 & (I 2, I 1, I 0 ) = i y i = 0 otherwise 5

  6. Interconnect: Decoder, Encoder, Mux, DeMux Processors Arbiter Data 1 Memory Bank Mux P1 Address 1 Data P2 Demux n-m Address 2 Mux Address m n 2 m Address k Decoder Data k Decoder: Decode the address to assert the addressed device Pk Mux: Select the inputs according to the index addressed by the control signals 6

  7. 1. Decoder: Definition PI Q: What is the output Y 3:0 of the 2:4 decoder for (A 1 , A 0 ) = (1,0)? 2:4 Decoder 11 Y 3 A. (1, 1, 0, 0 ) A 1 10 Y 2 A 0 01 Y 1 B. (1, 0, 1, 1) 00 Y 0 C. (0, 0, 1, 0) A 1 A 0 Y 3 Y 2 Y 1 Y 0 D. (0, 1, 0, 0) 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 7

  8. 1. Decoder: Definition • N inputs, 2 N outputs • One-hot outputs: only one output HIGH at once E 2:4 Decoder 11 Y 3 A 1 10 Y 2 A 0 01 Y 1 00 Y 0 E= 1 A 1 A 0 Y 3 Y 2 Y 1 Y 0 0 0 0 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 8

  9. Decoder: Logic Diagram E Output Expression: y i = E·m i I 0 ’ I 1 ’ y 0 I 2 ’ y 0 =1 if E=1 & (I 2, I 1, I 0 )=(0,0,0) I 0 ’ I 1 ’ y 1 I 2 . . I 0 I 1 y 7 y 7 =1 if E=1 & (I 2, I 1, I 0 )=(1,1,1) I 2 9

  10. Decoder Application: universal set {Decoder, OR} Example: Implement the following functions with a 3-input decoder and OR gates. i) f 1 (a,b,c) = Σ m(1,2,4) ii) f 2 (a,b,c) = Σ m(2,3), iii) f 3 (a,b,c) = Σ m(0,5,6) 10

  11. Decoder Application: universal set {Decoder, OR} Example: Implement functions i) f 1 (a,b,c) = Σ m(1,2,4) ii) f 2 (a,b,c) = Σ m(2,3), iii) f 3 (a,b,c) = Σ m(0,5,6) y 1 with a 3-input decoder and OR gates. y 2 E=1 y 4 f 1 y 2 y 0 0 c I 0 y 1 1 2 y 3 I 1 b f 2 3 . 4 . 5 a I 2 6 y 7 7 y 0 y 5 y 6 f 3 11

  12. Decoders • OR minterms E=1 2:4 Decoder Minterm 11 AB A 10 AB B 01 AB 00 AB Y = AB + AB = A ⊕ B Y 12

  13. Tree of Decoders Implement a 4-2 4 decoder with 3-2 3 decoders. y 0 0 d I 0 y 1 1 2 c I 1 3 4 5 b I 2 6 y 7 7 y 8 0 I 0 y 9 1 2 I 1 3 4 5 I 2 6 y 15 7 a 13

  14. Tree of Decoders Implement a 6-2 6 decoder with 3-2 3 decoders. E y 0 E I 2, I 1, I 0 D 0 y 7 y 8 I 5, I 4, I 3 I 2, I 1, I 0 D 1 y 15 … … y 56 I 2, I 1, I 0 D 7 y 63 14

  15. PI Q: A four variable switching function f(a,b,c,d) can be implemented using which of the following? A. 1:2 decoders and OR gates B. 2:4 decoders and OR gates C. 3:8 decoders and OR gates D. None of the above E. All of the above 15

  16. 2. Encoder • Definition (What is it?) • Logic Diagram (How is it realized?) • Priority Encoder (Special type of encoder) 16

  17. iClicker: Definition of Encoder A. Any program, circuit or algorithm which encodes B. In digital audio technology, an encoder is a program that converts an audio WAV file into an MP3 file C. A device that convert a message from plain text into code D. A circuit that is used to convert between digital video and analog video E. All of the above 17

  18. 2. Encoder: Definition En 8 inputs 3 outputs I 0 0 y 0 0 1 2 y 1 1 3 4 2 y 2 5 6 I 7 7 A At most one I i = 1. (y n-1 ,.., y 0 ) = i if I i = 1 & E n = 1 (y n-1 ,.., y 0 ) = 0 otherwise. A = 1 if En = 1 and one i s.t. I i = 1 A = 0 otherwise. 18

  19. Encoder Definition: A digital module that converts the assertion of a device to the binary address of the device. E I 2n-1… I 0 y n-1 … y 0 Encoder Description: A E At most one I i = 1. I 0 (y n-1 ,.., y 0 ) = i if I i = 1 & E = 1 0 y 0 0 1 2 y 1 (y n-1 ,.., y 0 ) = 0 otherwise. 1 3 4 2 y 2 A = 1 if E = 1 and one i s.t. I i = 1 5 6 I 7 7 A = 0 otherwise. 3 outputs A 8 inputs 19

  20. Encoder: Logic Diagram En En y 0 y 1 I 2 I 1 I 3 I 3 I 5 I 6 I 7 I 7 En En y 2 I 4 A I 0 I 5 I 1 . I 6 . I 7 I 6 I 7 20

  21. Priority Encoder: E I 0 0 y 0 0 1 2 y 1 I 3 3 1 Eo Gs 21

  22. Priority Encoder: Definition Description: Input (I 2n-1 ,…, I 0 ), Output (y n-1 ,…, , y 0 ) (y n-1 ,…, , y 0 ) = i if I i = 1 & E = 1 & I k = 0 for all k > i (high bit priority) or E for all k< i (low bit priority) . E o = 1 if E = 1 & I i = 0 for all i, I 0 0 G s = 1 if E = 1 & i s.t. I i = 1 . y 0 E 0 1 2 1 y 1 3 (G s is like A, and E o tells us if 4 2 5 y 2 enable is true or not). 6 7 I 7 Eo Gs 22

  23. Priority Encoder: Implement a 32-input priority encoder w/ 8 input priority encoders (high bit priority). E I 31-24 y 32, y 31, y 30 Gs Eo I 25-16 y 22, y 21, y 20 Gs Eo I 15-8 y 12, y 11, y 10 Gs Eo I 7-0 y 02, y 01, y 00 Gs Eo 23

  24. Multiplexer • Definition • Logic Diagram • Application 24

  25. 3. Mux (Multiplexer) Definition: A digital module that selects one of data inputs according to the binary address of the selector. E Description If E = 1 y = D i where i = (S n-1 , .. , S 0 ) D 2n-1 -D 0 Else y y = 0 (Data input) S n-1,0 (Selector) 25

  26. iClicker: Multiplexer Definition A. A device that interleaves two or more activities B. A communications device that combines several signals for transmission over a single medium C. A logic circuit that sends one of several inputs out over a single output channel. D. The circuit that uses a common communications channel for sending two or more messages or signals. E. All of the above 26

  27. Multiplexer (Mux): Definition • Selects between one of N inputs to connect to the output. • log 2 N -bit select input – control input • Example: 2:1 Mux S D 0 0 Y D 1 1 S D 1 D 0 Y S Y D 0 0 0 0 0 0 D 1 0 0 1 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 27

  28. PI Q: What is the output of the following MUX? A. 0 B. 1 C. Can’t say E =1 y 1 0 0 1 S=1 28

  29. Multiplexer Definition: Example En D 0 0 S 1 S 0 y D 1 1 y D 2 2 D 3 3 S 1 S 0 29

  30. Multiplexer: Logic Diagram • Tristates • Logic gates – For an N-input mux, – Sum-of-products form use N tristates – Turn on exactly one to Y D 0 D 1 00 01 11 10 S select the appropriate 0 0 0 1 1 input 1 0 1 1 0 Y = D 0 S + D 1 S S D 0 D 0 Y D 1 S D 1 Y 30

  31. Multiplexer Application • Mux for a Boolean function with truth table as input A B Y 0 0 0 0 1 0 1 0 0 1 1 1 Y = AB A B 00 01 Y 10 11 31

  32. Multiplexer: Application A A Y A B Y 0 0 0 0 0 0 0 1 0 Y Y = AB 1 0 0 1 1 B B 1 1 1 32

  33. Multiplexer Application: universal set {Mux} Example 1: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with an 8-input Mux. Id a b c f 0 0 0 0 1 1 0 0 1 1 2 0 1 0 - 3 0 1 1 0 4 1 0 0 0 5 1 0 1 0 6 1 1 0 0 7 1 1 1 1 33

  34. Multiplexer Application: universal set {Mux} Example 1: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with an 8-input Mux. En Id a b c f 0 0 0 0 1 1 0 1 1 0 0 1 1 1 0 2 2 0 1 0 - 0 3 y 3 0 1 1 0 0 4 0 5 4 1 0 0 0 6 0 5 1 0 1 0 7 1 6 1 1 0 0 S 2 S 1 S 0 7 1 1 1 1 a b c 34

  35. Example 2: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with 4-input Muxes. E D (c) a b c = 0 c = 1 0 D 0 (c) = 0 0 0 1 1 D 1 (c) = y 1 0 D 2 (c) = 2 1 1 D 3 (c) = 3 S 1 S 0 a b 35

  36. Example 2: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with 4-input Muxes. E D (c) a b c = 0 c = 1 1 0 D 0 (c) =1 0 0 1 1 0 1 0 1 - 0 D 1 (c) =0 y 1 0 0 0 D 2 (c) =0 0 2 1 1 0 1 D 3 (c) =c c 3 S 1 S 0 a b 36

  37. Example 3: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with 2- input Muxes. a 00 01 10 11 D (b,c) E 0 1 1 - 0 D 0 (b,c) 1 0 0 0 1 D 1 (b,c) 0 y 1 a 37

  38. Example 3: Given f (a,b,c) = Σ m (0,1,7) + Σ d(2), implement with 2- input Muxes. a 00 01 10 11 D (b,c) E 0 1 1 - 0 D 0 (b,c) 1 0 0 0 1 D 1 (b,c) b ’ 0 y D 0 (b,c) = b ’ D 1 (b,c) = bc D 1 (b,c) 1 1 - 0 0 c c 1 0 0 1 a b b 38

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend