CSE 140: Components and Design Techniques for Digital Systems - - PowerPoint PPT Presentation

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CSE 140: Components and Design Techniques for Digital Systems - - PowerPoint PPT Presentation

CSE 140: Components and Design Techniques for Digital Systems Lecture 9: Sequential Networks: Implementation CK Cheng Dept. of Computer Science and Engineering University of California, San Diego 1 Implementation Format and Tool


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CSE 140: Components and Design Techniques for Digital Systems Lecture 9: Sequential Networks: Implementation

CK Cheng

  • Dept. of Computer Science and Engineering

University of California, San Diego

1

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Implementation

  • Format and Tool

– Mealy & Moore Machines, Excitation Table

  • Procedure

– State Table to Logic Diagram

  • Excitation Tables

– FFs

  • Examples

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Mealy Machine: yi(t) = fi(X(t), S(t)) Moore Machine: yi(t) = fi(S(t)) si(t+1) = gi(X(t), S(t))

C1 C2

CLK x(t) y(t)

Mealy Machine C1 C2

CLK x(t) y(t)

Moore Machine

S(t) S(t)

Canonical Form: Mealy and Moore Machines

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SLIDE 4

iClicker

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D

y CLK

x

Q

In the logic diagram below, a D flip-flop has input x and

  • utput y.

A: x= Q(t), y=Q(t) B: x=Q(t+1), y=Q(t) C: x=Q(t), y=Q(t+1) D: None of the above

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SLIDE 5

Understanding Current State and Next State in a sequential circuit

5

today sunrise “Yesterday is

  • gone. Tomorrow

has not yet come. We have only

  • today. Let us

begin.” ― Mother Teresa

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C1 C2

CLK x(t) y(t)

Implementation Format

Q(t)

Q(t+1) = g(x(t), Q(t)) Circuit C1 y(t) = f(x(t), Q(t)) Circuit C2

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Canonical Form: Mealy & Moore machines State Table  Netlist Tool: Excitation Table

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SLIDE 7

Implementation Tool: Excitation Table

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x(t) Q(t)

CLK

C1

id x(t) Q(t) Q(t+1) 1 1 1 1 2 1 3 1 1

State Table Find D, T, (S R), (J K) to drive F-Fs Example:

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SLIDE 8

Implementation Tool: Excitation Table

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x(t) Q(t)

CLK

Q(t)

C1

id x(t) Q(t) T(t) Q(t+1) 1 1 1 1 1 1 2 1 1 3 1 1 1 id x(t) Q(t) Q(t+1) 1 1 1 1 2 1 1 3 1 1

State Table Excitation Table Example with T flip flop

T(t)

Example:

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SLIDE 9

Implementation Tool: Excitation Table

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x(t) Q(t)

CLK

Q(t)

C1

id x(t) Q(t) T(t) Q(t+1) 1 1 1 1 1 1 2 1 1 3 1 1 1

Excitation Table

Implement combinational logic C1 D(t), T(t), (S(t) R(t)), (J(t) K(t)) are functions of (x,Q(t))

Example:

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Implementation: Procedure

State Table => Excitation Table

Problem: To implement C1, we need D(t), T(t), (S(t) R(t)), (J(t) K(t)) as functions of (x,Q(t)).

  • 1. From state table, we have

NS: Q(t+1) = g(x(t),Q(t))

  • 2. Excitation Table of F-Fs: The setting of

D(t), T(t), (S(t) R(t)), (J(t) K(t)) to drive Q(t) to Q(t+1).

  • 3. Combining 1 and 2, we have excitation table of C1:

D(t), T(t), (S(t) R(t)), (J(t) K(t)) = h(x,Q(t)).

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SLIDE 11

Implementation: Procedure

F-F State Table <=> F-F Excitation Table

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DTSRJK PS Q(t) NS Q(t+1) NS Q(t+1) PS Q(t) DTSRJK

  • D F-F
  • D(t)= eD(Q(t+1), Q(t))
  • T F-F
  • T(t)= eT(Q(t+1), Q(t))
  • SR F-F
  • S(t)= eS(Q(t+1), Q(t))
  • R(t)= eR(Q(t+1), Q(t))
  • JK F-F
  • J(t)= eJ(Q(t+1), Q(t))
  • K(t)= eK(Q(t+1), Q(t))
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State table of JK F-F: 00 1 01 10 1 1 11 1 1 Q(t) Q(t+1) JK Excitation table of JK F-F: 0-

  • 1

1 1-

1 PS NS Q(t) Q(t+1) JK Ex: If Q(t) is 1, and Q(t+1) is 0, then JK needs to be -1.

Excitation Table

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Excitation Tables and State Tables

0- XY 1 10

1 PS NS Q(t) Q(t+1) SR Excitation Tables: SR 00 1 01 1 PS SR Q(t) Q(t+1) 10 1 1 11

  • State Tables:

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0-

  • 1

1 1-

1 PS NS Q(t) Q(t+1) JK 01 00 1 10 1 1 11 1 1 Q(t) Q(t+1) JK iClicker

  • A. XY= -1
  • B. XY= 01
  • C. XY= 10
  • D. XY= 1-
  • E. None of the above
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SLIDE 14

Excitation Tables:

1 1 1 1 PS NS Q(t) Q(t+1)

D

1 1 1 1 PS D Q(t) Q(t+1)

D State Tables:

Excitation Tables and State Tables

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1 1 1 1 PS NS Q(t) Q(t+1)

T

1 1 1 1 PS T Q(t) Q(t+1)

T

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Implementation: Procedure

1. State table: y(t)= f(Q(t), x(t)), Q(t+1)= g(x(t),Q(t)) 2. Excitation table of F-Fs:

  • D(t)= eD(Q(t+1), Q(t));
  • T(t)= eT(Q(t+1), Q(t));
  • (S, R), or (J, K)

3. From 1 & 2, we derive excitation table of the system

  • D(t)= hD(x(t),Q(t))= eD(g(x(t),Q(t)),Q(t));
  • T(t)= hT(x(t),Q(t))= eT(g(x(t),Q(t)),Q(t));
  • (S, R) or (J, K).

4. Use K-map to derive combinational logic implementation.

  • D(t)= hD(x(t),Q(t))
  • T(t)= hT(x(t),Q(t))
  • y(t)= f(x(t),Q(t))

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Implementation: Example Implement a JK F-F with a T F-F

00 1 01 1 PS JK Q(t)

Q(t+1) = h(J(t),K(t),Q(t)) = J(t)Q’(t)+K’(t)Q(t) JK

10 1 1 11 1

Implement a JK F-F:

Q Q’ C1 J K T

16

Q

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id 1 2 3 4 5 6 7 J(t) 1 1 1 1 K(t) 1 1 1 1 Q(t) 1 1 1 1 Q(t+1) 1 1 1 1 T(t) 1 1 1 1

Excitation Table of T Flip-Flop

T(t) = Q(t) XOR ( J(t)Q’(t) + K’(t)Q(t))

Excitation Table of the Design

Example: Implement a JK flip-flop using a T flip-flop

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1. State table: y(t)= f(Q(t), x(t)), Q(t+1)= g(x(t),Q(t)) 2. Excitation table of F-Fs:

  • D(t)= eD(Q(t+1), Q(t));
  • T(t)= eT(Q(t+1), Q(t));
  • (S, R), or (J, K)

3. From 1 & 2, we derive excitation table

  • f the system
  • D(t)= hD(x(t),Q(t))= eD(g(x(t),Q(t)),Q(t));
  • T(t)= hT(x(t),Q(t))= eT(g(x(t),Q(t)),Q(t));
  • (S, R) or (J, K).

4. Use K-map to derive combinational logic implementation.

  • D(t)= hD(x(t),Q(t))
  • T(t)= hT(x(t),Q(t))
  • y(t)= f(x(t),Q(t))

i.e. Q(t+1)(t) = JQ’(t)+K’Q(t)

1 1 1 1 PS NS Q(t) Q(t+1)

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0 2 6 4 1 3 7 5

Q(t)

J

0 0 1 1 0 1 1 0

K

T(J,K,Q): T = K(t)Q(t) + J(t)Q’(t)

Q Q’ J K T

Example: Implement a JK flip-flop using a T flip-flop

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iClicker

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Before state assignment, the relation of its state table and excitation table is A.One to one B.One to many C.Many to one D.Many to many E.None of the above

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Let’s implement our free running 2-bit counter using T-flip flops

S0 S1 S2 S3

PS

Next state

S1 S2 S3 S0 State Table

S0 S1 S2 S3

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Let’s implement our free running 2-bit counter using T-flip flops

S0 S1 S2 S3

S1 S2 S3 S0 State Table

S0 S1 S2 S3

State Table with Assigned Encoding

0 0 0 1 1 0 1 1

Current

01 10 11 00

Next

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Let’s implement our free running 2-bit counter using T-flip flops

id Q1(t) Q0(t) T1(t) T0(t) Q1(t+1) Q0(t+1) 1 1 1 1 2 1 1 1 3 1 1

Excitation table

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Let’s implement our free running 2-bit counter using T-flip flops

id Q1(t) Q0(t) T1(t) T0(t) Q1(t+1) Q0(t+1) 1 1 1 1 1 1 1 2 1 1 1 1 3 1 1 1 1

Excitation table

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Let’s implement our free running 2-bit counter using T-flip flops

id Q1(t) Q0(t) T1(t) T0(t) Q1(t+1) Q0(t+1) 1 1 1 1 1 1 1 2 1 1 1 1 3 1 1 1 1

Excitation table

T0(t) = T1(t) = Q0(t+1) = T0(t) Q’0(t)+T’0(t)Q0(t)

Q1(t+1) = T1(t) Q’1(t)+T’1(t)Q1(t)

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Let’s implement our free running 2-bit counter using T-flip flops

id Q1(t) Q0(t) T1(t) T0(t) Q1(t+1) Q0(t+1) 1 1 1 1 1 1 1 2 1 1 1 1 3 1 1 1 1

Excitation table

T0(t) = 1 T1(t) = Q0(t)

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T Q Q’ T Q Q’

Q0 Q1 1 T1

Free running counter with T flip flops

T0(t) = 1 T1(t) = Q0(t)

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Summary: Implementation

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  • Set up canonical form
  • Mealy or Moore machine
  • Identify the next states
  • state diagram ⇨ state table
  • state assignment
  • Derive excitation table
  • Inputs of flip flops
  • Design the combinational logic
  • don’t care set utilization