CSC 2400: Computer Systems Towards the Hardware: Machine-Level - - PowerPoint PPT Presentation

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CSC 2400: Computer Systems Towards the Hardware: Machine-Level - - PowerPoint PPT Presentation

CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) Compilation Stages


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SLIDE 1

CSC 2400: Computer Systems

Towards the Hardware:

Machine-Level Representation

  • f Programs
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SLIDE 2

Towards the Hardware

  • High-level language (Java)

–High-level language (C) → assembly language → machine language (IA-32)

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SLIDE 3

Compilation Stages

count = 0; while (n > 1) { count++; if (n & 1) n = n*3 + 1; else n = n/2; }

00000000000000000000000000000000 00000000000000000000000000000000 01100011010101110110001101010111 00101011101011010010101110101101 11010001110111011101000111011101 00101110100111000010111010011100 11010010001111001101001000111100 11010000011111011101000001111101 11010011101010011101001110101001 11010000111111101101000011111110 11010001010000101101000101000010

High level language Assembly language Machine language

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif: sar EDX, 1 mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1 add ECX, 1 .loop: cmp EDX, 1 jle .endloop jmp .loop .endloop: mov ECX, 0

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SLIDE 4

Building and Running

  • To build an executable
  • Result

! Complete executable binary file ! Machine language

  • To run:

$ gcc program.c –o program $ ./program 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0

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SLIDE 5

C Code (code.c)

int sum(int x, int y) { int t = x+y; accum += t; return t; }

Generated Assembly (code.s)

sum: push ebp mov ebp, esp mov edx, DWORD PTR [ebp+12] mov eax, DWORD PTR [ebp+8] add eax, edx pop ebp ret

Compiling Into Assembly

  • Obtained with command

gcc –masm=intel -S code.c

  • Produces file code.s
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SLIDE 6

Lecture Goals

  • Help you learn…

! Relationship between C and assembly language ! IA-32 assembly language through an example

  • Why do you need to know this?
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SLIDE 7

Computer Architecture

Background

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SLIDE 8

Main Memory

Memory addresses are defined using unsigned binary integers

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SLIDE 9

CPU and Memory

  • Example of a dual core architecture

0000000000000000

10100111 11010010 11000010 00101001

Memory

  • The only large storage area that the

CPU can access directly

  • Hence, any program executing must

be in memory

. . .

0000000000000001 0000000000000010 0000000000000011 . . .

Registers are fastest-speed temporary storage Cache acts as a buffer between memory and registers

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SLIDE 10

Central Processing Unit(CPU)

Arithmetic Logic Unit (ALU)

AX BX CX DX

Machine Instr1 Machine Instr2 Machine Instr3 Machine Instr4

q Machine Instructions

! move data in and out of registers ! manipulate the register contents

q Registers act as temporary variables

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SLIDE 11

Remember This?

Part of the ALU

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SLIDE 12

Central Processing Unit (CPU)

  • Runs the loop Fetch-Decode-Execute

Fetch Next Instruction

START Execute Instruction

Execute Instruction

Execute Instruction

HALT Decode Instruction START

q Fetch the next instruction from memory

  • Where from? A CPU register called the Instruction Pointer

(EIP) holds the address of the instruction to be fetched next

q Decode the instruction and fetch the operands q Execute the instruction and store the result

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SLIDE 13

Control Unit: Instruction Decoder

  • Determines what operations need to take place

! Translate the machine-language instruction

  • Control what operations are done on what data

! E.g., control what data are fed to the ALU ! E.g., enable the ALU to do multiplication or addition ! E.g., read from a particular address in memory src1 src2 dst

  • peration

flag/carry ALU

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SLIDE 14

HEAP STACK TEXT DATA Addresses Instructions Data EIP Registers Condition Codes EAX EBX ECX EDX ESI EDI ESP EBP CF ZF SF OF CPU Registers Memory EIP Instruction Pointer ESP, EBP Reserved for special use EAX Always contains return value

Intel Architecture, 32-bit (IA-32)

EFLAGS

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SLIDE 15

Central Processing Unit(CPU)

Arithmetic Logic Unit (ALU)

AX BX CX DX

Machine Instr1 Machine Instr2 Machine Instr3 Machine Instr4

q Machine Instructions

! move data in and out of registers ! manipulate the register contents

q Registers act as temporary variables

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SLIDE 16

Registers

  • Small amount of storage on the CPU

! Can be accessed more quickly than main memory

  • Instructions move data in and out of registers

! Loading registers from main memory ! Storing registers to main memory

  • Instructions manipulate the register contents

! Registers essentially act as temporary variables ! For efficient manipulation of the data

  • Registers are the top of the memory hierarchy

! Ahead of main memory, disk, tape, …

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SLIDE 17

C Code vs. Assembly Code

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SLIDE 18

Kinds of Instructions

  • Reading and writing data

! count = 0 ! n

  • Arithmetic and logic operations

! Increment: count++ ! Multiply: n * 3 ! Divide: n/2 ! Logical AND: n & 1

  • Checking results of comparisons

! Is (n > 1) true or false? ! Is (n & 1) non-zero or zero?

  • Changing the flow of control

! To the end of the while loop (if “n ≤ 1”) ! Back to the beginning of the loop ! To the else clause (if “n & 1” is 0)

count = 0; while (n > 1) { count++; if (n & 1) n = n*3 + 1; else n = n/2; }

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SLIDE 19

Variables in Registers

Registers count ECX n EDX

count = 0; while (n > 1) { count++; if (n & 1) n = n*3 + 1; else n = n/2; } mov ECX, DWORD PTR count mov EDX, DWORD PTR n

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SLIDE 20

Immediate and Register Addressing

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; }

mov ECX, 0 add ECX, 1

written to a register

count ECX n EDX

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SLIDE 21

General Syntax

  • p Dest, Src

Perform operation op on Src and Dest Save result in Dest

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SLIDE 22

Immediate and Register Addressing

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; }

mov EAX, EDX and EAX, 1

Computing intermediate value in register EAX

count ECX n EDX

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SLIDE 23

mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1

Immediate and Register Addressing

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; } Adding n twice is cheaper than multiplication!

count ECX n EDX

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SLIDE 24

sar EDX, 1

Immediate and Register Addressing

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; } Shifting right by 1 bit is cheaper than division!

count ECX n EDX

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SLIDE 25

Changing Program Flow

  • Cannot simply run next instruction

! Check result of a previous operation ! Jump to appropriate next instruction

  • Jump instructions

! Load new address in instruction pointer

  • Example jump instructions

! Jump unconditionally (e.g., “}”) ! Jump if zero (e.g., “n & 1”) ! Jump if greater/less (e.g., “n > 1”)

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; }

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SLIDE 26

Jump Instructions

  • Jump depends on the result of previous arithmetic instruction

Jump Description

jmp Unconditional je Equal / Zero jne jg jge jl jle EIP Registers Condition Codes EAX EBX ECX EDX ESI EDI ESP EBP CF ZF SF OF EFLAGS

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SLIDE 27

Remember This?

Part of the ALU CF OF SF

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SLIDE 28

jX Condition Description

jmp 1 Unconditional je ZF Equal / Zero jne ~ZF Not Equal / Not Zero js SF Negative jns ~SF Nonnegative jg ~(SF^OF)&~ZF Greater (Signed) jge ~(SF^OF) Greater or Equal (Signed) jl (SF^OF) Less (Signed) jle (SF^OF)|ZF Less or Equal (Signed) ja ~CF&~ZF Above (unsigned) jb CF Below (unsigned) ! Jump to different part of code depending on condition codes

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SLIDE 29

Conditional and Unconditional Jumps

  • Comparison cmp compares two integers

! Done by subtracting the first number from the second ! Discards the results, but sets flags as a side effect: – cmp EDX, 1 (computes EDX – 1) – jle .endloop (checks whether result was 0 or negative)

  • Logical operation and compares two integers:

– and EAX, 1 (bit-wise AND of EAX with 1) – je .else (checks whether result was 0)

  • Also, can do an unconditional branch jmp

– jmp .endif – jmp .loop

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SLIDE 30

.loop: cmp EDX, 1 jle .endloop … jmp .loop .endloop:

Jump and Labels: While Loop

while (n>1) { } Checking if EDX is less than or equal to 1.

count ECX n EDX

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SLIDE 31

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif: sar EDX, 1 mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1 add ECX, 1 .loop: cmp EDX, 1 jle .endloop jmp .loop .endloop: mov ECX, 0

Jump and Labels: While Loop

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; }

count ECX n EDX

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SLIDE 32

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif:

Jump and Labels: If-Then-Else

if (n&1) ... else ... “then” block “else” block …

count ECX n EDX

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SLIDE 33

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif: sar EDX, 1 mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1 add ECX, 1 .loop: cmp EDX, 1 jle .endloop jmp .loop .endloop: mov ECX, 0

Jump and Labels: If-Then-Else

count=0; while(n>1) { count++; if (n&1) n = n*3+1; else n = n/2; } “then” block “else” block

count ECX n EDX

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SLIDE 34

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif: sar EDX, 1 mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1 add ECX, 1 .loop: cmp EDX, 1 jle .endloop jmp .loop .endloop: mov ECX, 0

Code More Efficient…

count=0; while(n>1) { count++; if (n&1) n = n*3+1; else n = n/2; } Replace with “jmp loop”

count ECX n EDX

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SLIDE 35

mov EAX, EDX and EAX, 1 je .else jmp .endif .else: .endif: sar EDX, 1 mov EAX, EDX add EDX, EAX add EDX, EAX add EDX, 1 add ECX, 1 .loop: cmp EDX, 1 jle .endloop jmp .loop .endloop: mov ECX, 0

Complete Example

count=0; while (n>1) { count++; if (n&1) n = n*3+1; else n = n/2; }

count ECX n EDX

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SLIDE 36

Reading IA-32 Assembly Language

  • Referring to a register:

! EAX, eax, EBX, ebx, etc.

  • Result stored in the first argument

! E.g. “mov EAX, EDX” moves EDX into EAX ! E.g., “add ECX, 1” increments register ECX

  • Comment: pound sign (“#”)

! E.g., “# Purpose: Convert lower to upper case”

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SLIDE 37

X86 à C Example

int Example(int x){ ??? }

push EBP mov EBP, ESP mov ECX, [EBP+8] xor EAX, EAX xor EDX, EDX cmp EDX, ECX jge L2 L1: add EAX, EDX inc EDX cmp EDX, ECX jl L1 L2: mov ESP,EBP pop EBP ret ECX = x EAX = EDX = if goto L2 EAX = EDX = if goto L1

Write comments

L2: L1:

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SLIDE 38

Name the Variables

int Example(int x){ ??? }

push EBP mov EBP, ESP mov ECX, [EBP+8] xor EAX, EAX xor EDX, EDX cmp EDX, ECX jge L2 L1: add EAX, EDX inc EDX cmp EDX, ECX jl L1 L2: mov ESP,EBP pop EBP ret ECX = x result = i = if goto L2 result = i = if goto L1 L2: L1:

EAX à result, EDX à i

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SLIDE 39

Identify the Loop

result = 0; i = 0; if (i >= x) goto L2; L1:result += i; i++; if (i < x) goto L1; L2:

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SLIDE 40

Identify the Loop

result = 0; i = 0; if (i >= x) goto L2; L1:result += i; i++; if (i < x) goto L1; L2: result = 0; i = 0; if (i >= x) goto L2; do { result += i; i++; } while (i < x); L2: result = 0; i = 0; while (i < x){ result += i; i++; } result = 0; for (i = 0; i < x; i++) result += i;

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SLIDE 41

C Code

int Example(int x) { int result = 0; int i; for (i = 0; i < x; i++) result += i; return result; }

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SLIDE 42

Exercise

int F(int x, int y){ ??? }

push EBP mov EBP,ESP mov ECX, [EBP+8] mov EDX, [EBP+12] xor EAX, EAX cmp ECX, EDX jle .L1 .L2: dec ECX inc EDX inc EAX cmp ECX,EDX jg .L2 .L1: inc EAX mov ESP,EBP pop EBP ret # ECX = x # EDX = y .L1: .L2:

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SLIDE 43

C Code

int F(int x, int y)

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SLIDE 44

46

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SLIDE 45

Instructions to Recognize

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SLIDE 46
  • Two Operand Instructions

ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src Dest = Dest * Src SAL Dest, Src Dest = Dest << Src SAR Dest, Src Dest = Dest >> Src Arithmetic SHR Dest, Src Dest = Dest >> Src Logical XOR Dest, Src Dest = Dest ^ Src AND Dest, Src Dest = Dest & Src OR Dest, Src Dest = Dest | Src

Arithmetic Instructions (1)

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SLIDE 47
  • One Operand Instructions

INC Dest Dest = Dest + 1 DEC Dest Dest = Dest – 1 NEG Dest Dest = -Dest NOT Dest Dest = ~Dest

Arithmetic Instructions (2)

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SLIDE 48

CMP Dest, Src Compute Dest - Src without setting Dest TEST Dest, Src Compute Dest & Src without setting Dest

Compare and Test Instructions

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SLIDE 49

Jump Instructions

  • Jump depending on the result of the previous arithmetic

instruction:

Jump Description

jmp Unconditional je Equal / Zero jne Not Equal / Not Zero js Negative jns Nonnegative jg Greater (Signed) jge Greater or Equal (Signed) jl Less (Signed) jle Less or Equal (Signed) ja Above (unsigned) jb Below (unsigned)

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SLIDE 50

Loading and Storing Data

Memory Addressing Modes

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SLIDE 51

IA-32 General Purpose Registers

General-purpose registers

EAX EBX ECX EDX ESI EDI 31 AX BX CX DX

16-bit 32-bit

DI SI AL AH BL CL DL BH CH DH 8 7 15

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SLIDE 52

CMP AL, 5 JLE else INC AL jmp endif else: DEC AL endif:

C Example: One-Byte Data

char i; … if (i > 5) { i++; else i--; } Global char variable i is in AL, the lower byte of the “A” register.

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SLIDE 53

CMP EAX, 5 JLE else INC EAX JMP endif else: DEC EAX endif:

C Example: Four-Byte Data

int i; … if (i > 5) { i++; else i--; } Global int variable i is in EAX, the full 32 bits of the “A” register.

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SLIDE 54

Loading and Storing Data

  • Processors have many ways to access data

! Known as “addressing modes” ! Two simple ways seen in previous examples

  • Addressing Modes

! Register addressing ! Immediate addressing ! Pointer addressing

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SLIDE 55

Register Addressing

  • Registers embedded in the instruction
  • Examples

! XOR EAX, EAX ! MOV EBX, ECX ! INC BH

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SLIDE 56

Immediate Addressing

  • Data embedded in the instruction
  • Examples

! ADD EAX, 3 ! MOV AX, -40

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SLIDE 57

Pointer Addressing (direct)

  • Memory address embedded in the instruction

! Direct memory addressing

  • Examples

! MOV AL, [2000] ! Read the byte from memory address 2000 ! Load the byte value in the register AL

  • Note that

! 2000 refers to the constant value 2000 ! [2000] refers to the memory location at address 2000

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SLIDE 58

Pointer Addressing (indirect)

  • Load or store from a previously-computed address

! Register with the base address is in the instruction ! Indirect memory addressing

  • Examples

! MOV AX, [BX] (register addressing) ! CMP DL, [BX+8] (base+displacement) ! MOV EAX,[EBX+ESI*4+8] (base+index+displacement)

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SLIDE 59

Indexed Addressing Example

MOV EAX, 0 MOV ECX, OFFSET FLAT:a sumloop: ADD EBX, [ECX+EAX*4] INC EAX CMP EAX, 20 jne sumloop int a[20]; … int i, sum=0; for (i=0; i<20; i++) sum += a[i]; EAX: i EBX: sum ECX: address of a[0] global variable

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SLIDE 60

Data Access Methods: Summary

  • Immediate addressing: data stored in the instruction itself

! MOV ECX, 10

  • Register addressing: data stored in a register

! MOV ECX, EAX

  • Direct addressing: address stored in instruction

! MOV ECX, [200]

  • Indirect addressing: address stored in a register

! MOV ECX, [EAX] ! MOV ECX, [EAX+4] ! MOV ECX, [EAX + ESI*4 + 12]

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SLIDE 61

LEA: Load Effective Address

  • LEA Dest, Src

! Src is address mode expression ! Set Dest to address denoted by expression

  • Example

! LEA EAX, [EBX+4*ESI] ! Load into EAX the value EBX+4*ESI

  • Compare to

! MOV EAX, [EBX+4*ESI] ! Load into EAX the value stored in memory at address EBX+4*ESI

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SLIDE 62

Using LEA for Arithmetic Expressions

int arith (int x, int y, int z) { int t1 = x+y; int t2 = z+t1; int t3 = x+4; int t4 = y * 48; int t5 = t3 + t4; int rval = t2 * t5; return rval; } arith: PUSH EBP MOV EBP,ESP MOV ECX, DWORD PTR [EBP+8] MOV EDX, DWORD PTR [EBP+12] LEA EAX, [EDX+EDX*2] SAL EDX, 4 LEA EAX, [ECX+4+EAX] ADD EDX, ECX ADD EDX, DWORD PTR [EBP+16] IMUL EAX,EDX POP EBP RET Body Setup Finish

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SLIDE 63

Understanding arith

int arith (int x, int y, int z) { int t1 = x+y; int t2 = z+t1; int t3 = x+4; int t4 = y * 48; int t5 = t3 + t4; int rval = t2 * t5; return rval; } x is at address ebp+8 y is at address ebp+12 z is at address ebp+16 To be explained in next lecture MOV ECX, DWORD PTR [EBP+8] ; ECX = MOV EDX, DWORD PTR [EBP+12] ; EDX = LEA EAX, [EDX+EDX*2] ; EAX = SAL EAX, 4 ; EAX = LEA EAX, [ECX+4+EAX] ; EAX = ADD EDX, ECX ; EDX = ADD EDX, DWORD PTR [EBP+16] ; EDX = IMUL EAX,EDX ; EAX =

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SLIDE 64

int arith (int x, int y, int z) { int t1 = x+y; int t2 = z+t1; int t3 = x+4; int t4 = y * 48; int t5 = t3 + t4; int rval = t2 * t5; return rval; } x is at address ebp+8 y is at address ebp+12 z is at address ebp+16 To be explained in next lecture MOV ECX, DWORD PTR [EBP+8] ; ECX = MOV EDX, DWORD PTR [EBP+12] ; EDX = LEA EAX, [EDX+EDX*2] ; EAX = SAL EAX, 4 ; EAX = LEA EAX, [ECX+4+EAX] ; EAX = ADD EDX, ECX ; EDX = ADD EDX, DWORD PTR [EBP+16] ; EDX = IMUL EAX,EDX ; EAX = x y 3y 48y x+4+48y (t5) x+y x+y+z (t2) t2*t5 (return value)

Understanding arith

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SLIDE 65

Data Transfer Instructions

  • MOV Dest, Src

! General move instruction

  • PUSH Src

PUSH EBX # equivalent instructions SUB ESP, 4 MOV [ESP], EBX

  • POP Dest

POP ECX # equivalent instructions MOV ECX, [ESP] ADD ESP, 4 ESP

17

ESP

17

EBX ESP

44

ESP

44

ECX

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SLIDE 66

Summary

  • Hardware

! Memory is the only storage area CPU can access directly ! Executables are stored on the disk ! Fetch-Decode-Execute Cycle for running executables

  • Assembly code

! Programming the “bare metal” of the hardware ! Loading and storing data, arithmetic and logic operations, checking results, and changing control flow