Systems Multipliers and Other Circuits Shankar Balachandran* - - PowerPoint PPT Presentation

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Systems Multipliers and Other Circuits Shankar Balachandran* - - PowerPoint PPT Presentation

Spring 2015 Week 9 Module 52 Digital Circuits and Systems Multipliers and Other Circuits Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay


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SLIDE 1

Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras

*Currently a Visiting Professor at IIT Bombay

Digital Circuits and Systems

Spring 2015 Week 9 Module 52

Multipliers and Other Circuits

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SLIDE 2

Arithmetic Circuits 2

Arithmetic and Logic Unit (ALU)

 An ALU is a combinational circuit that can perform any of

a number of different arithmetic and logical operation on a pair of n-bit operands.

 Operation to be performed is specified by a set of control

(function-select) inputs.

 ALUs are designed in a bit-slice fashion and slices can be

cascaded to form larger ALUs. Some ALUs are designed as an m-bit group instead of a single bit slice.

 m-bit group enables us to improve carry propagation

within a group using carry lookahead or other similar enhancements.

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SLIDE 3

Arithmetic Circuits 3

Unsigned Binary Multiplication

 Consider unsigned m- and n-bit integers, X and Y

   

    1 1

2 2

n j j j m i i i

y Y x X

 

                        

            1 1 1 1 1

2 2 2 2

m i j i n j j i n j j j m i i i n m k k k

y x y x p Y X P

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SLIDE 4

Arithmetic Circuits 4

Array Multiplier

x1 x0 x2 x3 y0 p0

FA HA HA FA

y1 p1

FA HA FA FA

y2 p2

FA HA FA FA

y3 p3 p4 p5 p6 p7

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SLIDE 5

Arithmetic Circuits 5

x1 x0 x2 x3 y0 p0

FA HA HA FA

y1 p1

FA HA FA FA

y2 p2

FA HA FA FA

y3 p3 p4 p5 p6 p7

m

Performance of Array Multiplier

n

Critical path 1 Critical path 2

        sum

carry and mult

t n t n m t t 1 2 1       

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SLIDE 6

Arithmetic Circuits 7

Signed Multiplication

0 0 0 0 0 0 0 0 0

Positive Multiplicand

0 1 1 1 0 x 0 1 0 1 1

(+14) (+11) (+154)

0 1 1 1 0 0 1 1 1 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 + 0 1 0 0 1 1 0 1 0 1 1 1 1 1 1 1 0 0 1

Negative Multiplicand

1 0 0 1 0 x 0 1 0 1 1

(-14) (+11) (-154)

1 0 0 1 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 + 1 0 1 1 0 0 1 1 0

Negative Multiplier: Negate multiplier and multiplicand and use the above scheme for positive multiplier.

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SLIDE 7

Arithmetic Circuits 8

Modular Multiplication

Using small multipliers to build larger multipliers

x

A ≡ a7a6a5a4a3a2a1a0 ≡ A7-4 A3-0 A B B ≡ b7b6b5b4b3b2b1b0 ≡ B7-4 B3-0 A3-0*B3-0 A7-4*B3-0 A3-0*B7-4 A7-4*B7-4 A7-4 A3-0 B7-4 B3-0 B3-0 A3-0 *

x

B3-0 A7-4 * B7-4 A3-0 * B7-4 A7-4 *

4×4 multiplier 4×4 multiplier 4×4 multiplier 4×4 multiplier

P3-0 P7-4 P11-8 P15-12 B3-0 A3-0 * B3-0 A7-4 * B7-4 A3-0 * B7-4 A7-4 *

a more convenient arrangement

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SLIDE 8

Arithmetic Circuits 9

Adding Three 4-Bit Numbers (X, Y, Z)

FA x0 y0 z0 FA x1 y1 z1 FA x2 y2 z2 FA x3 y3 z3 FA s1 FA s2 FA s3 s0

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SLIDE 9

Arithmetic Circuits 10

Comparator – Equality Check

 Iterative algorithm:

     

if then else if then go to step else end;

1 1

1. 0; 1; 2. 1 1; 0; 3. 1; 4. 2;

i i i i i

i EQ x y EQ EQ EQ i i i n

 

         

yi xi

EQi EQi+1 y0 x0

EQ0 EQ1 x y

EQO EQI

EQUIV x y

EQO EQI

EQUIV x y

EQO EQI

EQUIV x y

EQO EQI

EQUIV

y1 x1

EQ2

y2 x2

EQ3

yn-1 xn-1

EQn EQn-1

   

?

1 2 1 1 2 1

... ...

n n

x x x x y y y y

 

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SLIDE 10

Arithmetic Circuits 11

4-Bit Comparator

 Magnitude comparator for

n-bit unsigned binary numbers

 Inputs: a3a2a1a0

b3b2b1b0 altbin aeqbin agtbin

 Outputs:

altbout aeqbout agtbout

 Logic Equations:

         

> = = < =

3 0 3 0 3 0 3 0 3 0 3 0 3 0 3 0 3 0 3 0

  • ut
  • ut
  • ut

in in in

a b a b a b ag agtb a tb aeqb altb a b a b eqb altb

         

       

b3-0 a3-0 agtbin altbin aeqbin agtbin altbin aeqbin

4 4

COMP4

 

        

 

    

     

3 0 3 0 3 3 3 3 2 2 3 3 2 2 1 1 3 3 2 2 1 1 3 0 3 0 3 3 2 2 1 1 3 0 3 0 3 0 3 0 3 0 3 0

a b a b a b a b a b a b a b a b a b a b a b a b a b a b a b a b a b a b a b

         

                    

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SLIDE 11

Arithmetic Circuits 12

12-Bit Comparator (unsigned)

b3-0 a3-0 agtbin altbin aeqbin agtbin altbin aeqbin

4 4

COMP4 XLTY4 XEQY4 XGTY4 b3-0 a3-0 agtbin altbin aeqbin agtbin altbin aeqbin

4 4

COMP4 b3-0 a3-0 agtbin altbin aeqbin agtbin altbin aeqbin

4 4

COMP4 XLTY8 XEQY8 XGTY8 XLTY XEQY XGTY 1 x11…0 y11…0 x3…0 x7…4 x11…8 y3…0 y7…4 y11…8

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SLIDE 12

Arithmetic Circuits 13

MIN/MAX Circuit

 Use a 4-bit comparator to design an 8-bit MIN/MAX circuit.

 Inputs:

unsigned inputs, X ≡ x7..0 , Y ≡ y7..0 and a control signal MINMAX

 Output:

   

if if min , 1 max , X Y MINMAX Z X Y MINMAX        

MUX 1 12

Z

X>Y MINMAX Z S Y

1 1

X

1

X

1 1

Y

1

MINMAX COMP

12 12

X Y

X>Y

S

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SLIDE 13

End of Week 9: Module 52

Thank You

Multipliers+Others 14