A Low-Voltage Log-Domain Integrator Using MOSFET in Weak Inversion - - PowerPoint PPT Presentation

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A Low-Voltage Log-Domain Integrator Using MOSFET in Weak Inversion

Lida Ramezani

Electrical & Computer Engineering Dept., Ryerson University, lramezan@ee.ryerson.ca

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Outline

1.

Introduction

2.

Main idea and concepts 2-1 MOSFET in Weak inversion or sub-threshold 2-2 Transient frequency of MOSFET in sub-threshold 2-3 Trans-linear principle 2-4 A CMOS translinear loop 2-5 Companding theory 2-6 Log companding integrators

3.

Circuit design 3-1 MOSFET realization of first order filter 3-2 Log domain integrator circuit 3-3 Integrator circuit specifications

4.

CADENCE-Spectre Simulation results 4-1 Transient and frequency response of integrator 4-2 Cutoff frequency tuning using variable integrating capacitor 4-3 Cut off frequency Tuning using variable bias current

5.

Summary and Conclusions References

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• 1. Introduction

1.1 Low power techniques 1.2 Linear circuit constraints in low-power, low-voltage, high frequency and large dynamic range design 1.3 Externally linear, internally Nonlinear circuit design

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1.1 Low-power techniques

• Low power integrated circuits are required in portable systems.

Analog filters are among circuits used in these systems. Integrators are building blocks in cascaded filters.

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1.2 Linear circuit constraints in low-power, low-voltage, high frequency and large dynamic range design

• Low voltage linear circuits suffer from dynamic range limitations:

Input voltage swing The input signal should be several times less than bias level to reduce

harmonic distortion. At the same time, input noise level should be kept as low as possible.

For higher dynamic range, large bias level are needed that causes large

power consumption.

• There are several linearization techniques such as:

Source degeneration, Nonlinear term cancellation Class AB implementation

• In these linearization methods several transistors are added to the circuit.

Each transistor adds several parasitic capacitors and causes more limited bandwidth.

• For high-frequency and low-power circuit design, simple circuits with less

count of transistors are preferred.

1.3 Externally linear, internally Nonlinear (ELIN) circuit design

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• Nonlinear circuits have a larger input range with less bias levels and

lower supply voltage.

• With the lack of linearization transistors, simple circuits with less

count of transistors and less power consumption are used. Also, simple nonlinear circuits have less count of parasitic capacitors and are suitable for high frequencies.

• Log companding filters are kind of externally linear internally nonlinear

ELIN circuits. In this presentation a new ELIN integrator (first order filter) is introduced.

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• 2. Main Idea and related
• 2. Main Idea and related

Concepts Concepts

2-1 MOSFET in Weak inversion or sub-threshold 2-2 Transient frequency of MOSFET in sub-threshold 2-3 Trans-linear principle 2-4 A CMOS translinear loop 2-5 Companding theory 2-6 Log companding integrators

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Main idea

The main idea is design of a simple ELIN integrator in which

companding method is used to improve dynamic range.

MOSFET in weak inversion is used as compressor and expander. Transistor in sub-threshold works with low gate-source voltage i.e.

less than threshold voltage, therefore a low supply voltage of 500mv is used.

Transistor in weak inversion has the highest Gm/Ibias ratio.

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2.1 MOSFET in sub-threshold or Weak inversion 2.1 MOSFET in sub-threshold or Weak inversion

When the gate source voltage of a MOS transistor is less than

threshold voltage but high enough to create depletion region at the surface of silicon, the device operates in weak inversion. This is called sub-threshold region and MOS has exponential voltage- current characteristics [3].

. . .

ex p 1 ex p 3 ex p ln

G S th D S D S p ec T T G S th D S T D S p ec T D G S th T sp ec

V V V I I n V V V V V V I I n V I V V n V I ⎛ ⎞ ⎛ ⎞ ⎛ ⎞ − − = − ⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ ⎝ ⎠ ⎝ ⎠ ⎛ ⎞ − > ⇒ ⎜ ⎟ ⎝ ⎠ ⎛ ⎞ = + ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ ฀

. 2 .

1 1.5 2

GS th D Spec js

• x

Spec T n

• x

V V I I C n C I n V w c l β β μ ≤ ≤ ⇒ ≤ ≤ = + = ฀ ฀

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2.2 Transient frequency of MOSFET in weak-inversion

Transient frequency of MOSFET in weak-inversion is proportional to

its bias current. Smaller transistors have higher transient frequency.

2 2

m D T T g T js

g I f f C V wlC π π = ⇒ =

1

D D m GS T js

• x

g gb gs gd gb js

• x

js gb js

• x

I I g V nV C n C C C C C C C C C C wl wl C C n ∂ = = ∂ = + = + + ⎛ ⎞ ⎛ ⎞ = = ⎜ ⎟ ⎜ ⎟ ⎜ ⎟ + ⎝ ⎠ ⎝ ⎠ ฀

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2.3 Trans-linear principle 2.3 Trans-linear principle

A trans-linear element is a physical device whose trans-

conductance gain and current through the device are linearly

• related. MOSFET in sub-threshold is a trans-linear elements .

A closed loop containing equal number of oppositely connected

trans-linear elements is called a trans-linear loop.

According to trans-linear principle [2], in a trans-linear loop, the

product of the current densities in the elements connected in clockwise (CW) direction is equal to the corresponding product for elements connected in the counter clockwise (CCW) direction.

n m n CW m CCW

I I

∈ ∈

Π = Π

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2.4 A trans-linear loop with MOSFET in weak inversion 2.4 A trans-linear loop with MOSFET in weak inversion

• A CMOS trans-linear loop is shown in Fig.2. All transistors are biased in

weak-inversion.

Fig.2: A CMOS translinear loop

( )

. . 1 2 3 4 1 2 3 4

ln

D GS T th spec GS th D spec GS GS GS GS D D D D

I V nV V I V V I I V V V V I I I I ⎛ ⎞ = + ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ < < < < + = + ⇒ × = ×

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2.5 Companding method 2.5 Companding method

In companding method, compressor and expander

circuits are used.

The compressor circuit compresses the dynamic

range of the input; it amplifies weak signals so that they can be transmitted with noise immunity.

The expander circuit expands the dynamic range; it

reduces the amplitude of the amplified signals and thus of the noise picked up during transmission.

Companding can be used in log domain filters to enable

supply voltage reduction without signal to noise ratio degeneration [6].

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Block diagram of a log companding integrator

' ˆ '' ( )

ˆ( ) ln ( ) ˆ ˆ ˆ ( ) ( ( )) ( ) ( )

y t

x t k x t y t f x t k x t dt y t k e = = = =

∫

Log compressor Antilog expander

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A log companding integrator circuit Using MOSFET in sub-threshold

( ) ( ) ( ) ( ) ( ) ( )

1 2 3 4 1 2 3 4 4 1 2 3 3

( ) ( ) ( ) ( ) ( ) ( ) ln ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( )

D D D D in C

• ut
• ut

C gs T th t c

• ut

T C

• ut
• ut

T in

• ut
• ut
• ut

T

• ut

i i i i i t I I I i t i t i t v t v t nV V I w l dv t di t CnV i t C dt i t dt di t CnV i t I I I i t i t dt di t CnV i t I dt × = × + × = + × ⎛ ⎞ = = + ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ = = ⎛ ⎞ + × = + × ⎜ ⎟ ⎝ ⎠ + = (

)

2 1 3

( )

in

I i t I I + ×

( ) ( )

( )

2 3 3

( ) ( ) ( ) 1

• ut

in T

I I i s H s i s s I CnV ω ω = = + = Fig.3: Log domain integrator using MOSFET in sub-threshold

A log companding integrator, is composed of a trans-linear loop and an integrating capacitor.

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• 3. Circuit design
• 3. Circuit design

3.1 Imp 3.1 Implemen ementation tion of

• f a CM

a CMOS Log domain int OS Log domain integrator grator 3.2 In 3.2 Integrator tegrator cir circuit specificat cuit specification

• ns

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3.1 Implementation of a CMOS Log domain integrator circuit 3.1 Implementation of a CMOS Log domain integrator circuit

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3.2 Integrator circuit specifications 3.2 Integrator circuit specifications

para parame meter ter value value M3, M7, M2, M6 (w/l)=480n/130n M1, M4,M9 (w/l)=480n/130n M5, M8, M10 (w/l)=1.44u/130n RBIAS 50K C 1pf VDD 500mv Power dissipation 50nw 3dB cutoff frequency 113.4KHZ Pass-band gain 0dB

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• 4. CADENCE Simulation results
• 4. CADENCE Simulation results

4.1 Transient and AC response o 4.1 Transient and AC response of integrator f integrator 4.2 Cu 4.2 Cutoff freq ff frequen uency t y tuning usin ng using variable integratin g variable integrating capacitor g capacitor 4.3C 3Cut ut of

• ff f

f frequ equency Tu ncy Tuning using variable bias cu ning using variable bias current rrent

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4.1 Transient and AC response of integrator 4.1 Transient and AC response of integrator

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Input signal

max max

( ) sin( ) 20 2 1

in

i t I t I nA f f KHz ω ω π = = = =

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( ) ( )

1 1 . 1 1 max 1 max 1 . 1

( ) ln ( ) sin ( ) ln 1 sin( )

D gs T th s pec D in s pec gs T th

i V t nV V I i i t I I t I I I I V t nV t V ω ω ⎛ ⎞ = + ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ = + = + = = ⇒ = + +

Gate source voltages of Compressor and expander transistors (M1,M4)

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max 4 max 4

( ) sin( ) 9.5 10

• ut

O O

i t I t I I nA I nA ω = + = =

Output signal

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4.2 Cutoff frequency tuning using variable integrating capacitor

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4.3 Cut off frequency Tuning using variable bias current

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• 5. Summary and Conclusions

MOSFET in sub-threshold is a good candidate for low power

• circuits. In proposed integrator circuit MOSFETs in weak inversion

with supply voltage as low as 500mv and bias current in the range of 20-200nA are used and the power consumption is in nano watt range.

Companding method is used to increase dynamic range. Log

compressor and antilog expander circuits are made using nonlinear behavior of MOSFET in sub-threshold. Input current range is as high as bias current of compressor transistor.

The simulation results is summarized in table.1.

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Table 1. Summary

Integrator core bias current (I3) Integrator capacitor Power consumption Cutoff frequency Pass band gain 20nA 1pf 50nw 113.4KHz 0dB 20nA 0.1pf-10pf 45.44nw-54nw 1.023MHz-1.083KHz 0dB 20nA-0.2μA 1pf 50nw-133.8nw 113.4KHz-974.2KHz 0dB-4.5dB

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References

[1] Serra-Graells, F., Rueda, A., Huertas, J.L.: Low- Voltage CMOS Log Companding Analog Design, Kluwer Academic Publishers.(2003) [2] Sanchez Sinencio, E., Andrreou, A.G.: Low Voltage/Low Power Integrated Circuits and Systems, Low Voltage Mixed Signal Circuits., IEEE press series in microelectronic systems.CH.3, pp.68-- 2(1998) [3] Gray,P.R., Meyer, R.G.: Analysis and Design of Analog Integrated Circuits, 5th Edition. John Wiley & Sons LTD.( 2000) [4] Enz, C.C, Vittoz, E.A.: Charge-based MOS Transistor Modeling, the EKV model for low- Power and RF IC design, John Wiley & Sons Ltd,(2006) [5] Seevinck, E.: Companding Current-mode Integrator, a New Circuit Principle for Continuous Time Monolithic Filters.. Electronics Letters, Vol.26, No.24, pp.2046— 2047.(1990) [6] Fried, R., Python, D., Enz, C.C.: Compact Log Domain Current Mode Integrator with High Transconductance-to-Bias Current Ratio. Electronics Letters, Vol.32, No.11, pp. 952--953(1996) [7] Frey, D.: Future Implications on the Log Domain Paradigm. IEE Proc. Circuits Devices Syst., Vol. 147, N0.1, pp. 65-72.(2000)

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THANKS