[PPT] - 7. Fundamental Transistor Amplifier Configurations Lecture notes: PowerPoint Presentation

SLIDE 1

7. Fundamental Transistor Amplifier

Configurations

Lecture notes: Sec. 5 Sedra & Smith (6th Ed): Sec. 5.4, 5.6 & 6.3-6.4 Sedra & Smith (5th Ed): Sec. 4.4, 4.6 & 5.3-5.4

ECE 65, Winter2013, F. Najmabadi

SLIDE 2

Issues in developing a transistor amplifier:

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (2/26)
1. Find the iv characteristics of the elements for the signal (which

can be different than their characteristics equation for bias).

This will lead to different circuit configurations for bias versus signal
2. Compute circuit response to the signal
Focus on fundamental transistor amplifier configurations
3. How to establish a Bias point (bias is the state of the system

when there is no signal).

Stable and robust bias point should be resilient to variations in

µnCox (W/L),Vt (or β for BJT) due to temperature and/or manufacturing variability.

Bias point details impact small signal response (e.g., gain of the

amplifier).

SLIDE 3

What are amplifier parameters?

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (3/26)

: Circuit the

f

Gain Voltage

sig

v

v A =

∞ →

=

L

R i

vo

v v A : Gain loop

Open

: Resistance Input

i i i

i v R = : Amplifier

f

Resistance Output

→

− =

sig

v

i

v R

Output resistance is the Thevenin resistance between the output terminals!

: Amplifier the

f

Gain Voltage

i

v

v v A =

In general Ri depends on RL and Ro depends on Rsig

SLIDE 4

Observations on the amplifier parameters

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (4/26)
Avo is the maximum possible gain
f the amplifier.
Value of Ro is important.
For Ro << RL , Av ≈ Avo
For Ro = RL , Av = 0.5 Avo
For Ro >> RL , Av ≈ 0
Prefer “small” Ro

vo

L

L i

v

A R R R v v A + = =

Value of Ri is important.
For Ri >> Ri , vi ≈ vsig
For Ri = Rsig , vi = 0.5 vsig
For Ri << Rsig , vi ≈ 0
Prefer “large” Ri

sig i i sig i

R R R v v + =

v sig i i i

sig

i sig

A

R R R v v v v v v A + = × = = : Gain Overall

SLIDE 5

Some observation on single-transistor amplifiers

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (5/26)
1. As we will discuss, there are many ways to bias a transistor. Thus,

there are many practical single-transistor amplifier circuits.

Fortunately, signal circuits always reduce to one of four

fundamental configuration .

2. We compute the voltage gain and input resistance of these four

fundamental configurations in the presence of an arbitrary load

RL. Then:
3. Ro is calculated in a real circuit (with Rsig & vsig) once load is

clearly identified.

v sig i i i

sig

i sig

A

R R R v v v v v v A + = × = = : Gain Overall

∞ →

= | : Gain loop

Open

L

R v vo

A A

SLIDE 6

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (6/26)

Fundamental Transistor Amplifier Configurations

We are considering only signal circuit here!

SLIDE 7

Possible BJT amplifier configurations

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (7/26)

Same as Common Base (vi does not change) Common-Base Common-Collector Common-Emitter with RE Not Useful Common-Emitter

SLIDE 8

PNP configurations are the same as those of NPN (because of similar small-signal model)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (8/26)

Common-Base Common-Collector Common-Emitter Common-Emitter Common-Base Common-Collector

SLIDE 9

MOS fundamental configurations are analogous to BJTs

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (9/26)

Common-Base Common-Collector Common-Emitter Common-Source Common-Gate Common-Drain

SLIDE 10

Common Emitter Configuration

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (10/26)

Signal Circuit: Signal Circuit with BJT SSM:

ro and R’L are in parallel
vπ = vi

SLIDE 11

Common Emitter Configuration (Av & Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (11/26)

π π

r i v R r v i

i i i i i

= = ⇒ = ) || ( ) || (

L

m

i

v

L

i

m

R

r g v v A R r v g v ′ − = = ′ − = By KCL

SLIDE 12

Common Source Configuration

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (12/26)

Signal Circuit: Signal Circuit with MOS SSM:

ro and R’L are in parallel
vgs = vi

SLIDE 13

Common Source Configuration (Av & Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (13/26)

∞ = = ⇒ =

i i i i

i v R i ) || ( ) || (

L

m

i

v

L

i

m

R

r g v v A R r v g v ′ − = = ′ − = By KCL

SLIDE 14

Common Source & Common Emitter Configurations are “similar”

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (14/26)

Signal Circuit Signal Circuit with transistor SSM

) || (

π

r R R r g v v A

i L

m

i

v

= ′ − = = ) || ( ∞ = ′ − = =

i L

m

i

v

R R r g v v A

Similar formula if we let

∞ →

π

r Note that Av & Ri are independent of vsig & Rsig

SLIDE 15

Common Emitter Configuration with RE

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (15/26)

Signal Circuit: Signal Circuit with BJT SSM:

SLIDE 16

Common Emitter Configuration with RE (Av & Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (16/26)

) / 1 )( / ( 1 ) / 1 )( / ( 1

π π π π

r R r R R r g r R r R r R R g R g v v A

E

L

E m i E

L

E m L m i

v

+ ′ + + ≈ + ′ + + ′ − ≈ = ) ( ) ( = − + − + ′ = − − − + − + − =

e i m

e
L
e

i m

e

i e E e e i

v v g r v v R v v v g r v v r v v R v v v v

π π

Node voltage method: Node ve Node vo

1. Add the two node equations to get

ve in terms of vo and vi

2. Substitute for ve in Node vo

equation to find vo and gain

3. Compute ii in terms of node
voltages. Then Ri = vi/ii
4. Lengthy calculations (See Notes).

SLIDE 17

Common Source Configuration with RS (Av & Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (17/26)

Signal Circuit Let

S E

R R r → ∞ →

π

) / 1 )( / ( 1 ) / 1 )( / ( 1

π π π π

r R r R R r g r R r R r R R g R g v v A

E

L

E m i E

L

E m L m i

v

+ ′ + + ≈ + ′ + + ′ − ≈ = ∞ = ′ + + ′ − ≈ =

i

L

S m L m i

v

R r R R g R g v v A ) / ( 1

SLIDE 18

Common Base Configuration (Gain)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (18/26)

Signal Circuit: Signal Circuit with BJT SSM:

) || ( ) || ( 1

L

m

v L

m

i

v

R r g A R r r r g v v A ′ ≈ ′ + = =

i

m

L

i

m

i
L
i

v r r g R r v v g r v v R v v v + = ′ = − + − + ′ − = 1 || ) (

π

Node voltage method: Node vo

SLIDE 19

Common Base Configuration (Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (19/26)

1 || ||

m

L

x

i

r g R r r R r R + ′ + = =

π π

m
x

i x L

x
m

i i L x

m

x i

r g R r i v R R r i r g v v v R i r v g i v + ′ + = = ′ + = + − = ′ + + = 1 ) ( ) 1 ( ) (

π π

KVL:

x i i i x i x i i x i i x i x

R r i v R R r v R v r v i r v i i v R || ||

π π π π

= = = + = + = = Define KCL: By KCL

SLIDE 20

Common Gate Configuration (Av & Ri)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (20/26)

Signal Circuit

1 || ) || (

m

L

i

L

m

i

v

r g R r r R R r g v v A + ′ + = ′ ≈ =

π

Let

∞ →

π

r

1 ) || (

m

L

i

L

m

i

v

r g R r R R r g v v A + ′ + = ′ ≈ =

SLIDE 21

Common Collector Configuration (Emitter Follower)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (21/26)

Signal Circuit: Signal Circuit with BJT SSM:

) || ( 1 ) || (

L

m

L

m

i

v

R r g R r g v v A ′ + ′ = =

i m i m m

m

L

i

m

i
L
i

v g v r g g v r g R r v v v g r v r v v R v v v v ≈         + =         + + ′ = − − + − + ′ − =

π π π π

1 1 1 1 || ) ( Node voltage method: Node vo 1 >> = β

π

r gm

v i i i v i

i

i

A r i v R A r v r v v i − = = − × = − = 1 ) 1 (

π π π

) || ( ) || (

L

L
m

i

R r r R r r g r R ′ + = ′ + = β

π π π

SLIDE 22

Common Drain Configuration (Source Follower)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (22/26)

Signal Circuit

) || ( ) || ( ) || ( 1 ) || (

L

L
m

i L

m

L

m

i

v

R r R r r g R R r g R r g v v A ′ = ′ = ′ + ′ = = β

π

Let

∞ →

π

r

∞ = ′ + ′ = =

i L

m

L

m

i

v

R R r g R r g v v A ) || ( 1 ) || (

SLIDE 23

BJT Basic Amplifier Configurations

(PNP circuits are identical)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (23/26)

Common Emitter

), || (

π

r R R r g A

i L

m

v

= ′ − =

Common Base

m

L

i

L

m

v

r g R r r R R r g A + ′ + = ′ = 1 || ), || (

π

Common Collector/ Emitter Follower

) || ( ) || ( 1 ) || (

L

i

L

m

L

m

v

R r r R R r g R r g A ′ + = ′ + ′ = β

π

) / 1 )( / ( 1 ) / 1 )( / ( 1

π π π π

r R r R R r g r R r R r R R g R g A

E

L

E m i E

L

E m L m v

+ ′ + + ≈ + ′ + + ′ − ≈

Common Emitter with RE

SLIDE 24

MOS Basic Amplifier Configurations

(PMOS circuits are identical)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (24/26)

Common Source with RS

, / 1 ∞ = ′ + + ′ − =

i

L

S m L m v

R r R R g R g A

Common Drain/Source Follower

, ) || ( 1 ) || ( ∞ = ′ + ′ =

i L

m

L

m

v

R R r g R r g A ), || ( ∞ = ′ − =

i L

m

v

R R r g A

Common Source Common Gate

m

L

i

L

m

v

r g R r R R r g A + ′ + = ′ = 1 ), || (

SLIDE 25

Observations of Transistor Amplifiers (1)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (25/26)
Common-Emitter has a high gain of and a

“medium” (several k).

Minus sign in the gain reflects a 180o phase shift in the output.
Common-Base also has a high gain of but a “low”

Ri (several hundred Ω) which significantly affects the overall circuit gain.

) || (

L

m

v

R r g A ′ − =

π

r Ri = ) || (

L

m

v

R r g A ′ ≈

Common-Source has a high gain of (but lower

than the BJT analog, CE amplifier). It has an infinite Ri.

Common-Gate also has a high gain of but a “low”

Ri (several hundred Ω).

) || (

L

m

v

R r g A ′ − = ) || (

L

m

v

R r g A ′ ≈

CE and CS configurations are the main gain cells in ICs. CB and CG configurations have superior high-frequency response (discussed in ECE102).

SLIDE 26

Observations of Transistor Amplifiers (2)

F. Najmabadi, ECE65, Winter 2013, Fundamental Amp Configuration (26/26)
Common-Emitter with RE has a much lower gain compared to a

CE amplifier (i.e., no RE ) but has a much larger Ri .

Amplifier gain is also much less sensitive to BJT parameters

(i.e., β).

It is used primarily in discrete circuits because it does not need

a by-pass capacitor (will be discussed later).

Common-Source with RS has a much lower gain compared to a CS

amplifier (i.e., no RS ). It has an infinite Ri .

Common-Collector (emitter follower) and Common-Drain (source

follower) configurations have a gain ≤ 1 . They have a large Ri (infinite for CD) and a low Ro (as we will see later). They are usually configured to get a gain close to 1 and used either as a “buffer” or as a “current amplifier” to drive a load.

*Buffers are discussed later in the context

f multi-stage amplifiers