Taming complex chip designs with beautiful diagrams Titouan Vervack - - PowerPoint PPT Presentation

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Taming complex chip designs with beautiful diagrams Titouan Vervack - - PowerPoint PPT Presentation

Aug 21, 2023 484 likes •936 views

EclipseCon Europe, Ludwigsburg 2017-10-24 Taming complex chip designs with beautiful diagrams Titouan Vervack redefine.digital.design: Helping you deal with complexity in VHDL and Verilog. Ghent 2 Sigasi 3 What do we do? Eclipse-based VHDL

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redefine.digital.design: Helping you deal with complexity in VHDL and Verilog.

EclipseCon Europe, Ludwigsburg

Taming complex chip designs with beautiful diagrams Titouan Vervack

2017-10-24

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Ghent

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Sigasi

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What do we do? Eclipse-based VHDL & SystemVerilog IDE

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Chip design

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Chip design

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Hardware Description Language (HDL)

entity and_or_top is Port( A : in bit; -- NAND gate input B : in bit; -- NAND gate input Q : out bit -- NAND gate output ); end and_or_top; architecture Behavioral of and_or_top is begin Q <= A nand B; -- 2 input NAND gate end Behavioral;

  • VHDL
  • (System)Verilog

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Graphical editors with HDL HDL code

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Graphical editors with HDL Graphical HDL code Generate

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Graphical editors with HDL Graphical HDL code Warnings & Errors Generate Compile

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Graphical editors with HDL Graphical HDL code Warnings & Errors Generate Compile

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Graphical editors with HDL Graphical HDL code Warnings & Errors Generate Compile

?

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Graphical editors with HDL

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Graphical editors with HDL

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Generate Graphical editors with HDL Graphical HDL code Warnings & Errors Compile

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Graphical editors with HDL Graphical HDL code Warnings & Errors Generate Compile

?

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Graphical editors with HDL Graphical view HDL code Warnings & Errors Generate Compile Navigate

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Graphical View of structure

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Text-based design with graphical views

ELK (Eclipse Layout Kernel) KlighD (Kieler Light Weight Diagrams) Graphviz DOT GEF & Zest

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Graphical <-> source interaction

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Graphical <-> source interaction

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Graphical <-> source interaction

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Graphical <-> source interaction

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Graphical <-> source interaction

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Text-based design with graphical views Perfect solution?

  • Cluttered
  • Too much detail (e.g. 20MB SVG file)
  • No focus

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Text-based design with graphical views

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Text-based design with graphical views

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UI configuration

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Goals:

  • Filtering
  • Mergable
  • Reproducible
  • Serializable
  • Simplify collaboration
  • Ability to highlight important parts

Text-based design with graphical views

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Our updated view HDL code

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Our updated view HDL code Warnings & Errors C

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p i l e Navigate

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Our updated view Graphical HDL code Warnings & Errors C

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p i l e Navigate G e n e r a t e Navigate

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Our updated view Graphical HDL code Warnings & Errors C

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p i l e Navigate G e n e r a t e Navigate DSL

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Our updated view Graphical HDL code Warnings & Errors C

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p i l e Navigate G e n e r a t e Navigate DSL

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Our updated view Graphical HDL code Warnings & Errors C

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p i l e Navigate G e n e r a t e Navigate DSL N a v i g a t e Compile

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Our updated view Graphical HDL code Warnings & Errors C

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p i l e Navigate G e n e r a t e Navigate DSL G e n e r a t e Navigate N a v i g a t e Compile

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Separate file:

  • Does not taint the original source code
  • Multiple views for one source

○ Clocking/reset structure ○ Data flow

  • Can be generated (group all wires between blocks)

DSL

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DEMO

Demo

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  • DSL is fully covered
  • UI: assume framework works
  • SVG export: font size differences are a challenge

Testing

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  • DSL is fully covered
  • UI: assume framework works
  • SVG export: font size differences are a challenge

Testing

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  • DSL is fully covered
  • UI: assume framework works
  • SVG export: font size differences are a challenge

Testing

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  • Use graphical views, not graphical editors
  • One on one projection is often not what you want
  • ELK + Xtext + Eclipse

Conclusion

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