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IWKS 3300: NAND to Tetris Spring 2019 John K. Bennett Course Introduction Foundations of Global Networked Computing: Building a Modern Computer From First Principles This course is based upon the work of Noam Nisan and Shimon Schocken. More

  1. IWKS 3300: NAND to Tetris Spring 2019 John K. Bennett Course Introduction Foundations of Global Networked Computing: Building a Modern Computer From First Principles This course is based upon the work of Noam Nisan and Shimon Schocken. More information can be found at (www.nand2tetris.org).

  2. Course at a Glance Objectives:  Understand how hardware and software systems are built, and how they work together  Learn how to break complex problems into simpler ones  Learn how large scale development projects are planned and executed  Have some fun in the process Methodology:  Build a complete, general-purpose working computer system  Play and experiment with this computer, at any level of interest

  3. Some Course Details  12 projects, generally intended to be completed by one or two students working together (pair programming)  Four hardware projects that are designed and developed using a logic design program (LogicCircuit), saved as HDL (Hardware Description Language), and tested using a hardware simulator and test script (part of the N2T tool suite).*  Eight software projects: one in “Hack” assembly, two in “Jack” (a Java-like high level language), and five software projects (Hack Assembler, Virtual Machine (two projects), and Jack Compiler (two projects)).  The five non-Hack/Jack software projects must be completed using C# / Visual Studio 2017 Community. I will also use this combination for all in-class examples. * The HDL can be translated into Structural VHDL using local software, synthesized using Xilinx Vivaldo, and executed on the Digilent BASYS 3/Artix 7 FPGA board.

  4. Some Course Details  Projects methodology:  Design (API) + test materials are given  Implementation completed using pair programming  Tools: simulators, tutorials, test scripts (from book authors), LogicCircuit (a free program for circuit design and simulation with JKB mods), Xilinx Vivaldo (a modern FPGA design suite), JKB’s HDL to VHDL translator, some VHDL scaffolding for screen, keyboard, etc., file comparators, etc.  Book: The Elements of Computing Systems: Building a Modern Computer from First Principles by Noam Nisan and Shimon Schocken (first 5 chapters locally modified)

  5. Course Trajectory (in reverse) Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy (Abstraction – implementation paradigm)

  6. Application Level: a simple game, e.g., Pong Ball abstraction Bat abstraction

  7. The Big Picture Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy

  8. High-level programming (in “Jack,” a Java -like language) /** A Graphic Bat for a Pong Game */ class Bat { field int x, y; // screen location of the bat's top-left corner field int width, height; // bat's width & height // The class constructor and most of the class methods are omitted /** Draws (color=true) or erases (color=false) the bat */ method void draw(boolean color) { do Screen.setColor(color); Typical call to an do Screen.drawRectangle(x,y,x+width,y+height); OS method return; } /** Moves the bat one step (4 pixels) to the right. */ method void moveR() { do draw(false); // erase the bat at the current location let x = x + 4; // change the bat's X-location // but don't go beyond the screen's right border if ((x + width) > 511) { Ball abstraction let x = 511 - width; Bat } abstraction do draw(true); // re-draw the bat in the new location return; } }

  9. Operating System Level (Jack OS, written in Jack) /** An OS-level screen driver that abstracts the computer's physical screen */ class Screen { static boolean currentColor; // the current color // The Screen class is a collection of methods, each implementing one // abstract screen-oriented operation. Most of this code is omitted. /** Draws a rectangle in the current color. */ // the rectangle's top left corner is anchored at screen location (x0,y0) // and its width and length are x1 and y1, respectively. function void drawRectangle(int x0, int y0, int x1, int y1) { var int x, y; let x = x0; while (x < x1) { let y = y0; while(y < y1) { Ball abstraction do Screen.drawPixel(x,y); Bat abstraction let y = y+1; } let x = x+1; } } }

  10. The Compiler Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy

  11. Modern Compilation Uses a Virtual Machine

  12. How Compilation Works Intermediate VM code > Source code push x push width Code if (x + width) > 511 parsing + 511 generation add push 511 gt x width Abstraction Syntax Parse Semantic Implementation Analysis Tree Synthesis Observations:  Modularity  Abstraction / implementation interplay  Each level’s implementation uses abstract services from the level below.

  13. The Virtual Machine (our VM is modeled after Java’s JVM) if ((x+width)> 511) { s2 memory (before) let x=511-width; ... 75 } width 450 450 ... sp // VM implementation x 75 push x // s1 ... push width // s2 s4 s5 s9 add // s3 1 511 push 511 // s4 525 sp 450 gt // s5 511 sp if-goto L1 // s6 sp goto L2 // s7 L1: s10 memory (after) push 511 // s8 ... push width // s9 61 sub // s10 sp width 450 ... pop x // s11 L2: x 61 ... ...

  14. Translating VM Code Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy

  15. Translating VM Code to Machine Code

  16. Executing Machine Code Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy

  17. Machine Language Semantics (on the Hack platform) Code semantics , as interpreted by the Hack hardware platform Instruction code Address (0=“address” inst.) Code syntax 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000000000000000 @0 1111110111001000 M=M-1 1 1 1 1 1 1 0 1 1 1 0 0 1 0 0 0 Instruction code ALU Destination Jump (1=“compute” inst.) operation code Code Code ( M-1 ) ( M ) ( no jump )  We need a hardware architecture that implements these semantics  The hardware platform must be designed to: o Decode instructions, and then, o Execute them.

  18. Computer Architecture ( Hack platform, approx.) instruction D Data Instruction ALU Memory A Memory data out (M) M data in address of next RAM(A) instruction Program load on jump Counter  A typical Harvard Architecture machine (not Von Neumann; why?)

  19. Building Hardware Abstract design Software Human abstract interface Thought hierarchy Chapters 9, 12 Compiler H.L. Language & abstract interface Chapters 10 - 11 Operating Sys. VM Translator Virtual abstract interface Machine Chapters 7 - 8 Assembly Language Assembler Chapter 6 abstract interface Computer Architecture Machine abstract interface Language Chapters 4 - 5 Gate Logic Hardware abstract interface Platform Chapters 1 - 3 Electrical Engineering Chips & Hardware Physics Logic Gates hierarchy

  20. Logic Design  Combinational (combinatorial) logic (leading to an ALU )  Sequential (clocked) logic (leading to a RAM, PC, Registers )  Putting the whole thing together (leading to a Computer ) Using … Nand gates NAND Truth Table

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