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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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T09: ETL Reference Design Overview (402.8.4) Artur Apresyan - - PowerPoint PPT Presentation
T09: ETL Reference Design Overview (402.8.4) Artur Apresyan - - PowerPoint PPT Presentation
T09: ETL Reference Design Overview (402.8.4) Artur Apresyan Fermilab US-MTD Technical Review 15-16 November 2018 Outline Introduction to ETL Technical requirements Description of mechanics, interfaces, dependencies Construction,
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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§ Associate scientist at Fermilab
§ L3: Endcap Timing Layer (ETL) in US-MTD § ETL Engineering in international MTD
§ CMS HCAL and ECAL offline reconstruction,
§ HCAL DQM development and maintenance, HCAL noise
working group, MET reconstruction
§ Quality assurance development and implementation
§ CDF: FPix QC framework at Purdue
§ Development of precision timing detectors
§ Multiple publications on timing detectors based on SiPM,
MCPs, and LGADs
§ DOE ECA award in 2018 to work on precision timing detectors § FNAL LDRD award in 2017 to work on LGAD sensors R&D
Biographical sketch
Charge #6
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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§ Particle flow reconstruction performance at high PU to comparable to Phase-1 CMS.
§ Extend the CMS physics reach in a broad class of new physics searches with long-lived
particles
§ Achieve radiation tolerance up to 2x1015 neq/cm2 at |η| = 3.0
§ Fluence is less than 1x1015 neq/cm2 for 80% of the ETL surface area
§ Channel occupancy below 10% to ensure small probability of double hits, needed for unambiguous time assignment
§ Channel size ~3mm2 in the highest η, and ~1 cm2 in lowest η
§ The ETL detector designed to be accessible for repairs and replacements of faulty components
§ Maintain an independent cold volume which is isolated and operated separately from
the HGCal
§ MIP Timing Layer HL-LHC Systems Engineering
§ https://cms-docdb.cern.ch/cgi-bin/DocDB/ShowDocument?docid=13536
ETL Design and Performance Specification
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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ETL Overview
Design Principle: Provide precision time resolution of 30-40ps while ensuring radiation tolerance to 4/ab.
“BTL” “ETL”
Barrel
“BTL” Within TST – 20mm thick Surface – 40 m2 Radiation level – 2E14 neq/cm2 Sensors: LYSO crystals + SiPMs
Endcaps
“ETL” On the CE nose – 42 mm thick Surface – 17.5 m2 Radiation level – 2E15 neq/cm2 Sensors: Si w/ internal gain - LGADs
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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§ Silicon sensors with specially doped thin region that produces high electric field à produces avalanche signal with 10-30 gain § Large community:
§ RD50 collaboration § Several manufacturers: CNM, FBK, Hamamatsu
§ Demonstrated time resolution ~30 ps up to 1x1015 neq/cm2, and about 40 psec up to 2x1015 neq/cm2 high uniformity
LGAD sensors
Charge #1,5
LGAD signal amplitude distribution is fitted to a Landau function. Particle detection efficiency across sensor surface FBK wafer with CMS- and ATLAS- sensors
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§ A unique ASIC will need to be developed to accomplish the needs
§ Radiation hard, 256 LGAD pixels per ROC, large area sensors § Measurement of time-of-arrival in every pixel with ~40 ps time resolution § Synchronization/calibration, drift of parameters due to radiation § Target: <4mW/channel, 12.5 μs storing capability + trigger matching readout
§ Design choice is to focus on TSMC 65nm
§ Vast experience in the community, shared expertise from libraries and rad. dam. studies
Readout ASIC
Charge #1,5
Schematic diagram of the first prototype ETROC
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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§ General structure
§ LGAD+ASIC assemblies mounted on Aluminium nitrate carrier plates § Groups of 12 sensors (each ~2x4 cm2) mounted on a common carrier § Flexible circuit wirebonded to ASICs, pigtail connectors connect to Readout PCB § Power and Readout PCB mounted on the same carrier § Dual-phase CO2 cooling is used to evacuate the heat § One lpGBT per module, VTrx+ to send data with optical link to backend
ETL Structure
Al wedge LGAD sensors Power PCB Readout PCB
CO2 cooling pipes
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- A. Apresyan – T09: ETL Reference Design Overview (402.8.4)
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§ General structure
§ LGAD+ASIC assemblies mounted on Aluminium nitrate carrier plates § Groups of 12 sensors (each ~2x4 cm2) mounted on a common carrier § Flexible circuit wirebonded to ASICs, pigtail connectors connect to Readout PCB § Power and Readout PCB mounted on the same carrier § Dual-phase CO2 cooling is used to evacuate the heat § One lpGBT per module, VTrx+ to send data with optical link to backend
ETL Structure
Al wedge LGAD sensors Power PCB Readout PCB
CO2 cooling pipes
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§ ETL detector will be placed on the nose of HGCal
§ Cover the range in 1.6<|η|<2.9 § Total silicon surface area of 17.5 m2 for the two Z-sides.
§ Total thickness of the ETL detector is ~42 mm,
§ Disks populated with modules on both sides § Independent cold volumes, and accessibility for ETL
ETL Structure
Charge #1
R=1.27 m R=0.31 m
2 ETL disks
Thermal screen is extracted there
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Interfaces and dependencies
Charge #7
§ There are a range of critical interfaces to be considered in the project
§ Mechanical: detector envelope is limited by the space available between HGCal and OT § Mechanical: Services passed through dedicated channels inside/outside HGCal § Electrical/optical: connector types and locations for cable flow volumes, power, bias
voltage, optical fibers, safety system sensors
§ Logical: data formats between ETROC and off-detector electronics, trigger and clock
distribution
§ Overall integration issues are the responsibility of the international MTD technical coordination team
§ Common CO2 cooing plant development for all CMS projects § Documentation and reviews of key specifications and interfaces § Engineering designs will be fully documented in CERN EDMS in advance of the
Engineering Design Reviews or Electronics System Reviews which will proceed construction of each major subsystem
§ Sign-off will be required from the project technical coordinator as well as the area
coordinators of the affected sections of the detector
§ Reviews will include the US-CMS project engineers and managers § CMS Technical Coordination workshop on October 29, 2018
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§ There is extensive knowledge about fabrication, installation, and
- peration of a silicon detectors in colliders
§ Modules are very similar to tracker and pixel detectors § Construction simpler than typical tracker detectors
§ ETL construction performed at assembly centers
§ Modules assembled with the use of an automated placement gantry, as for the
- riginal CMS tracker, and for HGCal.
§ Will reuse the existing facilities and expertise for the construction
§ The robotic assembly is simpler in ETL due to relaxed alignment tolerances and small number of components.
§ After curing of glue attaching the bump-bonded sensors to the AlN substrate, the
ASICs will be wire-bonded to the readout flex
§ The functionality of a single sensor assembly can be tested. § Good sensors will then be mounted into modules and retested.
§ An overnight burn-in and thermal test for each module. § Extensive long term stress testing on modules during pre-production
§ Repeated on a small number of modules during production
ETL Construction and Operation
Charge #2
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§ Full integration of the Dees occurs on the surface in the lab: only connection checkout underground
§ Modules shipped to CERN to populate
wedges
§ Modules will be mounted on wedges at CERN
in a lab equipped with a CO2 cooling plant, power, and DAQ infrastructure to test a wedge at cold temperatures.
§ Commission the ETL at the same coolant temperature as HGCAL
§ A cooling system common with HGCal
§ During detector operations
§ Assume always at -35 C CO2 exit temperature
(as other CO2-cooled systems in CMS), apart from during maintenance
§ FEA simulations demonstrate that silicon
sensors will kept at an operating temperature below −20 C
ETL Construction and Operation
Charge #2
Layout of the cooling loops inside a wedge Finite element model simulation of a section of the ETL support, displaying sensor temperatures
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§ The US-MTD community has been engaged in an active R&D to develop ETL
§ Continue contributing to the R&D phase until the production and assembly phase
- f the detector
§ The US is leading the development of the front-end ASIC design for the ETL readout, and will contribute funds to cover some fraction of the total ASIC purchase.
§ The US is responsible for design of ETL FE ASIC, including design, prototyping,
- verseeing production, and acceptance testing of all prototypes.
§ Module assembly R&D based on iteration of prototype components of ever increasing size and functionality
§ Driven by availability of components: prototype sensors, ASICs, lpGBT, etc
§ The ETL integration and commissioning tasks will take place at CERN and they will involve participation of the US and international MTD groups
§ ETL has defined the “baseline” required cross-sectional area for services § Working under coordination of the CMS Engineering & Integration group (Karl Gill)
ETL R&D plans
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§ Schedule is essentially two Phases
§ Prototyping and design revisions lasts until Q3 2023 § Module production starts Q4 2023, goes to Q3 2024
§ Complete Resource Loaded Schedule in P6
§ Fairly complete in terms of activities, both R&D and Production § Still finalizing details of various activities § C/S/R review will follow in January 2019
§ Details on schedule and milestones in Frank’s talk
Schedule and milestones
Charge #10
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§ Project governed by Fermilab Risk Management Plan § Risks are currently a work in progress
§ First Risk Workshop by external panel on Nov 8, 2018
Risks
Charge #4
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§ Value Engineering seeks to maintain same functionality at reduced cost either up front or during operations
§ Development of the LGAD sensors: leveraging LDRD funded R&D, INFN
and ATLAS collaboration for LGAD sensor productions, costs for irradiation and testing campaigns
§ Elements developed as common CERN projects, industry, or other CMS
- projects. These include the lpGBT, VTRx+, DC-to-DC converters, the e-link
protocol, ATCA crates and communication standards, and FPGA-controlled boards for the backend and trigger.
§ The front-end ASIC for the ETL detector is following closely the design
decisions of the ALTIROC developed for the ATLAS timing detector.
§ Reuse of the CO2 cooling plant at FNAL for testing of prototype modules
and the validation of cooling designs.
§ Use of SiDet facility at Fermilab for the construction ETL modules, which
has a wealth of resources for assembly and QC of silicon modules.
Value Engineering
Charge #5
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§ All ES&H aspects of the HL LHC CMS Detector Upgrade Project will be handled in accordance with the Fermilab Integrated Safety Management approach, and the rules and procedures laid out in the Fermilab ES&H Manual (FESHM)
§ The current construction plan involves no materials of identified
environmental risk: cooling plant is based on CO2 rather than Freon
§ Detector will use high voltage ( ~ 600 V) and will be operated in a refrigerated mode (-30°C), similar to OT and HGCal
§ Standard operational procedures will be developed and documented to
allow safe operation
§ R&D and some production testing will involve the use of gamma, neutron, and proton radiation.
§ These tests will be performed at commonly-used radiation facilities and
will follow the standard operational procedures defined at each facility
Environmental, Safety and Health
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§ Quality Assurance : Prevention of Issues
§ Prior to the production of ETL modules, several prototype rounds are planned
to identify potential problems and minimize the impact to cost or schedule:
§ A series of prototypes, both mechanical dummy and functional § Checkpoints/reviews in early production for prototypes to identify issues § Fixed procedures for construction, automation § Testing procedures: testbeams, integration testbeds, radiation testing
including operation of systems under irradiation as well as static dosing, thermal cycling tests
§ Quality control : Identification of issues
§ The procedure for module assembly and quality control will be developed during
prototyping period.
§ module components will be tested prior to the final assembly during production § Use databases to track all components through the assembly and testing processes § Verify that only good quality components (sensors, power and readout boards,
and ASICs) are assembled into modules.
§ QA workshop led by Carol: developed the QAP for FE ASIC
Quality Assurance and Quality Control
Charge #9
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§ The ETL detector design is advanced and has been documented in the CDR, and the TDR is currently being written by the CMS collaboration § US institutions are playing a significant role in the ETL § The project team has been working actively to identify and document risks, to define interfaces, and to structure the project appropriately in the P6 system for eventual efficient project management in the construction phase
Summary
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