Overview of the ATLAS Insertable B-Layer (IBL) Project Sebastian - - PowerPoint PPT Presentation

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Overview of the ATLAS Insertable B-Layer (IBL) Project Sebastian Grinstein (IFAE-Barcelona) For the ATLAS Collaboration 8 th International Hiroshima Symposium on the Development and Application of Semiconductor Tracking Detectors Academia

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SLIDE 1

“8th International Hiroshima Symposium on the Development and Application of Semiconductor Tracking Detectors” Academia Sinica, Nankang, Taipei -- 5th-8th December, 2011.

Overview of the ATLAS Insertable B-Layer (IBL) Project

Sebastian Grinstein

(IFAE-Barcelona) For the ATLAS Collaboration

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SLIDE 2
  • S. Grinstein (IFAE) - HSTD 2011

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Silicon strip Silicon pixel Straw tubes

ATLAS Overview

  • Central trackers in a solenoidal magnet
  • EM + hadronic calorimeters
  • Muon spectrometer in toroidal magnets

ATLAS Inner Detector

IBL

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SLIDE 3

ATLAS Pixel Detector

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  • S. Grinstein (IFAE) - HSTD 2011
  • Why pixels? Position resolution

Ø Critical for physics program (Higgs, SUSY searches, top,...)

  • ATLAS Pixel Detector

Ø 3 barrels + 6 disks inner layer radius: 50.5mm Ø 1744 modules, 80M channels Ø ~1.8 m2 active area, |η|<2.5

  • ATLAS Pixel Module

Ø 16 FE chips (FE-I3) + Controller Chip Ø 2880 channels/chip; 50 µm x 400 µm (50 µm x 600 µm between FEs) Ø Planar n-on-n DOFZ silicon, 256 µm thick Ø Designed for 1E15 1MeV neq/cm2 fluence

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SLIDE 4

Insertable B-Layer (IBL)

  • New (4th) pixel layer mounted

directly on beam-pipe

§ radius=33mm, |η|<2.5, 0.2m2 § ¡requires new (smaller) beam-pipe ¡

  • Reasons for IBL:

§ Back-up existing B-Layer (hard failures) § Improve physics performance (Based on smaller radius and low mass)

IBL Current pixel

Stringent requirements on sensor and front-end electronics

  • Need of larger and faster font-end chip
  • Better radiation hardness that current

detector

  • S. Grinstein (IFAE) - HSTD 2011 To be installed in 2013/14

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SLIDE 5

Insertable B-Layer (IBL)

  • Layout:

§ 14 Staves, each with 32 front-end chips § No overlap on Z due to space restriction § Operate at -15 C, CO2 cooling, Ti pipe

  • Front-end/Sensor Design:

§ NIEL dose = 5x1015 neq cm-2 (w/ safety factor) § Ionizing dose ≥ 250 Mrad § Small dead area (slim/active edge) § Max sensor power < 200 mW/cm2 @ -15 C § Max bias voltage: 1000V

  • Sensor Technology:

§ Planar n-on-n and 3D double sided being considered § 75% Planar and 25% 3D sensor layout:

Sensor facing beam

3D Planar 3D

  • S. Grinstein (IFAE) - HSTD 2011

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SLIDE 6

IBL: Font End Chip: FE-I4 (“A”)

FE-I4 Medipix FE-I3

size (um2) 50x250

Pixel array 80x336 Chip size (mm2) 20.2x19.0 Active fraction (%) 89 Analog/Digital current (uA/pix) 10/10 Analog/Digital voltage (V) 1.5/1.2 LVDS output (Mb/s) 160 Pixel sixe (um2) ToT Resolution 50 x 250 4-bit

  • Biggest chip in HEP to date
  • Higher active fraction (x6)

(than ATLAS predecessor)

  • Local memory cells (bus activity
  • nly on readout) → Lower power
  • Higher data rate
  • More radiation hard (130nm

technology)

Cc

Cf2 Cf1

Preamp Amp2 feedbox feedbox

Inj0 Inj1 injectIn

Cinj1 Cinj2

+

local feedback tune

FDAC

4 Bit

Vfb

+

local threshold tune

TDAC

5 Bit

Vfb2

+

  • HitOut

NotKill

Vth

ToT

  • Pixel above threshold
  • Time over threshold

(~collected charge)

  • S. Grinstein (IFAE) - HSTD 2011

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SLIDE 7

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Planar Pixel Sensors for the IBL

  • Proven technology current ATLAS detector: n-on-n pixels (DOFZ silicon)
  • Bias grid to evaluate sensor quality before bump-bonding
  • Thinner substrate (200um, was 250um)
  • Slim edge design (~200um, was 1mm)
  • Guard rings on p-side shifted beneath outer pixels

(longer outer pixels to keep sensor length design)

  • Distorts electric field on the sensor edge, but charge collection after

irradiation dominated by region directly beneath implant

500um long pixel ~200um inactive edge 250um

Two FE-I4 chip IBL planar sensor tile

Vendor: CiS-Germany

  • S. Grinstein (IFAE) - HSTD 2011
  • D. Muenstermann

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SLIDE 8

3D Pixel Sensors

  • Pixel electrodes penetrate into the substrate:

depletion region grows parallel to wafer surface

  • Double sided process, p-bulk 230um thick,

(FZ high resistivity wafers)

  • Two vendors producing IBL 3D sensors with

same specifications: CNM (Spain) and FBK (Italy) CNM 3D IBL sensors:

  • 210um columns
  • 3D Guard ring + fences (200um)
  • Evaluate sensor quality on GR

200um

Probe pad for quality assurance 3D Guard ring p+ implant (fences)

  • S. Grinstein (IFAE) - HSTD 2011
  • G. Pellegrini

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SLIDE 9

3D Pixel Sensors

FBK 3D IBL sensors:

  • Pass-through columns
  • 200um inactive edge fences
  • Evaluate sensor quality with temporary metal on each row of pixels (strip)

200um slim edge

Cut-line Junction columns

Ohmic columns Temporary metal probing pads

  • S. Grinstein (IFAE) - HSTD 2011

G-F. Dalla Betta

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SLIDE 10
  • S. Grinstein (IFAE) - HSTD 2011

IBL Sensor Selection

Planar and 3D sensors have to meet wafer quality (bow, thickness tolerance, etc) and electrical specifications (leakage current, Vbreak)

Planar: Vbreak > 60V

10nA 50V FBK Sensor IV for 80 strips CNM Sensors

CNM: leakage current along the GR region

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SLIDE 11

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Bump-Bonding

  • To reduce the amount of inactive material, FE-I4 are thinned to 90um
  • Through the bump-bonding process the bowing of the thinned chip can

cause unconnected pixels

  • Production of dummy sensors and chips to carry out bump-bonding studies

FE-I4 Sensor

2 pixels shorted

FE-I4 Chip

10 pixels shorted Test pads

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FEI4-8, 12 bad chains

Chip Substrate CNM

  • S. Grinstein (IFAE) - HSTD 2011

Problematic areas identified at Barcelona

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SLIDE 12
  • S. Grinstein (IFAE) - HSTD 2011

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Bump-Bonding

  • At IZM (Germany) the thinned chip (90um) is attached to a

glass support during the heating step of the bonding cycle

  • Glass support laser-removed after cycle

completed

  • Successfully used in IBL pre-production

modules

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SLIDE 13
  • S. Grinstein (IFAE) - HSTD 2011

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IBL Module

  • First single chip

modules mounted

  • Temporary pigtail will be cut

and replaced by flex wing

FBK 3D Device Planar Module

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SLIDE 14
  • S. Grinstein (IFAE) - HSTD 2011

Planar device Before annealing

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Irradiated IBL Devices

3D FBK Device p-irr 5E15 neq/cm2

  • Planar devices irradiated to

IBL fluencies comply with the power dissipation limits at 1000V bias

  • For 3D devices (here FBK)

irradiated to IBL fluencies power dissipation is not a constraint Several planar and 3D IBL devices irradiated to IBL fluencies (5E15 neq/cm2)

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SLIDE 15

Device Performance

  • Irradiated and non-irradiated devices characterized before test-beams
  • Study of lowest operational threshold of devices

Planar Planar 4E15 n-irr Threshold distribution Difficult to go to lower threshold

Low threshold operation possible for irradiated devices:

  • S. Grinstein (IFAE) - HSTD 2011

FBK 5E15 p-irr 1500e threshold used at test-beams FBK 5E15p-irr Noise ~140e

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Ø Operation at ~1500e threshold possible

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SLIDE 16
  • S. Grinstein (IFAE) - HSTD 2011

Device Performance

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Noise increase with bias voltage: 3D p-irradiated devices (5E15neq/cm2) Ø So does charge collection: which is the optimal bias voltage for 3D devices?

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SLIDE 17
  • S. Grinstein (IFAE) - HSTD 2011

Optimal voltage for CNM 5E15neq/cm2 irradiated devices ~ 160V

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Device Performance

  • Optimal high voltage for 3D CNM devices ~160V (~150V for FBK)
  • For planar devices limited by electrical constraints to 1000V
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SLIDE 18
  • S. Grinstein (IFAE) - HSTD 2011
  • Pixel efficiency map
  • Low threshold operation (1500e)
  • Noisy, dead pixels masked out
  • Efficiency determined from

extrapolated track on devices

  • Efficiencies comply with IBL

requirements

Test-beam Results

~215 um 500 um long edge pixel

Planar

n-irr 4E15 neq/cm2 Bias = 1000V, phi = 15° Overall efficiency = 99.0 %

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P r e l i m i n a r y

3D design (CNM) CNM81 n-irr 5E15 160V, 0 deg FBK13 Unirradiated 20V, 0 deg

ε=97.5% ε=98.8%

3D

Ø More results: Igor Rubinsky’s talk

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SLIDE 19

Summary

  • ATLAS plans to insert a 4th layer (IBL) in 2013/14
  • Planar and 3D pixel technologies being evaluated for IBL

– 75% planar + 25% 3D layout being investigated

  • Planar and 3D devices within the IBL requirements have been

produced

– Both technologies well developed – Inactive edges of ~ 200 um – High efficiency (>97%) after irradiation (5E15 neq/cm2) has been achieved (see also Igor R. talk)

  • Final planar and 3D sensor productions underway
  • S. Grinstein (IFAE) - HSTD 2011

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SLIDE 20

Back-up Slides

  • S. Grinstein (IFAE) - HSTD 2011

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SLIDE 21
  • S. Grinstein (IFAE) - HSTD 2011

Irradiation of IBL Devices

  • Several planar and 3D IBL devices irradiated to IBL

fluencies (5E15 neq/cm2):

  • Proton irradiation at KIT (beam energy 23 MeV)

ü Estimated TID dose ~ 750Mrad (IBL requirement: 250Mrad)

  • Neutron irradiation at Ljubljana
  • Devices annealed: 120min at 60C for test-beam

3D devices

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SLIDE 22
  • S. Grinstein (IFAE) - HSTD 2011

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LHC and ATLAS Upgrade Plans

Integrated Luminosity Year

LS 1 2013/14 ~2017 ~2022 7 TeV 14 TeV

1027 → 2x1033cm-2s-1

→ 1x1034cm-2s-1

1x1034 → ~2x1034cm-2s-1

Now ~10 fb-1 ~50 fb-1 ~300 fb-1 3000 fb-1

→ 5x1034cm-2s-1

LS 2 LS 2

[Based on T. Kawamoto, TIPP2011]

IBL New ID

(ATLAS pixel-related upgrades) Ø LHC has plans upgrades (increasing luminosity) to ultimately collect ~3000/fb Ø ATLAS needs to maintain excellent position resolution (vertexing, tracking)