OF DC-I SOLATED G ATE D RIVERS Alon Blumenfeld, Alon Cervera, and - PowerPoint PPT Presentation

A NALYSIS AND D ESIGN OF DC-I SOLATED G ATE D RIVERS Alon Blumenfeld, Alon Cervera, and Shmuel (Sam) Ben-Yaakov Power Electronics Laboratory Department of Electrical and Computer Engineering Ben-Gurion University of the Negev 1 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Motivation - Existing Solutions C s C s + + 1. Transformer Drive V float 2. Opto-Coupler Drive 3. Floating power drivers 2 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Motivation A PV Panel’s I-V characteristics for various Insolation levels 𝑄 𝑀 [w] 450 400 150W • Shading differences have 350 300 a major impact on serially 250 connected PVs 200 150 • Panels with different light 100 3 Serial Connected PVs exposures connected in series 50 With Bypass Diodes 0 can’t all be in MPP 𝑊 𝑀 [ 𝑊 ] 0 20 40 60 80 3 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Motivation • A voltage equalization method was examined offering a suitable solution for the shading problem EQSCC η I D With EQSCC 100% I O 97% 95% PV 1 I D C sw 80% 78% I L I S 66% PV 2 65% Irradiance Ratio 60% 0 0.25 0.5 0.75 1 I D Theoretical and experimental efficiency curves for 2 panels, I L The EQSCC one with irradiation swept from 0% to 100% 4 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

The Problem • SCC based equalization system demanded a technique for driving floating source transistors EQSCC V gs I D I O PV 1 OFF ON t I D C sw I L V g I S PV 2 V BUS ON OFF I D t I L • This demand lead to investigate an alternative coupling methods at a DC-voltage reference MOSFETs 5 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

DC-Isolation – The concept • Drive isolation while using DC restoration is a well known method C s C s + + Drive • This work explores the characteristics and problems of the DC restoration solution without using a transformer C s + Drive 6 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

DC-Isolation – The concept • The DC restoration is practical when the source is EQSCC connected to a stable DC voltage I D S I O C s + PMOS PV 1 C s Drive NMOS I D + C sw I L S I S Drive PV 2 • The diode restores the needed I D DC by clamping the gate to the I L source during ‘off’ times 7 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Basic Implementation 1. Bleeder resistor, allows C S voltage to follow changes in V BUS 2. Series gate resistor, damps the drive circuit 3. C loop capacitor, minimizes the ground loop impedance V Cs =V BUS -V DRIVE V Cs =V BUS C s D R s R bleed S PMOS D G R s G C s D NMOS S R bleed D Drive Drive C loop V BUS V BUS C loop L stray L stray 8 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Current path C s • During ON: R s D NMOS R bleed BUS On C loop C s R s • During OFF: D NMOS R bleed BUS Off C loop 9 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Current path • During transients in V BUS : C s D R s C s D R s G G D D NMOS NMOS S R bleed S R bleed V BUS V BUS Drive Drive C loop C loop L stray L stray V BUS decrease V BUS increase 10 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Design Considerations – DC-Restorer • C S – Chosen according to the maximum allowable voltage ripple: 𝐷 𝑡 ≥ 𝑅 𝑕𝑏𝑢𝑓 Δ𝑊 𝐷 𝑇 • C loop - Chosen according a maximum allowed 𝛦𝑊 𝐷 𝑚𝑝𝑝𝑞 ripple: 𝐷 𝑚𝑝𝑝𝑞 ≥ 𝑅 𝑕𝑏𝑢𝑓 Δ𝑊 𝐷 𝑚𝑝𝑝𝑞 • R bleed – Designed to allow C S follow transients in V BUS , yet not discharge during ‘on’ periods: 𝑈 𝑢𝑠𝑏𝑜𝑡𝑗𝑓𝑜𝑢 > 𝑆 𝑐𝑚𝑓𝑓𝑒 𝐷 𝑇 ≫ 0.5𝑈 𝑇 11 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Design Considerations – DC-Restorer • R S – Selected such that the drive circuit’s harmonic quality factor value will be smaller than 0.5: 𝑆 𝑡 ≪ 𝑈 𝑡 𝑊 𝑕𝑡 2𝑅 𝑕 𝑀 𝑆 𝑡 > 2 ⋅ 𝐷 𝑡 • P loss – Can be estimated according to supply voltage, switching frequency and the gate charge: 𝑄 𝑚𝑝𝑡𝑡 = 𝑊 𝑡𝑣𝑞𝑞𝑚𝑧 𝑅 𝑕 𝑔 12 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Simulations C S R s 470nF 3.3 Ω Measurement of V GS , with and R bleed C gs 1.5k Ω 5nF without C loop Drive V BUS 0.05 Ω C gs R bleed 5nF C S 1.5k Ω C loop • Extra offset occurs in V GS 470nF V transient 4.7µF R s preventing the ‘off’ levels L stray 3.3 Ω 100nH from reaching zero V gs (NMOS) 15 Without C loop 10 5 • The diode charges C s so 0 With C loop that V gs >-0.7 V gs (PMOS) 0 With C loop • Negative overshoots cause -5 -10 excess charge on C s Without C loop -15 5.815 5.82 5.825 5.83 5.835 Time (ms) 13 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Simulations C S R s 3.3 Ω 470nF Recovery from transients in V BUS R bleed C gs 1.5k Ω 5nF Drive V BUS 0.05 Ω C gs • V BUS falls: C S discharges through R bleed R bleed 5nF C S C loop 1.5k Ω 470nF V transient 4.7µF • V BUS rises: R s L stray 3.3 Ω 100nH – C S charges rapidly V BUS 5.2 5.1 through D 5.0 49.5 V gs (PMOS) – Excess charge due 0 to stray inductance -5 -10 is slowly discharged -15 through R bleed V gs (NMOS) 5 0 Time (ms) 14 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Experimental Study • Drivers: Inverting low side MIC4426 drivers • SCC: flying capacitor • DC Restorers: Passive components C loop (C7-C10) were connected close to the source and the driver GND 15 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Experimental Study EQSCC I D • Voltage equalization I O system based SCC PV 1 I D C sw I L I S PV 2 I D I L 16 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Experimental Results C GD • CH1: V gQ1 (N-MOS) • CH2: V gQ2 (P-MOS) OFF ON • CH3: V gQ3 (N-MOS) ON OFF OFF ON • CH4: V gQ4 (P-MOS) ON OFF • D4: U2-OUTB • D4: U2-OUTA • D4: U1-OUTB • D4: U1-OUTA V BUS ≈ 22v 17 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Conclusions • Simple low-side drivers can properly drive floating DC referred MOSFETs • The method could be adapted for any DC referred MOSFET by suitable passive circuitry design • The proposed solution may help in reducing costs without penalties in efficiency 18 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12

Thank You for Your Attention! Ben-Gurion University of the Negev – Power Electronics Laboratory November 12 19

Appendix – Half-bridge driver • Most H-B drivers use a bootstrap EQSCC I D capacitor - C b • High-side operation relies on that I O switch’s source reaching ground PV 1 potential for C b to charge • The two upper switches in our case I D C sw I L can not be operated by this method I S PV 2 I D I L 20 Ben-Gurion University of the Negev – Power Electronics Laboratory November 12