/ Ge and On the control of GeO 2 / Ge and metal/ Ge interfaces - - PowerPoint PPT Presentation

▶
ge and on the control of geo 2 ge and metal ge interfaces
SMART_READER_LITE
LIVE PREVIEW

/ Ge and On the control of GeO 2 / Ge and metal/ Ge interfaces - - PowerPoint PPT Presentation

Mar 17, 2023 26 likes •278 views

On the control of GeO 2 / Ge and On the control of GeO 2 / Ge and metal/ Ge interfaces metal/ Ge interfaces toward metal source/ drain Ge CMOS toward metal source/ drain Ge CMOS Akira Toriumi Department of Materials Engineering The

slide-1
SLIDE 1

March 6, 2008 JST-DFG WSP, A. Toriumi 1

Akira Toriumi Department of Materials Engineering The University of Tokyo Tokyo, Japan toriumi@material.t.u-tokyo.ac.jp

On the control of GeO On the control of GeO2

2/ Ge and

/ Ge and metal/ Ge interfaces metal/ Ge interfaces toward metal source/ drain Ge CMOS toward metal source/ drain Ge CMOS

slide-2
SLIDE 2

March 6, 2008 JST-DFG WSP, A. Toriumi 2

New things are not always healthy. New things are not always healthy.

What is a promising candidate for non-Si Materials?

We have to take account of not only channel but also contact.

Si CMOS Si CMOS photon, photon, qbit qbit non non-

  • Si Materials

Si Materials spin, phase spin, phase 2007 2050

gap gap

non non-

  • Si Materials

Si Materials

slide-3
SLIDE 3

March 6, 2008 JST-DFG WSP, A. Toriumi 3

Si

Si

Si

Ｓｉ Microelectronics Research will end in 2015.

What is the Problem in Si ? What is the Problem in Si ?

Si microelectronics is in the metabolic syndrome

Requirements for something new Requirements for something new in the next step in the next step

Material should be simple. Material should be simple. Operation principle should be simple. Operation principle should be simple. Process should be simple. Process should be simple.

Si Si

slide-4
SLIDE 4

March 6, 2008 JST-DFG WSP, A. Toriumi 4

  • 1. Background and Objective

Why Ge now ?

  • 2. Ge MIS

GeO desorption Ge/GeO2 MIS Capacitors

  • 3. Ge Schottky

Fermi-level Pinning Ohmic contact to n-Ge

  • 4. Ge-CMOS

p-MOSFET n-MOSFET

  • 5. Conclusions

Outline Outline

slide-5
SLIDE 5

March 6, 2008 JST-DFG WSP, A. Toriumi 5

D evice Sca ling Low Pow er FinFET,QW FinFET,QW 3 D Struct ure 3 D Struct ure M inia t uriza t ion M inia t uriza t ion Pla na r, FD - SOI Pla nar, FD - SOI M at eria ls M at eria ls Ge, I I I - V, CN T Ge, I I I - V, CN T

Fin FET SOI Si

Ge - FinFET

SiGe Ge

Electron Devices in the Next Step Electron Devices in the Next Step

slide-6
SLIDE 6

March 6, 2008 JST-DFG WSP, A. Toriumi 6

  • 1. Background and Objective

Why Ge now ?

  • 2. Ge MIS

GeO desorption Ge/GeO2 MIS Capacitors

  • 3. Ge Schottky

Fermi-level Pinning Ohmic contact to n-Ge

  • 4. Ge-CMOS

p-MOSFET n-MOSFET

  • 5. Conclusions

Outline Outline

slide-7
SLIDE 7

March 6, 2008 JST-DFG WSP, A. Toriumi 7

Demand for High Quality GeO Demand for High Quality GeO2

2/Ge Interface

/Ge Interface High-k/ Si

GeO2/Ge is thermodynamically unstable.

“high-quality” GeO2/ Ge ?

High-k/ Ge

SiO2 interface layer is inevitable for good device characteristics.

An appropriate High-k ?

Ge

metal High-k GeO2

  • K. Kita et al., APL 85 (2004)
slide-8
SLIDE 8

March 6, 2008 JST-DFG WSP, A. Toriumi 8

C C-

  • V Characteristics of GeO

V Characteristics of GeO2

2/

/SiO SiO2

2/Si MIS

/Si MIS

GeO2 / SiO2 / Si (N2 annealing at 600oC)

GeO2

Si

SiO2 (5nm) Au

  • 3
  • 2
  • 1

1 2 0.0 0.1 0.2 0.3 0.4 13.4 nm 9.8 nm 4.8 nm Capacitance (μF/cm

2)

Gate Voltage (V)

  • H. Nomura et al., IWDTF 2007
slide-9
SLIDE 9

March 6, 2008 JST-DFG WSP, A. Toriumi 9

C C-

  • V Characteristics of GeO

V Characteristics of GeO2

2 MIS Capacitors

MIS Capacitors

10nm-thick sputtered GeO2 after N2 annealing at 600oC

  • 3
  • 2
  • 1

1 2 0.0 0.2 0.4 0.6 0.8 1.0

  • n Si
  • n SiO2/Si
  • n Ge

Normalized Capacitance (C/CMAX) Gate Voltage (V)

freq.= 1MHz

  • K. Kita et al., ECS Trans. 3 (2007)
slide-10
SLIDE 10

March 6, 2008 JST-DFG WSP, A. Toriumi 10

GeO2 (25nm)

Evidence of GeO Volatilization from GeO Evidence of GeO Volatilization from GeO2

2/Ge

/Ge

Thermal desorption spectroscopy （TDS）

400 500 600 700 800 2 4 6 8 10

GeO from GeO from

Intensity (arb.unit)

GeO2/SiO2 GeO2/Ge

Temperature (

  • C)

Si

GeO2 (25nm) SiO2 (30nm) Ge (15nm)

GeO2/ Ge

Si

SiO2 (30nm)

GeO2/ SiO2

m (GeO) = 86,88,89,90

  • S. Suzuki et al., SSDM 2007
slide-11
SLIDE 11

March 6, 2008 JST-DFG WSP, A. Toriumi 11

Suppression of GeO Suppression of GeO Desorption Desorption by Si Cap by Si Capping ping

Si capping layer can suppress GeO volatilization.

Ge

Si (10nm)

GeO2 (25nm)

Si cap layer

20 40 60 80 5 10 15 20 25 30 GeO2/Ge WITH Si cap GeO2/Ge WITHOUT Si cap GeO2 Thickness (nm) Annealing Time (sec)

N2 anneal at 600oC

slide-12
SLIDE 12

March 6, 2008 JST-DFG WSP, A. Toriumi 12

Dramatic Improvement of GeO Dramatic Improvement of GeO2

2/Ge MIS

/Ge MIS Characteristics with Cap Characteristics with Capping ping Layer Layer

（~ 25nm-thick GeO2，after N2 600oC anneal）

(1MHz)

  • 6
  • 4
  • 2

2 4 6

0.00 0.05 0.10 0.15 0.20

GeO2/Ge with Conventional PDA

GeO2/Ge with NiSix Cap

Capacitance (μF/cm

2)

Gate Voltage (V)

  • S. Suzuki et al., SSDM 2007
slide-13
SLIDE 13

March 6, 2008 JST-DFG WSP, A. Toriumi 13

  • 1. Background and Objective

Why Ge now ?

  • 2. Ge MIS

GeO desorption Ge/GeO2 MIS Capacitors

  • 3. Ge Schottky

Fermi-level Pinning Ohmic contact to n-Ge

  • 4. Ge-CMOS

p-MOSFET n-MOSFET

  • 5. Conclusions

Outline Outline

slide-14
SLIDE 14

March 6, 2008 JST-DFG WSP, A. Toriumi 14

Strong Fermi Strong Fermi-

  • level Pinning at Metal/Ge

level Pinning at Metal/Ge

Metal/Ge

CB VB 3 4 5 6

Energy level from vacuum level (eV)

Er Er Y Yb b Zr Zr

Metal

La,Sc La,Sc Hf Hf Al Al Au Au P Pt t Ni Ni Ti Ti Y Y Vacuum Level

Metal/Si

CB VB

Metal/Ge

CB VB 3 4 5 6

Energy level from vacuum level (eV)

Er Er Y Yb b Zr Zr

Metal

La,Sc La,Sc Hf Hf Al Al Au Au P Pt t Ni Ni Ti Ti Y Y Vacuum Level

Metal/Si

CB VB

Metal/Si

CB VB

  • T. Nishimura et al., APL (2007)

EG(Ge) EG(Si)

1) Metal source/drain 2) Low ohmic contact resistance

p-Ge

n+

slide-15
SLIDE 15

March 6, 2008 JST-DFG WSP, A. Toriumi 15

  • 1. Forming gas annealing

Metal: Al

(annealing temp. 200~500ºC)

  • 2. Germanide reaction

Metal: Er, Ni

(annealing temp. 200~500ºC)

  • 3. Substrate orientation

Metal: Ni

(Orientation:(100), (110), (111))

Interface Modulation Effects Interface Modulation Effects

5 4 3 VB Effective work function (eV) CB

  • without modulation

■ with modulation vacuum metal WF Al Er Ni Ni Y Al Au

FG MGex Sub. GeOx

(110) (111) (100)

Ev Ec

slide-16
SLIDE 16

March 6, 2008 JST-DFG WSP, A. Toriumi 16

Ge(100) NiGe

XTEM of NiGe/ Ge(100) I nterface XTEM of NiGe/ Ge(100) I nterface

Still Strong Fermi level Pinning even after Reaction

slide-17
SLIDE 17

March 6, 2008 JST-DFG WSP, A. Toriumi 17

Metal dependent VFB

  • 3
  • 2
  • 1

1 0.0 0.2 0.4 0.6 0.8 1.0 Capacitance (μF/cm

2)

Gate Voltage (V)

Al Au

Metal Ge Al2O3

1MHz

Unpinned Ge MIS Capacitor Unpinned Ge MIS Capacitor

No Fermi Level Pinning thanks to Insulator Insertion No Fermi Level Pinning thanks to Insulator Insertion

Al2O3 5nm

slide-18
SLIDE 18

March 6, 2008 JST-DFG WSP, A. Toriumi 18

Possible Origin of Fermi Possible Origin of Fermi-

  • level Pinning

level Pinning

Metal-induced Gap States (MIGS) Formation

Metal wave function penetration Ge intrinsic properties

CBE VBE

Ge Scalc Sexp 0.02 0.04***

* * * W. Monch; JVST. B 17 (1999) 1867.

Ge 4.63** 4.58 eV 4.48* Branch Point CNL (This work)

* J. Tersoff; PRL 32 (1984) 465. * * M. Cardona and N. Christensen; PRB 35 (1987) 6182.

CNL

  • T. Nishimura et al., APL (2007)
slide-19
SLIDE 19

March 6, 2008 JST-DFG WSP, A. Toriumi 19

  • 1

1 0.3 nm V (V)

w/o

  • 1

1 10

  • 4

10

  • 2

10 10

2 0.3 nm

Current (A/cm

2)

V (V)

w/o

n-Ge p-Ge

Ge

Al Ultra-thin Al2O3

Ge

Al

  • 1

1 20 40

  • 1

1 20 40

I I-

  • V

V Characteristics Characteristics @Al/Ge

@Al/Ge

  • T. Nishimura et al., submitted.
  • 1

1 20 40

  • 1

1 20 40

slide-20
SLIDE 20

March 6, 2008 JST-DFG WSP, A. Toriumi 20

  • 1. Background and Objective

Why Ge now ?

  • 2. Ge MIS

GeO desorption Ge/GeO2 MIS Capacitors

  • 3. Ge Schottky

Fermi-level Pinning Ohmic contact to n-Ge

  • 4. Ge-CMOS

p-MOSFET n-MOSFET

  • 5. Conclusions

Outline Outline

slide-21
SLIDE 21

March 6, 2008 JST-DFG WSP, A. Toriumi 21

  • 1.0
  • 0.5

0.0 5 10 15 20

0 V

  • 0.2 V
  • 0.4 V

Is (μA) Vds (V)

Vgs-Vth = -0.8 V

  • 0.6 V

W/L=530 μm/ 190 μm

p-MOSFET GeO2

  • 1.0
  • 0.5

0.0 5 10 15 20

0 V

  • 0.2 V
  • 0.4 V

Is (μA) Vds (V)

Vgs-Vth = -0.8 V

  • 0.6 V

W/L=530 μm/ 190 μm

p-MOSFET GeO2

Metal source/ drain Metal source/ drain p p-

  • ch

ch Ge MOSFET Ge MOSFET

n-Ge PtGe FUSI LYO or GeO 2 n-Ge PtGe FUSI GeO2

Metal source/ drain p-ch Ge(100) MOSFET

No I mpurity Doping !

  • T. Takahashi et al., iedm2007
slide-22
SLIDE 22

March 6, 2008 JST-DFG WSP, A. Toriumi 22

[1] P. Zimmerman et al., IEDM 2006, 655, [2] W. Zhu et al., IEEE Trans. on Electron Devices 51, 98 (2004)

I nversion Hole mobility of Ge MOSFET I nversion Hole mobility of Ge MOSFET

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

μ

h (cm 2

/Vs) N

s (/cm 2

)

peak mobility w/ corｒ. [2] GeO2/Ge (this work) [1]

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

μ

h (cm 2

/Vs) N

s (/cm 2

)

peak mobility w/ corｒ. [2] GeO2/Ge (this work) [1]

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

μ

h (cm 2

/Vs) N

s (/cm 2

)

peak mobility w/ corｒ

μ

h (cm 2

/Vs) N

s (/cm 2

)

peak mobility w/ corｒ. [2] GeO2/Ge (this work) [1]

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

. [2] GeO2/Ge (this work) [1]

GeO2/Ge LaYO3/Ge

w/o correction w/o correction

SiO2/Si

0.0 5.0x10

11 1.0x10 12 1.5x10 12

100 200 300 400

μ

h (cm 2

/Vs) N

s (/cm 2

) μ

h (cm 2

/Vs) N

s (/cm 2

)

peak mobility w/ corｒ. [2] GeO2/Ge (this work) [1]

slide-23
SLIDE 23

March 6, 2008 JST-DFG WSP, A. Toriumi 23

Metal Source/ Drain Metal Source/ Drain Ge n Ge n-

  • FETs

FETs

p-Ge Al Au GeO2 p-Ge Al Au GeO2 p-Ge Al Au GeO2

  • T. Takahashi et al., iedm2007

Schottky-Ohmic conversion with ultra-thin GeOx

No I mpurity Doping !

0.0 0.5 1.0

  • 5
  • 10
  • 15
  • 0.2 V

0 V 0.2 V 0.4 V

Is (μA) Vds (V)

Vgs-Vth = 0.6 V

W/L=530 μm/ 190 μm

n-MOSFET GeO2

10 nm

Al

GeOx (~2 nm)

Ge

slide-24
SLIDE 24

March 6, 2008 JST-DFG WSP, A. Toriumi 24

  • 1. Background and Objective

Why Ge now ?

  • 2. Ge MIS

GeO desorption Ge/GeO2 MIS Capacitors

  • 3. Ge Schottky

Fermi-level Pinning Ohmic contact to n-Ge

  • 4. Ge-CMOS

p-MOSFET n-MOSFET

  • 5. Conclusions

Outline Outline

slide-25
SLIDE 25

March 6, 2008 JST-DFG WSP, A. Toriumi 25

Conclusions Conclusions

Origin of deterioration in GeO2/ Ge MI S is due to GeO desorption. GeO2/ Ge MI S can be dramatically improved by suppressing GeO volatilization with NiSi cap layer. Origin of FLP at Metal/ Ge is attributable to metal-induced gap states (MI GS). Ultra-thin dielectric film insertion into metal/ Ge can shift MI GS-related CNL. Metal source/ drain Ge CMOS is coming soon.