Noise Characteriza.on and Filtering in the MicroBooNE LArTPC JINST - - PowerPoint PPT Presentation
Noise Characteriza.on and Filtering in the MicroBooNE LArTPC JINST 12 (2017) no. 08, P08003 Jyo. Joshi Brookhaven Na.onal Laboratory DUNE FD DAQ Design Workshop, 10/30/2017 Outline * Introduc:on * Iden:fica:on of different noise sources
Brookhaven Na.onal Laboratory
DUNE FD DAQ “Design” Workshop, 10/30/2017
JINST 12 (2017) no. 08, P08003
* Introduc:on * Iden:fica:on of different noise sources * SoBware Noise filtering * Impact of Noise filtering
* Status of Readout Channels
* Residual Noise Level
* Hardware upgrades to mi:gate noise sources
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Time constant = 1 ms
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* There are two RC hardware filters in readout system with 1ms :me constant
* This leads to the nega:ve tail in the signal * When the signal is small, the nega:ve tail is also small and not no:ceable * In case of large signal with long dura:on for example, for collec:on plane in
case of ver:cal muon, this RC circuit leads to a long nega:ve tail
Ticks (0.5us) 2000 4000 6000 8000 ADC Counts 50 100 150 200
Raw Signal
MicroBooNE
Ticks (0.5us) 2000 4000 6000 8000 ADC Counts 50 100 150 200
Corrected Signal
MicroBooNE
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* Noise associated with first transistor of the cold ASIC
* Noise from warm shaping amplifier & ADC
* Noise from wire bias power supplies
* Noise from other circuits in readout chain
* Noise from cathode HV
* Noise from power switching circuits ?
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Cin = total capacitance at input of the ASIC en = white series noise spectral density tp = peaking :me of an:-aliasing filter
10% increase in ENC at 1 us seUng
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Frequency (MHz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Magnitude (Arbitrary Units)
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Example of Excess Noise
s peaking time µ 1
MicroBooNE
Example of Excess Noise
900 kHz Burst Noise Cathode HV Harmonic Noise LV Regulator Noise
Frequency (MHz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Magnitude (Arbitrary Units)
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Example of Excess Noise
s peaking time µ 2
MicroBooNE
Example of Excess Noise
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* Low frequency (10 - 30 kHz) coherent noise affec:ng groups of channels
simultaneously
* High correla:on between channels on MB pairs (1 MB = 48U +48V + 96Y)
* Subtract coherent noise using median ADC value of set of 48 channels at
MB level
* Before subtrac:on, signal region is iden:fied and removed from the
waveform
* Noise level is reduced by a factor for 4-5 for the induc:on and 2-3 for the
collec:on plane
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* It was observed that, some charge got induced on anode wire plane
resul:ng from poten:al varia:ons in cathode
* Anode plane is very sensi:ve to even small poten:al changes at cathode
(which is 2.5m away)
* Series of single frequency noise sources are observed, odd harmonics of
36kHz, which is the fundamental freq. of HV power supply ripple
* Main two single frequency noise components, highest peak (36kHz) and
second highest peak (108 kHz)
* V-plane is shielded by U-wires & Y-plane noise is further a_enuated by V-
wires
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* This high Frequency noise is more prevalent on the downstream side of
the TPC and can be clearly iden:fied in frequency domain
* The source of this noise believed to be field pick-up on wires * This noise can be easily filtered using high freq. (low-pass) filter * More prominent in case of lower shaping :me
Time domain Frequency domain
Ticks (0.5 us) Example of Identified Burst Noise Region MicroBooNE Ticks (0.5 us) Example of Identified Burst Noise Region Example of Identified Burst Noise Region MicroBooNE
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Filtering HV Power Supply and Low Frequency Noise
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* Simulated signal that overlays pulse shapes on TPC data is examined for
signals produced by isolated point-like charges and for signals produced by MIP tracks parallel to the wire plane and perpendicular to given wire * Measured bias is negligible for minimum ionizing par:cle (~ 13K e-)
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x = parallel noise term including noise from intermediate amplified and ADC digi:za:on y = series noise from transistor gate capacitance & wire-to-ASIC capacitance z = series noise due to wire capacitance and depends on wire length, L
Resul:ng plot: ENC vs. Wire length
(fixed term)
Digi:za:on noise ~ 0.5 ADC
Extracted wire capacitance = (23 ± 1) pF/m Extracted parasi:c capacitance = 87 pF 1 ADC ~ 182 electrons
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* Two important hardware upgrades
for noise mi:ga:on
voltage regulator were installed for low frequency coherent noise
driB HV system to reduce cathode HV power supply ripple noise
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* Empirical noise model from data (aBer noise filtering)
Gain/Shaping dependent Constant (post-preamp)
* Model parametrized for different wire-lengths and can simply scale (using
electronics response func:on) first “gain/shaping - dependent part” for different ASIC sepngs and quadrature sum constant part
Noise Simula:on Talk @DUNE
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* MicroBooNE achieved ultra-low noise levels being first large LArTPC
* Noise filtering code is implemented in Wire-Cell toolkit and is integrated to
LArSoB via “larwirecell” package (h_ps://wirecell.github.io)
* In terms of data-reduc:on for DUNE FD, more studies need to be done
using realis:c signal and noise simula:ons
* Valida:on of realis:c simula:on in Wire-Cell toolkit is performed for signal
processing paper (in review) and soon be integrated to LArSoB
* Paper with realis:c noise model + signal processing is in EB review
JINST 12 (2017) no. 08, P08003
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* Mis-Configured Channels
gain and shaping :me sepngs (4.7 mV/fC & 1us)
configura:on signal lines due to electrosta:c discharge
produc:on sepngs (14 mV/fC & 2us) by correc:ng the shaping response
becomes significant
are bit higher due to amplifica:on of digi:za:on noise
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* During commissioning, three signal feedthrough seems to draw more
current than provided by voltage source
* In addi:on, noise increased about 20 :mes for some U-plane channels
and some V-plane channels observed anomalous response
* This behavior can be explained if there is direct DC contact across
different feedthroughs in case a V wire comes in contact with some U wires, though no direct contact between U & V wires is observed during visual scan.
* These U wires can disturb the nearby electric field and can result in
collec:ng the signal. Hence smaller signal amplitude in nearby V and Y wires
* Current vs. bias voltage test at feedthrough facilitated the deriva:on of
number of effected channels
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* Intermi_ent dead regions (low RMS) on waveform when wire bias is ON * Iden:fied and filtered out using very low local RMS cut (~20 :me :cks) * Some:mes only some percent of waveform is chirping, in this case we can
recover the unaffected por:on of the waveform
* Adap:ve Baseline technique can be used to recover the baseline * Largely reduced by changing ASIC bias current from 100 pA to 500 pA
* Wire mo:on could be the poten:al source of satura:on
An example U-Plane raw waveform before and a_er filtering