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Equivalence Checking using Grbner Bases Amr Sayed-Ahmed 1 Daniel Groe 1 , 2 Mathias Soeken 3 Rolf Drechsler 1 , 2 1 University of Bremen, Germany 2 DFKI GmbH, Germany 3 EPFL, Switzerland Email: asahmed@informatik.uni-bremen.de FMCAD, October


  1. Equivalence Checking using Gröbner Bases Amr Sayed-Ahmed 1 Daniel Große 1 , 2 Mathias Soeken 3 Rolf Drechsler 1 , 2 1 University of Bremen, Germany 2 DFKI GmbH, Germany 3 EPFL, Switzerland Email: asahmed@informatik.uni-bremen.de FMCAD, October 2016 1

  2. Introduction ◮ Formal verification circumvents costly bugs ◮ Automated verification of floating-point circuits at gate level is still a major challenge ◮ The proposed algebraic technique is a fully automated verification for floating-point circuits 2

  3. Introduction ◮ Formal verification circumvents costly bugs ◮ Automated verification of floating-point circuits at gate level is still a major challenge ◮ The proposed algebraic technique is a fully automated verification for floating-point circuits 2

  4. Introduction ◮ Formal verification circumvents costly bugs ◮ Automated verification of floating-point circuits at gate level is still a major challenge ◮ The proposed algebraic technique is a fully automated verification for floating-point circuits 2

  5. Outline Symbolic Computation Algebraic Combinational Equivalence Checking (ACEC) Reverse Engineering Arithmetic Sweeping Experimental Results Conclusion 3

  6. Outline Symbolic Computation Algebraic Combinational Equivalence Checking (ACEC) Reverse Engineering Arithmetic Sweeping Experimental Results Conclusion 4

  7. Algebraic Decision Procedure ◮ Ideal Membership Testing: Equivalence Relationship p r G = { g 1 , . . . , g s } Recursive Gröbner Bases Model Division r Remainder Inconsistency Checking r � = 0 r = 0 Equivalence 5

  8. Modeling a Circuit as Gröbner Bases ◮ Modeling Logic Gates: z = ¬ a ⇒ g := − z + 1 − a z = a ⊕ b ⇒ g := − z + a + b − 2 ab z = a ∧ b ⇒ g := − z + ab z = a ∨ b ⇒ g := − z + a + b − ab 6

  9. Modeling a Circuit as Gröbner Bases ◮ Modeling Logic Gates: z = ¬ a ⇒ g := − z + 1 − a z = a ⊕ b ⇒ g := − z + a + b − 2 ab z = a ∧ b ⇒ g := − z + ab z = a ∨ b ⇒ g := − z + a + b − ab ◮ Full Adder Example: x 1 g 6 g 2 a x 2 g 5 s b g 3 c x 4 x 3 g 4 g 1 c out leading monomial tail terms ց ւ g 1 := − c out − x 4 x 3 + x 4 + x 3 6

  10. Modeling a Circuit as Gröbner Bases ◮ Modeling Logic Gates: z = ¬ a ⇒ g := − z + 1 − a z = a ⊕ b ⇒ g := − z + a + b − 2 ab z = a ∧ b ⇒ g := − z + ab z = a ∨ b ⇒ g := − z + a + b − ab ◮ Full Adder Example: x 1 g 6 g 2 a x 2 g 5 s b g 3 c x 4 x 3 g 4 g 1 c out leading monomial tail terms ց ւ g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c 6

  11. Modeling a Circuit as Gröbner Bases ◮ Modeling Logic Gates: z = ¬ a ⇒ g := − z + 1 − a z = a ⊕ b ⇒ g := − z + a + b − 2 ab z = a ∧ b ⇒ g := − z + ab z = a ∨ b ⇒ g := − z + a + b − ab ◮ Full Adder Example: x 1 g 6 g 2 a x 2 g 5 s b g 3 c x 4 x 3 g 4 g 1 c out leading monomial tail terms ց ւ g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b 6

  12. Modeling a Circuit as Gröbner Bases ◮ Modeling Logic Gates: z = ¬ a ⇒ g := − z + 1 − a z = a ⊕ b ⇒ g := − z + a + b − 2 ab z = a ∧ b ⇒ g := − z + ab z = a ∨ b ⇒ g := − z + a + b − ab ◮ Full Adder Example: leading monomial tail terms ց ւ g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Leading monomials are relatively prime = ⇒ The model is Gröbner bases 6

  13. Ideal Membership Testing ◮ Following Full Adder Example: specification polynomial p r := − 2 c cout − s + c + b + a ◮ Its model g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Recursive Division : 7

  14. Ideal Membership Testing ◮ Following Full Adder Example: specification polynomial p r := − 2 c cout − s + c + b + a ◮ Its model g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Recursive Division : g 1 p r := − 2 c cout − s + c + b + a − − − → g 2 − s +2 x 4 x 3 − 2 x 4 − 2 x 3 + c + b + a − − − → 7

  15. Ideal Membership Testing ◮ Following Full Adder Example: specification polynomial p r := − 2 c cout − s + c + b + a ◮ Its model g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Recursive Division : g 2 g 3 − − − → 2 x 4 x 3 − 2 x 4 − 2 x 3 + 2 x 1 c − x 1 + b + a − − − → 7

  16. Ideal Membership Testing ◮ Following Full Adder Example: specification polynomial p r := − 2 c cout − s + c + b + a ◮ Its model g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Recursive Division : g 3 g 4 − − − → 2 x 3 x 2 c − 2 x 3 − 2 x 2 c + 2 x 1 c − x 1 + b + a − − − → 7

  17. Ideal Membership Testing ◮ Following Full Adder Example: specification polynomial p r := − 2 c cout − s + c + b + a ◮ Its model g 1 := − c out − x 4 x 3 + x 4 + x 3 g 2 := − s − 2 x 1 c + x 1 + c g 3 := − x 4 + x 2 c g 4 := − x 3 + ab g 5 := − x 2 − ab + a + b g 6 := − x 1 − 2 ab + a + b ◮ Recursive Division : g 4 − − − → 2 x 2 cba − 2 x 2 c + 2 x 1 c − x 1 − 2 ba + b + a g 5 g 6 − − − → 2 x 1 c − x 1 + 4 cba − 2 ca − 2 cb − 2 ab + b + a − − − → 0 7

  18. Outline Symbolic Computation Algebraic Combinational Equivalence Checking (ACEC) Reverse Engineering Arithmetic Sweeping Experimental Results Conclusion 8

  19. Flow of ACEC Circuit Circuit Netlist 1 Netlist 2 N 1 N 2 Gröbner Gröbner Modeling Modeling G 2 G 1 Combined Model G 9

  20. Flow of ACEC Circuit Circuit Netlist 1 Netlist 2 N 1 N 2 Gröbner Gröbner Modeling Modeling G 2 G 1 Combined Model G Output Relationships Equivalence Membership Testing Inconsistency 9

  21. Flow of ACEC Circuit Circuit Netlist 1 Netlist 2 N 1 N 2 Gröbner Gröbner Modeling Modeling G 2 G 1 Combined Model G Output Relationships Equivalence Membership Testing ⇒ Computationally Infeasible = Inconsistency 9

  22. Flow of ACEC Circuit Circuit Netlist 1 Netlist 2 N 1 N 2 Gröbner Gröbner Modeling Modeling G 2 G ′ : Rewritten Combined Model G 1 wG : Abstracted Polynomials Set of Arithmetic Units Combined Model G G Reverse Identifying G ′ wG Model Engineering & Abstracting Rewriting G ′ Arithmetic Units G ′ wG 9

  23. Flow of ACEC G Reverse Engineering G ′ G ′ wG wG Internal Relationships wG G ′ Deducing Membership Relationships Testing Arithmetic Sweeping Equivelance/ Inconsistency sG G ′ sG Model Simplification 9

  24. Flow of ACEC G Reverse Engineering wG G ′ Arithmetic Sweeping sG Output Relationships Equivalence Membership Testing Inconsistency 9

  25. Outline Symbolic Computation Algebraic Combinational Equivalence Checking (ACEC) Reverse Engineering Arithmetic Sweeping Experimental Results Conclusion 10

  26. Reverse Engineering ◮ Based on detecting carry bits propagation within arithmetic units (integer adders and multipliers) ◮ Full adder model revealing carry terms: g 1 : − s + c + b + a + 4 cba − 2 cb − 2 ca − 2 ba g 2 : − c out − 2 cba + cb + ca + ba ◮ Identifying subsets of polynomials that share carry terms, therefore, model arithmetic components ◮ Model rewriting is required for: ◮ Revealing carry terms ◮ Removing vanishing monomials (redundant monomials that always evaluate to zero) ◮ Abstraction by Gaussian elimination, for the full adder: 2 g 2 + g 1 → g r : − 2 c out − s + c + b + a 11

  27. Reverse Engineering ◮ Based on detecting carry bits propagation within arithmetic units (integer adders and multipliers) ◮ Full adder model revealing carry terms: g 1 : − s + c + b + a + 4 cba − 2 cb − 2 ca − 2 ba g 2 : − c out − 2 cba + cb + ca + ba ◮ Identifying subsets of polynomials that share carry terms, therefore, model arithmetic components ◮ Model rewriting is required for: ◮ Revealing carry terms ◮ Removing vanishing monomials (redundant monomials that always evaluate to zero) ◮ Abstraction by Gaussian elimination, for the full adder: 2 g 2 + g 1 → g r : − 2 c out − s + c + b + a 11

  28. Reverse Engineering ◮ Based on detecting carry bits propagation within arithmetic units (integer adders and multipliers) ◮ Full adder model revealing carry terms: g 1 : − s + c + b + a + 4 cba − 2 cb − 2 ca − 2 ba g 2 : − c out − 2 cba + cb + ca + ba ◮ Identifying subsets of polynomials that share carry terms, therefore, model arithmetic components ◮ Model rewriting is required for: ◮ Revealing carry terms ◮ Removing vanishing monomials (redundant monomials that always evaluate to zero) ◮ Abstraction by Gaussian elimination, for the full adder: 2 g 2 + g 1 → g r : − 2 c out − s + c + b + a 11

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