MVD Strip ASIC (PASTA) Status Update of the PA NDA St rip A SIC Andr - PowerPoint PPT Presentation

MVD Strip ASIC (PASTA) Status Update of the PA NDA St rip A SIC André Goerres Mitglied der Helmholtz-Gemeinschaft 10 September 2013 46. PANDA Meeting, Ruhr-University-Bochum 1

Content • Introduction to TOFPET/PASTA • Status of analogue part – Front-end and TDC • Status of digital part – Meeting in Lisbon – Redesign of TDC Control Mitglied der Helmholtz-Gemeinschaft 2

Motivation for using Time-of-Flight in PET PET : P ositron E mission T omography Normal PET operation - Introduce positron-emitting radionuclide ( β + decay) into patients body, detect annihilation gamma rays. - Position of annihilation somewhere along the line of response (LOR). - 2D information by superimposing Mitglied der Helmholtz-Gemeinschaft di ff erent LORs. 3

Motivation for using Time-of-Flight in PET PET : P ositron E mission T omography Normal PET operation PET using Time-of-Flight (TOF) - Introduce positron-emitting - Again, β + radionuclide in body. radionuclide ( β + decay) into patients - Measure time di ff erence of arriving body, detect annihilation gamma rays. photons (accuracy ~200 ps ⇒ 3 cm). - Position of annihilation somewhere - Additional position information along the line of response (LOR). alongside LOR. - 2D information by superimposing Mitglied der Helmholtz-Gemeinschaft di ff erent LORs. • Higher SNR of reconstructed image • Shorter exam time and reduced injected dose TOFPET ASIC developed by LIP Lisbon in the FP7/EndoTOFPET-US project 3

Concept of the ASIC • Readout SiPM, achieve: – High time resolution and reduce dark count rate • Two TDCs per channel U – Time and energy branch (low and high threshold) – Energy trigger (t 2 ) validates time trigger (t 1 ) U E • Charge by time-over- U T threshold (ToT) t t 1 t 2 t 3 – ToT measurement: t 3 - t 1 Mitglied der Helmholtz-Gemeinschaft – Time binning: 50 ps (25 ps optional) 4

Concept of the ASIC 4x TDC T 4x TDC T thr T TDC_CTRL T 4x TDC T ch0 hit- data PreAmp validation register 4x TDC T 4x TDC T thr E TDC_CTRL E 4x TDC E LVDS clock CLK front-end analogue TDC TDC Control LVDS con fi g con fi g. LVDS data output bu ff er • Four stages: Global Controller – Front-end (analogue) – TDC (analogue) Mitglied der Helmholtz-Gemeinschaft – TDC Control (digital) – Global Controller (digital) 5

Concept of the ASIC 4x TDC T 4x TDC T thr T TDC_CTRL T 4x TDC T ch0 hit- data PreAmp validation register 4x TDC T 4x TDC T thr E TDC_CTRL E 4x TDC E LVDS clock CLK front-end analogue TDC TDC Control LVDS con fi g con fi g. 4x TDC T 4x TDC T thr T TDC_CTRL T 4x TDC T ch1 hit- data PreAmp validation register 4x TDC T 4x TDC T thr E TDC_CTRL E 4x TDC E LVDS data output front-end analogue TDC TDC Control bu ff er ch2 data . . . register • Four stages: Global Controller – Front-end (analogue) – TDC (analogue) Mitglied der Helmholtz-Gemeinschaft – TDC Control (digital) – Global Controller (digital) 5

Analogue Time-to-Digital Converter time branch ADC stage 1 front-end ADC stage 2 energy branch analogue TDC V TAC V ADC stage 3 V ref V ref TDC CTRL stage 4 t t global CTRL write TAC transf. conversion • Two stages: bu ff er and convert signal ADC: Analogue to Digital Converter TAC: Time to Analogue Converter – Bu ff ering: discharge a capacitor (TAC) • Start: threshold; End: rising edge of clock* *: Dynamic range 1-3 clock cycles – Transfer to 4x larger capacitor, linearly recharge Mitglied der Helmholtz-Gemeinschaft with 32/64x smaller current (Wilkinson ADC) • Increase time resolution by 128/256x (50/25 ps @ 160 MHz) – Conversion takes ~ 3 µs (@128x) → bu ff er multiplicity of 4 6

Floorplan of TOFPET ASIC v1 • CMOS 130 nm (IBM), 64 channels on 25 mm 2 • One pad-free edge to attribute two twin chips back-to-back Discussion afterwards Mitglied der Helmholtz-Gemeinschaft Highlighted areas: bias and calibration circuitry 7

Readout of MVD Silicon Strips • General parameters match the MVD requirements Time bin. Area Ch. pitch Hit rate CLK Power TOFPET 7.1 x 3.5 mm 2 102 µm < 100 kHz 50 ps 80-160 MHz 7-8 mW/ch MVD ¡req. < 8 x 8 mm 2 ≈ 50 µm < 40 kHz < 20 ns 155.56 MHz < 4 mW/ch • Di ff erences to solve: – Signal shape / capacitance ⇒ redesign analogue part – Channel pitch ⇒ tighter layout for channels? Positioning? Discussion afterwards – Power consumption ⇒ • Bug in front-end stage Mitglied der Helmholtz-Gemeinschaft • Slower clock (40 MHz?), clock gating • Redesign digital TDC control • Tune analogue part 8

Mitglied der Helmholtz-Gemeinschaft PASTA Status Update Analogue Part 9

Front-end: Complete Redesign • Di ff erent signal shape lead to complete redesign of analogue front-end – Introducing a second amplifying stage (less cross talk) • Linearity of input charges: Mitglied der Helmholtz-Gemeinschaft MIP signal simulations by Valentino Di Pietro 10

Analogue TDC to UMC • Analogue converted to UMC – Included an additional current mirror – Stability of TDC charging current improved: IBM UMC Mitglied der Helmholtz-Gemeinschaft simulations by Alberto Riccardi 11

Temperature Stability of TDC • Conversion time in TDC, depending on temperature Temp. ¡(°C) EOC ¡(bits) 0 0010111101 25 0011000000 50 0011000001 75 0011000001 100 0011000001 125 0011000001 simulations by Alberto Riccardi Mitglied der Helmholtz-Gemeinschaft • Above room temperature: change 1 LSB – Veri fi ed with tests of TOFPET 12

Temperature Stability of TDC • Conversion time in TDC, depending on temperature Temp. ¡(°C) EOC ¡(bits) 0 0010111101 25 0011000000 50 0011000001 75 0011000001 100 0011000001 125 0011000001 simulations by Alberto Riccardi Mitglied der Helmholtz-Gemeinschaft Finer simulation grid • Above room temperature: change 1 LSB in room temp. regime – Veri fi ed with tests of TOFPET 12

Current work (comparator) and outlook • Concept for »hysteresis comparator« ready – More robust for re-triggering on the falling edge – Current status: layout (learning) phase – Plan: fi nished until end of September • Starting in October with layout of Front-end Mitglied der Helmholtz-Gemeinschaft 13

Mitglied der Helmholtz-Gemeinschaft PASTA Status Update Digital Part 14

Meeting with TOFPET People (Lisbon) • Introduction into global controller and test benches • Lot‘s of small, technical questions • Structure of the digital part (esp. TDC Control) – Room for optimizations • Structure not clear • Some solutions too complicated • Things done multiple times at di ff erent locations – Leads to too much logic • Power • Area Mitglied der Helmholtz-Gemeinschaft 15

Meeting with TOFPET People (Lisbon) • Introduction into global controller and test benches • Lot‘s of small, technical questions • Structure of the digital part (esp. TDC Control) – Room for optimizations • Structure not clear • Some solutions too complicated • Things done multiple times at di ff erent locations – Leads to too much logic • Power • Area Mitglied der Helmholtz-Gemeinschaft Rewrite digital TDC! 15

Some Conceptual Di ff erences • Switch to di ff erent technology – IBM 130 nm → UMC 110 nm • Time bu ff ers move to global controller – Saves connections U • Hit validation in two ways (delayed & synchronous) • More fl exibility what to store (t 1 -t 3 , t 1 -t 2 , test pulse) U E • Optimization in charging time U T t Mitglied der Helmholtz-Gemeinschaft t 1 t 2 t 3 • Refresh local instead global – Capacitors back to reference level after inactivity 16

Current Status of TDC Control • Basic concept is implemented – Trigger, TAC selector, charge transfer and measurement, … • Details are missing • No SEU protection yet • Current status: TDC_CTRL v1 TDC_CTRL v1 TDC_CTRL v2 (incl. SEU, IBM) (incl. SEU, UMC) (current status, UMC) Occupancy 84.8 % 37.0 % no place & route yet (1.1 x 0.1 mm 2 ) Cells 3155 2850 237 Power 1.57 mW/ch 1.78 mW/ch 0.03 mW/ch Mitglied der Helmholtz-Gemeinschaft @ 160 MHz Estimate for fi nal TDC Control: Save up to 80-90% in terms of power/occupancy 17

Conclusion • Analogue part – Front-end: concept ready, layout starts soon – TDC: switch to UMC complete, improved current stability • Digital part – Switch to UMC: TDC CTRL (100%), GCTRL (0%) – Redesign started, current status promising (power/occupancy down to ~10-20%) • Discussion needed – Geometrical descisions • Channel pitch Mitglied der Helmholtz-Gemeinschaft • Position of bonding pads 18

Conclusion • Analogue part – Front-end: concept ready, layout starts soon – TDC: switch to UMC complete, improved current stability • Digital part – Switch to UMC: TDC CTRL (100%), GCTRL (0%) – Redesign started, current status promising (power/occupancy down to ~10-20%) • Discussion needed – Geometrical descisions Thank you! • Channel pitch Mitglied der Helmholtz-Gemeinschaft a.goerres@fz-juelich.de • Position of bonding pads 18

Mitglied der Helmholtz-Gemeinschaft PASTA Status Update Backup 19

Hysteresis Comparator U • Problem: – Noise on the signal might lead to re-triggering U E U T t t 1 t 2 t 3 Mitglied der Helmholtz-Gemeinschaft 20

Hysteresis Comparator U • Problem: – Noise on the signal might lead to re-triggering U E – Additional time conversion U T t t 1 t 2 t 3 t 2 t 3 Mitglied der Helmholtz-Gemeinschaft 20