Logical Modeling with Time Delays Heike Siebert Alexander Bockmayr - - PowerPoint PPT Presentation

SLIDE 1

Logical Modeling with Time Delays

Heike Siebert Alexander Bockmayr

DFG-Research Center MATHEON, Freie Universität Berlin

Toward Systems Biology Grenoble October 2007

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 1 / 14

SLIDE 2

Why logical modeling?

lack of quantitative information on kinetic parameters and molecular concentrations biochemical reaction mechanisms underlying interactions not or incompletely known resulting systems of differential equations mostly not analytically solvable

⇒ discrete modeling based on

qualitative data

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 2 / 14

SLIDE 3

Why logical modeling?

lack of quantitative information on kinetic parameters and molecular concentrations biochemical reaction mechanisms underlying interactions not or incompletely known resulting systems of differential equations mostly not analytically solvable

⇒ discrete modeling based on

qualitative data allow for the incorporation of temporal data concerning network processes

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 2 / 14

SLIDE 4

Thomas Formalism

[ R. Thomas, 1973 ]

Structure: interaction graph discrete variables α1,...αn expression levels 0,...,pj associated with each αj labeled interactions

α1 α2

−, 1 −, 2 −, 1 +, 1 α1 ∈ {0,1}, α2 ∈ {0,1,2}

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 3 / 14

SLIDE 5

Thomas Formalism

[ R. Thomas, 1973 ]

Structure: interaction graph discrete variables α1,...αn expression levels 0,...,pj associated with each αj labeled interactions Dynamics: state space and evolution state space S := {0,...,p1}×···×{0,...,pn} discrete function f : S → S determines behavior of the system

α1 α2

−, 1 −, 2 −, 1 +, 1 α1 ∈ {0,1}, α2 ∈ {0,1,2}

s = (s1,s2), f(s) = (f1(s),f2(s)) f1(s) =

• 1

,

s2 = 0

,

else f2(s) =

  

2

,

s1 = 0 ∧ s2 ≤ 1 1

,

s1 = 0 ∧ s2 = 2

,

else

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 3 / 14

SLIDE 6

Thomas Formalism

Dynamics: state transition graph vertex set S edges derived from parameter values (0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0)

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 4 / 14

SLIDE 7

Thomas Formalism

Dynamics: state transition graph vertex set S edges derived from parameter values

◮ corresponding component values

differ at most by 1

(0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0)

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 4 / 14

SLIDE 8

Thomas Formalism

Dynamics: state transition graph vertex set S edges derived from parameter values

◮ corresponding component values

differ at most by 1

◮ states differ from their successors

in one component only asynchronous update: sole assumption about time delays

(0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0)

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 4 / 14

SLIDE 9

Thomas Formalism

Dynamics: state transition graph vertex set S edges derived from parameter values

◮ corresponding component values

differ at most by 1

◮ states differ from their successors

in one component only asynchronous update: sole assumption about time delays

(0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0) non-deterministic representation of the network dynamics

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 4 / 14

SLIDE 10

Considering Time Delays

Command to change for more than one component compare time delays associated with different processes

◮ distinguish between components ◮ distinguish between production

and decay processes

◮ take expression levels into account

allow for the possibility of time delay equality (0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0)

τ2 < τ1 τ1 < τ2

+ + + +

τ1 < τ2

− − 1 1

τ1 < τ2

− − 2 1

τ2 < τ1

− − 1 1

τ2 < τ1

− − 1 2

τ1 = τ2

+ +

τ1 = τ2

− − 1 1

τ1 = τ2

− − 2 1 Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 5 / 14

SLIDE 11

Considering Time Delays

Command to change for more than one component compare time delays associated with different processes

◮ distinguish between components ◮ distinguish between production

and decay processes

◮ take expression levels into account

allow for the possibility of time delay equality complexity of time constraints may increase with path length (0, 2) (0, 1) (0, 0) (1, 2) (1, 1) (1, 0)

τ2 < τ1

− − 1 2

τ2 + τ2

− − 2 1

< τ1

− 1 Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 5 / 14

SLIDE 12

Introducing Time

Timed Automata [ R. Alur, D. Dill, 1994 ] clocks measure time, progress linear and synchronously clock constraints are formulated in the grammar

ϕ ::= c ≤ q |c ≥ q |c < q |c > q |ϕ1 ∧ϕ2

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 6 / 14

SLIDE 13

Introducing Time

Timed Automata [ R. Alur, D. Dill, 1994 ] clocks measure time, progress linear and synchronously clock constraints are formulated in the grammar

ϕ ::= c ≤ q |c ≥ q |c < q |c > q |ϕ1 ∧ϕ2

timed automata may be visualized as digraphs where

◮ vertices (locations) represent

states

◮ edges represent (discrete) state

changes A B C

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 6 / 14

SLIDE 14

Introducing Time

Timed Automata [ R. Alur, D. Dill, 1994 ] clocks measure time, progress linear and synchronously clock constraints are formulated in the grammar

ϕ ::= c ≤ q |c ≥ q |c < q |c > q |ϕ1 ∧ϕ2

timed automata may be visualized as digraphs where

◮ vertices (locations) represent

states

◮ edges represent (discrete) state

changes

◮ time constraints may be posed on

states and edges, clocks may be reset A B C

c1 ≤ q1 c1 ≥ q3 c2 ≥ q1 c1 := 0 c1 ≤ q1 c1 := 0 c2 := 0 c2 ≥ q1 c2, c1 ≤ q3 c1 := 0

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 6 / 14

SLIDE 15

Modus Operandi

• 1. Model each component incorporating information on

◮ expression levels, ◮ interactions, ◮ parameter values, ◮ time delays.

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 7 / 14

SLIDE 16

Modus Operandi

• 1. Model each component incorporating information on

◮ expression levels, ◮ interactions, ◮ parameter values, ◮ time delays.

• 2. Combine the components to a model supplying information on

◮ the state space of the network, ◮ state changes induced by the structure and parameter specification of

the network,

◮ constraints on time delays associated with state changes.

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 7 / 14

SLIDE 17

Modus Operandi

• 1. Model each component incorporating information on

◮ expression levels, ◮ interactions, ◮ parameter values, ◮ time delays.

• 2. Combine the components to a model supplying information on

◮ the state space of the network, ◮ state changes induced by the structure and parameter specification of

the network,

◮ constraints on time delays associated with state changes.

• 3. Evaluate the data inherent in the network model to obtain a

representation of the dynamical behavior in agreement with all given constraints.

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 7 / 14

SLIDE 18

Modeling Each Component

• ne clock for each component

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 19

Modeling Each Component

• ne clock for each component

expression levels

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

α0

1

α1

1

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 20

Modeling Each Component

• ne clock for each component

expression levels – distinction between stationary states and states representing the process of expression level change

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

α0

1

α1

1

α0+

1

α1−

1

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 21

Modeling Each Component

• ne clock for each component

expression levels – distinction between stationary states and states representing the process of expression level change maximal and minimal time delays associated with expression level change location changes due to elapse of time

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

α0

1

α1

1

α0+

1

α1−

1

c1 ≤ T 1−

1

c1 ≤ T 0+

1

c1 ≥ t0+

1

c1 ≥ t1−

1 Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 22

Modeling Each Component

• ne clock for each component

expression levels – distinction between stationary states and states representing the process of expression level change maximal and minimal time delays associated with expression level change location changes due to elapse of time corresponding network interactions and parameters (“switch conditions”),

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

α0

1

α1

1

α0+

1

α1−

1

c1 ≤ T 1−

1

c1 ≤ T 0+

1

el(α2) < 1 el(α2) < 1 el(α2) ≥ 1 el(α2) ≥ 1 c1 ≥ t0+

1

c1 ≥ t1−

1 Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 23

Modeling Each Component

• ne clock for each component

expression levels – distinction between stationary states and states representing the process of expression level change maximal and minimal time delays associated with expression level change location changes due to elapse of time corresponding network interactions and parameters (“switch conditions”), induced location changes can only be evaluated in the network context

α1 α2

−, 1 −, 2 −, 1 +, 1

f : S → S

α0

1

α1

1

α0+

1

α1−

1

c1 ≤ T 1−

1

c1 ≤ T 0+

1

el(α2) < 1 el(α2) < 1 el(α2) ≥ 1 el(α2) ≥ 1 c1 ≥ t0+

1

c1 ≥ t1−

1 Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 8 / 14

SLIDE 24

Connecting the Parts

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c1 ≥ t0+

1

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 ≥ t1+

2

c2 ≥ t2−

2

c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

product locations edges specified in component automata

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 9 / 14

SLIDE 25

Connecting the Parts

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

product locations edges specified in component automata edges due to network interactions, parameters and current state

• f the system

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 9 / 14

SLIDE 26

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 27

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

((α0

1, α0 2), (0, 0))

((α0+

1 , α0+ 2 ), (0, 0))

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 28

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

((α0

1, α0 2), (0, 0))

((α0+

1 , α0+ 2 ), (0, 0))

((α0+

1 , α0+ 2 ), (t, t))

t ≤ T 0+

1

, T 0+

2

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 29

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

((α0

1, α0 2), (0, 0))

((α0+

1 , α0+ 2 ), (0, 0))

((α0+

1 , α0+ 2 ), (t, t))

((α0+

1 , α1 2), (t, t))

t ≤ T 0+

1

, T 0+

2

t ≥ t0+

2 , t ≤ T 0+ 1

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 30

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

((α0

1, α0 2), (0, 0))

((α0+

1 , α0+ 2 ), (0, 0))

((α0+

1 , α0+ 2 ), (t, t))

((α0+

1 , α1 2), (t, t))

((α0

1, α1 2), (0, t))

t ≤ T 0+

1

, T 0+

2

t ≥ t0+

2 , t ≤ T 0+ 1

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 31

Dynamics

α0

1α0 2

α1

1α0 2

α0+

1 α0+ 2

α0+

1 α1 2

α1

1α0+ 2

α1

1α1 2

c1 ≤ T 0+

1

, c2 ≤ T 0+

2

c1, c2 := 0 c1 ≤ T 0+

1

c1 ≥ t0+

1

c2 ≥ t0+

2

c2 ≤ T 0+

2

c2 := 0 c2 ≥ t0+

2

α0

1α1 2

α0

1α1− 2

c2 ≤ T 1−

2

α1−

1 α0 2

c1 ≤ T 1−

1

α1−

1 α1− 2

c1 ≤ T 1−

1

, c2 ≤ T 1−

2

α1−

1 α1 2

c1 ≤ T 1−

1

c1 ≥ t1−

1

c1 := 0 c2 ≥ t1−

2

c1 ≥ t1−

1

c2 ≥ t1−

2

c2 := 0 c1, c2 := 0 c1 ≥ t0+

1

c1 := 0

α0

1α1+ 2

c2 ≤ T 1+

2

α0

1α2 2

α1

1α2 2

α1−

1 α2− 2

c1 ≤ T 1−

1

, c2 ≤ T 2−

2

α0

1α2− 2

c2 ≤ T 2−

2

c2 := 0 c2 ≥ t1+

2

c2 := 0 c2 ≥ t2−

2

c1, c2 := 0 c1 ≥ t1−

1

c2 ≥ t2−

2

c1 ≥ t1−

1

((α0

1, α0 2), (0, 0))

((α0+

1 , α0+ 2 ), (0, 0))

((α0+

1 , α0+ 2 ), (t, t))

((α0+

1 , α1 2), (t, t))

((α0

1, α1 2), (0, t))

((α0

1, α1+ 2 ), (0, 0))

t ≤ T 0+

1

, T 0+

2

t ≥ t0+

2 , t ≤ T 0+ 1

description includes time component consideration of behavior in agreement with time constraints

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 10 / 14

SLIDE 32

Analyzing the Transition System

Dynamics captured in a transition system infinite due to time component non-deterministic

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 11 / 14

SLIDE 33

Analyzing the Transition System

Dynamics captured in a transition system infinite due to time component non-deterministic Consistency: state transition graph of the Thomas formalism can be recovered from the dynamics of a suitable timed automata model

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 11 / 14

SLIDE 34

Analyzing the Transition System

Dynamics captured in a transition system infinite due to time component non-deterministic Consistency: state transition graph of the Thomas formalism can be recovered from the dynamics of a suitable timed automata model Possible approach: analysis and verification by means of model checking techniques software for editing, simulating and verification of timed automata available implementation in UPPAAL

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 11 / 14

SLIDE 35

Bacteriophage λ

[ D. Thieffry, R. Thomas, 1995 ]

α1 α2

K1,{e21} = 2 K1,{e31} = 2 K1,{e11,e21} = 2 K1,{e11,e31} = 2 K1,{e21,e31} = 2 K1,{e11,e21,e31} = 2 K2,{e12} = 2 K2,{e12,e22} = 3 K3,{e13,e23,e43} = 1 K4,{e14,e24} = 1

α4 α3

(cI) (cro) (cII) (N) − + {1} {2} {3} {1, 2} {1, 2, 3} {2, 3} − {2} − − − − {3} + + {1} − {2}

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 12 / 14

SLIDE 36

Bacteriophage λ

0000 0001 1000 0100 0101 0201 0301 0200 0300 1001 0011

... ... ... ... ... ... ... ... ... ...

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 13 / 14

SLIDE 37

Bacteriophage λ

0000 0001 1000 0100 0101 0201 0301 0200 0300 1001 0011

... ... ... ... ... ... ... ... ... ...

0000 0001 0100 0101 0201 0301 0200 0300

... ...

elimination of pathways violating clock constraints based on temporal data

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 13 / 14

SLIDE 38

Bacteriophage λ

0000 0001 1000 0100 0101 0201 0301 0200 0300 1001 0011

... ... ... ... ... ... ... ... ... ...

0000 0001 0100 0101 0201 0301 0200 0300

... ...

elimination of pathways violating clock constraints based on temporal data additional information on the status of component activity

α0

1α2+ 2 α0+ 3 α1− 4

α0

1α3 2α0+ 3 α1− 4

α0

1α3− 2 α0 3α1− 4

α0

1α2 2α0 3α1− 4

α0

1α2 2α0 3α1 4

α0

1α2 2α0 3α0 4

α0

1α2+ 2 α0 3α0 4

α0

1α3 2α0 3α0 4

α0

1α3− 2 α0 3α0 4

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 13 / 14

SLIDE 39

Bacteriophage λ

0000 0001 1000 0100 0101 0201 0301 0200 0300 1001 0011

... ... ... ... ... ... ... ... ... ...

0000 0001 0100 0101 0201 0301 0200 0300

... ...

elimination of pathways violating clock constraints based on temporal data additional information on the status of component activity

α0

1α2+ 2 α0+ 3 α1− 4

α0

1α3 2α0+ 3 α1− 4

α0

1α3− 2 α0 3α1− 4

α0

1α2 2α0 3α1− 4

α0

1α2 2α0 3α1 4

α0

1α2 2α0 3α0 4

α0

1α2+ 2 α0 3α0 4

α0

1α3 2α0 3α0 4

α0

1α3− 2 α0 3α0 4

t > T 1−

4

evaluation of feasibility and stability of behavior

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 13 / 14

SLIDE 40

Conclusion

Modeling formalism modular logical modeling of regulatory networks incorporating time delays

⇒ refined analysis of the network dynamics

Outlook applying the formalism developing precise concepts to evaluate feasibility and stability of dynamical behavior consideration of more expressive modeling frameworks

Heike Siebert (MATHEON / FU Berlin) Logical Modeling with Time Delays TSB 2007 14 / 14