limited adaptive histogram equalization
play

Limited Adaptive Histogram Equalization Burak nal, Ali Akoglu - PowerPoint PPT Presentation

Resource Efficient Real-Time Processing of Contrast Limited Adaptive Histogram Equalization Burak nal, Ali Akoglu Reconfigurable Computing Lab Department of Electrical and Computer Engineering The University of Arizona 1 Outline


  1. Resource Efficient Real-Time Processing of Contrast Limited Adaptive Histogram Equalization Burak Ü nal, Ali Akoglu Reconfigurable Computing Lab Department of Electrical and Computer Engineering The University of Arizona 1

  2. Outline • Motivation • Histogram Equalization – General Histogram Equalization – Adaptive Histogram Equalization – Contrast Limited Adaptive Histogram Equalization • Related Works • State-of-the-art Implementation • Contextual CLAHE – Histogram Generation – Histogram Distribution and CDF – Interpolation Technique • Testbed • Results • Conclusion and Future Work 2

  3. Motivation • Non-contact Sensing • Contact Sensing – Structural challenge – Burdensome – Sunlight variety – Labor-intensive – Poor image quality – Destructive How can we enhance the image quality ?

  4. Histogram Equalization Input Image Image Histogram (a) Histogram Equalization (HE) 4

  5. Adaptive Histogram Equalization Input Image (b) Adaptive HE (AHE) (c) Contrast Limited AHE (CLAHE)

  6. Adaptive Histogram Equalization Input Image (b) Adaptive HE (AHE) (c) Contrast Limited AHE (CLAHE)

  7. Related Works FPGA Based Implementations CLAHE AHE HE Fully Partially General HE Specified HE Overlapped Overlapped HE Specified HE Specified HE 2 AHE CLAHE 720 × 480 128 × 128 640 × 480 - - - 2.5Mpixels - - 640x480 - 122 fps - 25 fps - 25 fps - 263.8 fps - 537.9 fps - Missing - For specific - For specific - 128 block - Extremely local details task task RAMs memory depended (192 BRAM) 7

  8. Existing CLAHE Implementation 8

  9. Existing CLAHE Implementation Pros: – Real-time implementation – 537.9fps – The speed of algorithm is independent from image size Cons: – Requires 192x18K BRAM – Larger image size needs 320 BRAM (1920x1080) – Consume large amount of logic resource 9

  10. Contextual CLAHE 256 x 9 x 640 = 184.320 KB (HB) 256 x 13 x 8 = 26.624 KB 256 x 9 x 257 = 70.016K KB (THB) 4 row = 106.496 KB Combine tiles via interpolation. 10

  11. Histogram Generation 255 1, 𝐽 𝑗 = 𝑙 β K × K Image ℎ 𝑙 = 1 0 𝑝𝑢ℎ𝑓𝑠 𝑙=0 N-1 intensity Histogram BRAM 9 Buffer Dout 9 Adder Din 1/0 8 8 Pixel Buffer 12 Comparator Address excess β Excess Value pixels Counter 8 capacity Exceed Bin Counter bins 11

  12. Histogram Distribution & CDF (a) histogram cut (b) iteration 1 ( c) iteration 2 (d) iteration n β β β β α α α N-1 intensity intensity intensity intensity N-1 N-1 N-1 (e) CDF 𝑜 ℎ 𝑙 × 1 𝐷𝐸𝐺 = 𝑛 𝑦,𝑧 𝑜 = 𝑁 × 𝑂 2 𝑙=0 12

  13. Interpolation Technique UL UR w t z s BL BR 𝑡 𝑢 𝑨 𝑥 𝑢 𝑨 𝐽 𝑜𝑓𝑥 = 𝑨 + 𝑢 𝑛 𝑉𝑀 𝑜 + 𝑨 + 𝑢 𝑛 𝑉𝑆 𝑜 + 𝑨 + 𝑢 𝑛 𝐶𝑀 𝑜 + 𝑨 + 𝑢 𝑛 𝐶𝑆 𝑜 (3) 𝑡 + 𝑥 𝑡 + 𝑥 13

  14. Contextual CLAHE 14

  15. HE for Color Image FPGA Y 8 Histogram Input 24 RGB to YUV 8 generation & U 8 .. . . . Stream converter 8 V cutoff 12 Histogram distribution & 8 .. ... Output 24 CDF unit Frame Stream 2 1 Buffer Buffer 8 YUV to RGB converter Mapping Y Function U V Y stands for the luma (the brightness). U and V are the chrominance (color) components. 15

  16. Testbed 16

  17. Histogram Equalization Results (a) Original Image (b) Enhanced Image 17

  18. Histogram Equalization Results (a) FPGA (b) Matlab 18

  19. Histogram Equalization Results 1 FPGA and Matlab based output comparison error rate = with 0.39% difference 250 19

  20. Histogram Equalization Results Logic Resource CCLAHE CLAHE Number of Slice Registers 440 246 Number of Slice LUTs 4766 32123 Number of fully used LUT-FF pairs 284 222 Number of Block RAM/FIFO 16 192 Operatinal Frequency 108.86 MHz 209.6 MHz Performance 354.36 fps 537.9 fps Frame Size 512 x 512 640 x 480 1280 x 720 1920 x 1080 Critical Path Delay 8.475 ns 9.186 ns 12.061 ns 14.479 ns Maximum Operational Frequency 117.99 MHZ 108.86 MHz 82.91 MHz 69.06 MHz Performance 450.111 fps 354.36 fps 89.96 fps 33.30 fps 20

  21. Conclusion and Future Work • Real-time processing of CLAHE. • First implementation of interpolation based Contextual CLAHE. • Introduced a method for real time implementation of Contextual CLAHE to solve memory dependency issue. • Modified the flow of algorithm for FPGA implementation. – Histogram generation method is restructured to reduce block RAM usage. – Histogram redistribution technique is proposed to implement iterative redistribution algorithm in hardware. • Alternative interpolation calculation method is proposed to the computation complexity. • Histogram equalization architecture will be parallelized to increase its performance for larger image size. • Investigate different transfer function for calculating CDF. • Contrast-sensitive transfer function. 21

  22. Q & A 22

Download Presentation
Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend


More recommend