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LECTURE 3 1 ZELE EE618 6AUG2019 L-3 2 ZELE EE618 L-3 3 ZELE - PDF document

LECTURE 3 1 ZELE EE618 6AUG2019 L-3 2 ZELE EE618 L-3 3 ZELE EE618 L-3 4 ZELE EE618 L-3 5 ZELE EE618 L-3 6 ZELE EE618 L-3 7 ZELE EE618 EE618 (Zele) Body Effect and Sub-threshold Conduction Body Effect Consider the simplified


  1. LECTURE 3 1 ZELE EE618 6AUG2019

  2. L-3 2 ZELE EE618

  3. L-3 3 ZELE EE618

  4. L-3 4 ZELE EE618

  5. L-3 5 ZELE EE618

  6. L-3 6 ZELE EE618

  7. L-3 7 ZELE EE618

  8. EE618 (Zele) Body Effect and Sub-threshold Conduction Body Effect Consider the simplified NMOS shown in Fig. 1 part (A). A voltage V GS is applied between gate and source whereas a voltage V SB is applied between the source and bulk of the NMOS. For this explanation, we consider that the bulk is a p-well so that we can separately bias it (NMOS in a chip may lie in substrate and substrate of the whole chip will be tied to ground ). We consider the following two cases - CASE 1: V GS = V T H and V SB = 0 V As shown in Fig. 1 part (B), Due to positive V GS the holes in the channel region move out leaving negatively charged ions behind. The electrons that form the inversion layer comes from the n+(very high concentration) source region. The current in the device will be due to drift of these electrons when a V DS is applied. CASE 2: V GS = V T H and V SB > 0 V In this case we are increasing V SB (can be achieved by decreasing the bulk voltage keeping source voltage constant). Due to a net positive voltage on the source as compared to the bulk, some of the electrons present in the channel will be attracted back in the source as shown in of Fig. 1 part (C). Hence to achieve the same charge density as in CASE1 we need a more positive charge on the gate. Therefore we can say that increasing V SB increases threshold voltage. V GS V GS V GS + + + − − − V SB S D n+ n+ S D V SB + n+ n+ S D n+ n+ + − − p-well p-well p-well Bulk Bulk Bulk A B C Figure 1: Body effect in MSOFETS Effect of V DS in Subthreshold Region • The region where V GS of the device is less than or close to V T H is known as sub-threshold region. • Due to diffusion of minority charge carrier electrons, some leakage current may flow in the device even when V GS is less than V T H . • For a constant V DS , the current equation in subthereshold region is given as I subth = I O × exp ( V GS ζV T ) × (1 − exp ( − V DS )) V T where ζ is a non-ideality factor greater than 1 and V T = KT/q • For V DS = 0, the current I subth = 0. • For V DS > 4 V T H or 5 V T H the equation reduces to I subth = I O × exp ( V GS ζV T ) 1

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