Intro to Focused Ion Beam (FIB) Chip Circuit Edit Chris Kang - - PowerPoint PPT Presentation

Fab 10 Laboratory Analysis Services

Intro to Focused Ion Beam (FIB) Chip Circuit Edit

Chris Kang (Presenting) Steve Herschbein, Carmelo Scrudato, George Worth & Edward Hermann Mgr: Ray Wagner

FIB-SEM Workshop Laurel, MD

2/19/2016

Why an “Intro” Talk to This Audience?

• Educational: Some of you aren’t familiar with this application.
• Self-serving! We need your help…
• Microchip process technology is moving faster than advances in

FIB tools, process gases, and sample prep.

• Tool platforms, columns & ion species, e-beam, gas chemistry &

delivery, in-situ light optics, navigation & automation (remove the human factor), damage anneal, 3D sample prep, etc. – All are in need of improvement and investment!

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Intro to Focused Ion Beam (FIB) Editing

• FIB Chip Editing / FIB Circuit Modification / FIB Microsurgery
• Most people in typical analysis fields deal with “dead things”.

Even the biologists… If it isn’t dead when it arrives, it soon will be…

• By contrast, we are asked to do brain surgery on “live patients”.
• With up to 5 Billion transistors, will a design be ‘first time right’??
• New masks & a wafer Fab run to test a theory can take months. Is

there a better way to model a change, before making a change?

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Why Perform FIB Chip Edit?

• FIB circuit editing is used to produce a limited number of hand-built

prototype devices that will roughly mimic what a mask change would accomplish.

• Concept to first working parts in 1- 2 weeks, versus up to 3 months

by new masks and a Fab turn.

• Used to insure that the proposed change will indeed fix the issue,

that the identified design deficiency is the one & only, and allows software development or hardware demonstrations to remain on

• schedule. It can have a major impact on Time-to-Market.
• Prototyping is also commonly used by the Development, Yield, Test,

and the Failure Analysis Community to better understand the physical layout, design manual vs. speed sort anomalies, test coverage assurance, defect site isolation, high speed TX/RX tuning, etc.

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Chip Edit Origin: The “Yellow Wire” EC

Simple “yellow wire” edit on a two layer PC board. Board features fully visible, no blind navigation required. Solder in yellow wire jumpers, scratch out unwanted Cu traces.

Cut Connect

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Basic Frontside FIB Edit

Simple “yellow wire” edit on a two layer metal process. Chip features fully visible, no blind navigation required. FIB Process: Mill vias to metal lines & add jumper straps, mill 3 cuts.

Cut Connect

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• Like an SEM, but primary beam is

traditionally Ga+ (30 keV typical).

• Use beam to sputter, with image

created by collecting secondary electrons or ions.

• Utilize transferred energy to

activate precursor gases for selective etch, or deposition of conductors & insulators.

• Perform high volume or precision

nanoscale materials modification.

A Chip Edit FIB is a “direct write” tool, a whole Fab in a box… Imaging / Litho / Implant / Etch / Deposition

Sample Ion column Ion beam Ga+ (2-50 keV) Secondary electrons Secondary ions Tunable Gas Jets

Chip Edit Tool Basics: What is a FIB?

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Features Specific to a Chip Edit Tool

• Sophisticated gas delivery system

Variety of gas precursors Motor driven precision placement nozzles Mass flow controllers & mixing manifold Special high volume XeF2 nozzle - gas concentration (some tools)

• In-Situ Optical System

100x FOV IR (thru silicon) &/or broadband imaging

• CAD Navigation Overlay & Local Coordinate Lock Files

Camelot / GDS / Oasis / Chipview / others

• High Precision Stages

Laser tracked or tight tolerance with correction mapping

• Leading Edge Ion Columns

High current, gas immune, high resolution Precise pattern generation & landing energy control Future: SEM column for non-destructive imaging & gas processing Future: Alternate ion species – select by mass, conductivity, etc.

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Example of Drill & Fill – Create a New Via

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M4 M2 M3 M7 M6 M5 M2 M4

XeF2 gas assisted FIB mill of a new contact via, then filled with tungsten metal. This could be an access point for an internal electrical analysis, or a step in a functional circuitry change.

Dynamic Shape Changes During Si Thinning

As Received: Packaged Module Delidded Module: 100um+ Bowing IR monitoring for thickness Reflectance metrology thickness mapping generates corrected mill contour map for next round of shaping – down to 10 um remaining. Center of chip is thinner than perimeter due to board-dominated CTE stress.

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Y X Z

Chip-Package Interaction!

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FIB Backside Chip Circuit Edit Process

Backside Edit Plan:

Cut at the M1- M2 contacts, connect M1 latch input to Vdd.

M2 = Blue, M1 = Red, Poly = Green, S-D = Pink

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CAD Layout vs. FIB Image upon Touchdown: Make access points for cut & contacts:

FIB Backside Chip Circuit Edit (Bulk)

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Insulate, connect the wires & cover the cut:

FIB Backside Chip Circuit Edit (Bulk)

Typical FIB Edit Request Format

• Request to remove a pair of spurious inverters

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Alternate to typical “Wiring EC Edit” Method

• Option 1: Cut M2 & M3 wiring as per customer request.
• Option 2: Delete the dangling devices by milling them away.

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Alternate to typical “Wiring EC Edit” Method

• Look for “equivalent circuit’ opportunities that allow for logic removal (or

fixing an output state within a driver) rather than the need to gain access to M2-M3 wiring between logic blocks.

• Delete a logic circuit by milling away the transistors until only

the M1 wiring remains, then bridge input to output.

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Flip Chip Module Reconstruction

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Chip Edit FIB of the Near Future?

• Maybe(?) based around a dual-beam (plus optical)

Electron & Optical for imaging. Ions & electrons (possibly photons) for processing. Ideally all coaxially arranged – Same perspective view. Full complement of gases w/gas box regulation. Alternative or complement to Ga+ – an ‘any ion’ column.

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Next Gen FIB Edit Tools

• Commercially Available FIB Tools:

Gallium (LMIS): High brightness, small spot, moderate mass. He+ & Ne+ Gas Field Ion Sources (GFIS): Selected for high resolution imaging & light sputtering (available as a dual beam with Ga+). Xe+ (Plasma): Heavy ion selected for mass removal (dual beam w/e-).

• Papers at ISTFA, FEBIP, FIB/SEM Workshop, etc.

Electron Beam chemical activation & processing (dual beam w/Ga+).

(83 papers & posters last year at FEBIP)

Beryllium, Silicon, Gold, Cr, AuSi, AuBeSi, etc. (LMAIS – metal alloy) being investigated for specific applications. Lithium & Cesium cold ion beam sources in research phase.

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Closing Remarks

• FIB Chip Circuit Editing has been used by the semiconductor

industry quite effectively for over 20 years to emulate redesigned hardware.

• It’s getting tough…. Chip geometries are shrinking faster

than new edit tool technology is evolving.

• Modern packaging (3D stacking) will bring new challenges.
• Our customers still want this edge, so we are committed to

working with the vendor & the research community to bring next generation tooling to the semiconductor lab.

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