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Innovatng! Together. IP Reuse for the Masses Bob Ledzius, Founder - PowerPoint PPT Presentation

Innovatng! Together. IP Reuse for the Masses Bob Ledzius, Founder & CEO bob@concertal.com Elements ts for or Mas ass Ac Acceptan ance SIMPLE SCALABLE ACCESSIBLE Bob Ledzius April 5, 2018 Innovatng! Together. More Com


  1. Innovatng! Together. IP Reuse for the Masses Bob Ledzius, Founder & CEO bob@concertal.com

  2. Elements ts for or Mas ass Ac Acceptan ance SIMPLE SCALABLE ACCESSIBLE Bob Ledzius April 5, 2018 Innovatng! Together.

  3. More Com Complex Than Ever! Contnued Complexity Transistor Count (for largest MPUs & GPUs) 3 500 000 000 3 000 000 000 Productvity Gap Afects all designs! 2 500 000 000 System Design Automaton 2 000 000 000 Design Productvity 1 500 000 000 IP reuse required! 1 000 000 000 500 000 000 0 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 Bob Ledzius April 5, 2018 Innovatng! Together.

  4. Non on-Cr -Critcal al Path th IP Develop opment Paramet eter eriz ized IP IP Desig igo Prit itected Fuoc uoctioal ioal New w IP IP Shar ariog og Requ quests IP I Imports Ult ltra-High C / / C++ / / R RTL TL No-Touch! ch! IP IP Reu euse Verif ifcatio tio Integr In egrato ton Custimiz ized Paramet eters Ready SoC Desig ign Integraton Int non-critcal path Bob Ledzius April 5, 2018 Innovatng! Together.

  5. Au Autom omated Cr Crit itcal al Path Desig ign New w IP Paramet eter eriz ized Reque equests ZERO EFFORT IP IP Desig igo Aut utoma maton On-Dema n-Demand! nd! Prit itected Fuoc uoctioal ioal IP Shar ariog og Design gn & IP I Imports Ult ltra-High Test Bench C / / C++ / / R RTL TL IP Reu IP euse Gener enerato ton Verif ifcatio tio Custimiz ized Paramet eters REQUI UIRES: SoC Desig ign Int Integraton • Meth thid ids s if Op Operatio tio • Ar Arch chit itec ectu ture Tip ipilig ligy • Tiil iils non-critcal path Bob Ledzius April 5, 2018 Innovatng! Together.

  6. Integrated Sim imula laton Envir ironment New w IP Paramet eter eriz ized Reques equests IP IP Desig igo Syothesiz izable le Prit itected Full ll-Chip ip RTL Fuoc uoctioal ioal automa mated ed cr critcal path Expirt IP Shar ariog og IP I Imports Ult ltra-High C / / C++ / / R RTL TL Inhe heri rited IP a and nd IP IP Reu euse SoC D Design gn Verif ifcatio tio Verif ifcaton Custimiz ized Paramet eters SoC Desig ign Int Integraton Parameter Opt ptmiz izat aton non-critcal path Bob Ledzius April 5, 2018 Innovatng! Together.

  7. How Simple le? • Orchestrate designs by just adding IP and auto building simulaton ready RTL design with test bench. • Not simply IP sttching. Designs built upon a highly fmexible and confjgurable method o operaton and efcient architecture. • Designs may be simply tuned by defjning confjguraton setngs and limitng fmexibility as desired. • IP wrappers translate IP to SDA method o operaton. • Integrated compiled simulaton engine allows or inherited IP scripts or veri ying IP in it’s integrated orm. • Automatc user guide documentaton. Bob Ledzius April 5, 2018 Innovatng! Together.

  8. How Simple le? • Integrated compiled simulaton engine allows or inherited IP scripts or veri ying IP in it’s integrated orm. • Inherited oundaton and IP specifjc tasks or aiding system simulaton and UVM build environments • Interactve TCL based scriptng environment. • C/C++ model capable Bob Ledzius April 5, 2018 Innovatng! Together.

  9. How Accessible le? Concertal Players, • Web secure accessible – no sofware installs! Auditon, Orchestrate, • ORCHESTRATE SoC Developer – ull hands-of and Rehearse SoC/FPGA design rom PLAYERS IP library elements. • AUDITION IP Developer – IP specifjcaton and import o IP and IP test benches. • REHEARSE Simulaton – interactve and TCL IP CM Repositories script based simulaton environment • All SDA accomplished server side • IP source code protected untl export. • Controlled IP and SoC design sharing. • SDA ecosystem available to all project stakeholders. Concertal Site Servers Bob Ledzius April 5, 2018 Innovatng! Together.

  10. SDA A Val alue Prop oposit iton on • SIMPLIFY AND ACCELERATE • UNIQUELY COMPLIMENTARY • STRONGER TOGETHER • CONSISTENT QUALITY • EXPERIENCED EXPERTS Bob Ledzius April 5, 2018 Innovatng! Together.

  11. IP Reuse for or th the Mas asses! Automated ront-end SoC/FPGA design through IP reuse Scalable in rastructure and community Secure web-based accessibility or IP providers and SoC/FPGA developers Bob Ledzius April 5, 2018 Innovatng! Together.

  12. Innovatng! Together. THANK YOU! Q & A

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