High Performance Cognitive Radio Platform with Integrated Physical - - PowerPoint PPT Presentation

1

High Performance Cognitive Radio Platform with Integrated Physical & Network Layer Capabilities

Bryan Ackland, Ivan Seskar WINLAB, Rutgers University bda@winlab.rutgers.edu seskar@winlab.rutgers.edu www.winlab.rutgers.edu

2

Dynamic Spectrum Allocation

Large, increasing demand for wireless services Static frequency bands allocated to single service

Inefficient use of spectrum Slow, expensive political process Locally optimized incompatible solutions

FCC exploring alternatives

ISM & U-NII bands

Power and BW limitations to allow co-existence Successful but quickly getting congested

Intelligent or “Cognitive” radios that adapt to local

wireless environment

Improve spectrum efficiency and fairness

3

Cognitive Radio

Programmable radio systems that adapt to:

Changing radio interference Availability of nearby collaborative nodes Changing protocols & standards Application requirements

by modifying

Frequency, power, bandwidth Modulation, coding, MAC Network protocols

and coordinating with other cognitive systems to

maximize spectral efficiency and fairness

4

Cognitive Radio Implementation

Tradeoff between flexibility, performance & power “Moore’s Law” improvements in CMOS VLSI

Implement some functions in SW Ultimate goal: software radio?? Reality: some combination of HW, SW and reconfigurable logic

Silicon area efficiency

flexibility speed, power, cost 1 10 100 1000 Microprocessor DSP FPGA ASIC

A/D µP

5

Programmable Wireless Networks

Research Goals:

Investigate Cognitive Radio Strategies &

Spectrum Sharing Algorithms

Explore flexible, power efficient wireless

architectures

Develop board level platform for system

prototyping & subsequent distribution to research community

6

Project Team

WINLAB, Rutgers University

Bryan Ackland Ivan Seskar

• D. Raychaudhuri

Chris Rose

GEDC, Georgia Institute of Technology

Joy Laskar Stephane Pinel

Wireless Res. Lab., Lucent Bell Laboratories

Tod Sizer Dragan Samardzija

7

Platform Goals

Design & build cognitive radio platform that is

High performance HW & SW Programmable Physical, baseband & network layer adaptable Support wide range of spectrum sharing scenarios

Leverage today’s high performance off-the-shelf

components to build experimental platform with maximum utility & flexibility

Demonstrate architectures and components that

will enable low cost, low power, flexible integrated circuit implementations in near future.

8

Spectrum Management: Problem Scope

Spectrum Allocation Rules (static)

INTERNET BTS

Auction Server (dynamic)

Spectrum Coordination Server (dynamic)

AP

Ad-hoc sensor cluster (low-power, high density) Short-range infrastructure mode network (e.g. WLAN) Short-range ad-hoc net Wide-area infrastructure mode network (e.g. 802.16)

• Dense deployment of

wireless devices, both wide- area and short-range

• Proliferation of multiple

radio technologies, e.g. 802.11a,b,g, UWB, 802.16, 4G, etc.

• How should spectrum

allocation rules evolve to achieve high efficiency?

• Available options include:
• Agile radios

(interference avoidance)

• Dynamic centralized

allocation methods

• Distributed spectrum

coordination (etiquette)

• Collaborative ad-hoc

networks

Etiquette policy Spectrum Coordination protocols Spectrum Coordination protocols Dynamic frequency provisioning

9

Cognitive Radio: Design Space

Hardware Complexity

“Open Access” + smart radios

Protocol Complexity (degree of coordination)

Reactive Rate/Power Control Reactive Rate/Power Control Agile Wideband Radios Agile Wideband Radios Unlicensed Band with DCA (e.g. 802.11x) Unlicensed Band with DCA (e.g. 802.11x) Internet Server-based Spectrum Etiquette Internet Server-based Spectrum Etiquette Ad-hoc, Multi-hop Collaboration Ad-hoc, Multi-hop Collaboration Radio-level Spectrum Etiquette Protocol Radio-level Spectrum Etiquette Protocol Static Assignment Static Assignment Internet Spectrum Leasing Internet Spectrum Leasing

“Cognitive Radio” schemes

UWB, Spread Spectrum UWB, Spread Spectrum Unlicensed band + simple coord protocols

10

Cognitive Radio: Capabilities

Spectrum scanning & frequency agility Fast physical layer adaptation & power control to

respond to changing local conditions

Flexible baseband & MAC switchable on a

packet-by-packet basis (SDR) to provide interoperability with multiple radio technologies

Capable of higher layer spectrum etiquette or

negotiation protocols

Simultaneous heterogeneous radio links Protocol translation & routing to support

heterogeneous and/or ad-hoc networks

11

Cognitive Radio Platform

Separate sub-systems to simplify functional implementation

& modification by students in experimental environment

Flexible RF Flexible RF Flexible RF Flexible Baseband (SDR) Network Processor (MAC+) CR Strategy (host)

local drop

Flexible Antenna

12

Platform Partitioning

Flexible RF Flexible RF Flexible RF Flexible Baseband (SDR) Network Processor (MAC+) CR Strategy (host) Flexible Antenna A/D/A A/D/A A/D/A

Baseband & Network Processor Board (Rutgers & Lucent) Antenna & RF Board (Georgia Tech.) A/D/A Board (Rutgers)

13

Agile Tri-band RF Front-end

Tri-band operation:

700-800 MHz 2.40-2.48 GHz ISM band 5.15-5.825 GHz ISM and UN-II bands

2 Transmit + 2 Receive channels for data + spectrum

monitoring receiver

20 MHz bandwidth on each channel tunable over band

Narrow band selection performed at baseband

100mW transmit power (variable) per channel Sensitivity & linearity to meet 802.11a

14

Tri-band Agile Receiver

To baseband A/D’s tri-band antenna tri-band VGA

~

tri-band RX 20 MHz BW IF filter Power detection Standard identification Tri-band Sensing /Monitoring Unit

~

tri-band RX 20 MHz BW IF filter

~

tri-band RX 20 MHz BW IF filter

SW

M A T R I x 800 MHz 2.4 GHz 5.2 GHz 800 MHz 2.4 GHz 5.2 GHz AgileTriband LNA + Agile High Q matching network

tri-band antenna

SOC SOP

~

Low-IF ~150 MHz I Q I Q Channel 1 Channel 2 I Q I Q I Q

15

Reconfigurable RFIC’s for Compact Intelligent RF Front-end

2 3 4 5 6 7 0.25 0.3 0.35 0.4 0.45 0.5 0.55 Band-I Band-II

Oscillation Frequency (in GHz) Vtune (in V)

Switched-L Frequency Agile VCO

16

Tri-band Antennas

Triple-Broadband Antenna for handheld terminals

• planar antenna structure
• multi-band
• broadband

PCB

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 1 2 3 4 5

VSWR Frequency (GHz)

Frequency Range (MHz): 810-1000 1600-2500 4000-6000 VSWR: ≤1.5 Pattern (azimuth plane) : Omni-directional Non-omni Peak Gain (azimuth plane) : 0 dBi 3 dBi Polarization: Mixed Antenna dimensions: 50 mm ×50 mm ×0.2 mm

17

FR-4 Organic high density multi-layer Reconfigurable CMOS RFIC Multi- band/wideband antenna. RF Tx / Rx RF-MEMS Switch Flexible baseband

L 1 O u t V D D C 1 R 3 R Vg ain C 4 C 5 V b Q 1 GN D G N D G N D Q 3 R G N D C 2 C 3 Q 2 R 2 G N D V D D R 1 L(active) V D D 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 1 2 3 4 5

VSWR Frequency (GHz)

Reconfigurable CMOS RFIC RF-MEMS Switch & Multi-band Antenna

GaTech System-on-Package

18

Baseband & Network Processor

Interface to multiple radio channels Real time spectral analysis Support comparison of HW & SW baseband

solution

MAC, protocol conversion, SAR, routing Data rates (total) up to 100 Mb/s Support novel reconfigurable architectures in

baseband and network layers

Clean partitions between Baseband, NP and CR Simple programming environment (not DSP) Fast reconfiguration time (~µs)

19

MPC8260 TMS320C6701 XC2V6000 FPGA Ethernet

Bell Labs Programmable Radio Platform

6M gates programmable logic 2.5 Megabits DPRAM in

FPGA

144 dedicated multipliers 1 GFLOPS TMS320C6701 280 MIPS MPC8260 244 configurable I/O pins

Megarray Connector- 244 Configurable I/O pins

20

WINLAB Baseband Platform GV300

• 2 Virtex™-II FPGAs

(XC2V3000) each with 256K x 18 ZBT SRAMs

• 1 Spartan™-II FPGA for

External Interface

• 1 Spartan™-II FPGA for

Configuration Control

• USB interface
• Four 100 MHz 12-bit A/D

and four 100 MHz 12-bit D/A channels

• On-board 100 MHz

programmable clock

• scillator
• 32 Bit LVDS interface
• 2M x 8 configuration

FLASH

21

Baseband FPGA Virtex-4 94K logic cells 160 DSP slices

PowerPC (RTOS)

Network FPGA Virtex-4 94K logic cells Soft RISC cores SRAM (4MB) SDRAM (128MB) PowerPC PowerQuick III 600 MHz (LINUX) DRAM (64MB)

64

EEPROM (config)

Baseband & Network Processor

Data, control & sensing to/from RF front-end Gig-E USB-II

22

Network Processor based on Multiple RISC Cores

Packet Scheduler (RISC) Header Buffer Packet Buffer (DRAM) Packet Processor (RISC/reconfig) Packet Processor (RISC/reconfig) Packet Processor (RISC/reconfig) Local I&D Local I&D External DRAM Local I&D

to/from baseband to/from CR host

23

SW Development Environment

Need efficient multi-user, multi-proc. compile &

debug

Short learning curve for student SW developers

Linux OS with Gnu tool chain

Open source Modular: I/O drivers can be installed without kernel

modification or reboot

User friendly development environment

Simulink models compiled to VHDL and/or C

24

Milestones & Timeline

2-3 Cognitive Radio Scenario Demos*

System Baseband & Network Proc. RF Front-end

Integrated SIP/SOC agile tri-band radio Y3 Q4 Y3 Q3

• 1. Board spin
• 2. Baseline SW release

Y3 Q2 Y3 Q1 System Prototype based on:

• 1. Lucent BB&NP
• 2. Gatech Agile Radio

Prototype boards available Y2 Q4 Prototype Software Dev. Env. Y2 Q3 Agile prototype – mainly off the shelf – some custom components – full functionality Y2 Q2 Y2 Q1 Proof of concept system prototype based on:

• 1. Existing WINLAB board
• 2. Gatech prototype
• 1. Component selection &

schematics.

• 2. Software Specification

Initial prototype – off the shelf components – limited flexibility Y1 Q4 Detailed Architecture Specification Y1 Q3 Result of HW (FPGA) and SW implementation studies Detailed performance & interface specs (12/04) Y1 Q2 Y1 Q1 *Note: Further release of Cognitive Radio Boards to community contingent on separate funding