High Performance ADCs for 5G Benjamin Hershberg imec, Leuven, Belgium
5G NR FR2: ADC REQUIREMENTS Benjamin Hershberg High Performance ADCs for 5G 2 of 60
5G NR FR2: 3GPP specs 5G Bandwidth Specs Channel: 50MHz, 100MHz, 200MHz, 400MHz ◼ Max. Aggregation: 800MHz ◼ Widest Band: 3.25GHz (24.25GHz – 27.50GHz) ◼ Agg. 28GHz Bands: 5.25GHz (24.25GHz – 29.50GHz) ◼ ...and need >1.5x more bandwidth to relax anti-alias filter. 5G Modulation Specs QPSK, 16 QAM, 64 QAM, 256 QAM ◼ Future: 1024 QAM ◼ [3GPP , 2019] Benjamin Hershberg High Performance ADCs for 5G 3 of 60
5G NR FR2: ADC specs Translation into ADC specs depends heavily on system-level choices Receiver chain SNR budget ◼ % of standard supported ◼ Let’s see what we can do across the large range of likely 5G ADC specs: Resolution: 7 – 13 bits ◼ Speed: 400 MS/s – 12 GS/s ◼ Linearity: 65 dB – 85 dB SFDR ◼ (needs to cover Mobile-Terminal, Base-Station, etc...) Benjamin Hershberg High Performance ADCs for 5G 4 of 60
5G NR FR2: ADC SoTA CHANNEL AGG. CHANNEL BAND [Murmann, 2019] Benjamin Hershberg High Performance ADCs for 5G 5 of 60
Linearity SoTA CHANNEL AGG. CHANNEL BAND [Murmann, 2019] Benjamin Hershberg High Performance ADCs for 5G 6 of 60
Linearity considerations SFDR/THD specs can be harder than SNR specs! Noise power gets spread across large bandwidth ◼ Distortion power remains concentrated at specific frequencies ◼ dB Continuous-time input spectrum: f S1 /2 f S2 /2 freq dB Low speed ADC after sampling: f S1 /2 dB High speed ADC after sampling: f S2 /2 Benjamin Hershberg High Performance ADCs for 5G 7 of 60
More considerations Industry SoTA Beamforming requires many ADCs Vaz Devarajan Straayer Wu Ali Power efficiency ◼ ISSCC ISSCC ISSCC ISSCC VLSI 2016 2017 2017 2016 2016 Area efficiency ◼ Architecture Pipe-SAR Pipeline Pipeline Pipeline Pipeline An industrial solution today: Sampling rate [Gsps] 4 10 4 4 5 Technology [nm] 16 28 65 16 28 500mW 4GS/s ADC in 0.5mm 2 x 128 element digital beam-forming ENOB Nyquist [bit] 9.2 8.8 8.9 9.0 9.3 = 64 Watts SFDR Nyquist [dB] 67.0 64 64.0 68.0 70 = 64 mm 2 Power [mW] 513 2900 2214 300 2300 Reconfigurability FoM Walden [fJ/c.step] 214 631 1130 145 709 Large variation in required ◼ FoM Schreier [dB] 153 147 145 154 148 performance depending on mode (e.g. 50MHz vs. 800MHz BW) Area [mm²] 1.04 20.2 11.0 0.34 14.4 Benjamin Hershberg High Performance ADCs for 5G 8 of 60
Case Study: MIMO Transceiver Many ADCs [Jann ISSCC 2019] First fully-integrated 5G TRX ◼ Modest ADC specs 400 MS/s ◼ 7.7 ENOB ◼ ...but ADC is still biggest slice of RX power! ◼ Benjamin Hershberg High Performance ADCs for 5G 9 of 60
Conclusions: 5G NR FR2 requirements High speed (400MS/s - 12GS/s) Medium resolution (7 - 13b) Industry SoTA can ☺ meet these specs... High linearity (65dB - 85dB) Low power ...but not necessarily with acceptable power / area. Low area Benjamin Hershberg High Performance ADCs for 5G 10 of 60
GETTING TO GIGA-SAMPLE SPEEDS Benjamin Hershberg High Performance ADCs for 5G 11 of 60
Giga-samples: how do we get there? Two possible strategies: 1. Fast single-channel Practical technology speed limits Many c locking overheads don’t scale w/ clock Limited architecture choices V IN 2 GS/s Benjamin Hershberg High Performance ADCs for 5G 12 of 60
Giga-samples: how do we get there? 100 MS/s Two possible strategies: 100 MS/s 100 MS/s 100 MS/s 1. Fast single-channel 100 MS/s Practical technology speed limits 100 MS/s 100 MS/s Many c locking overheads don’t scale w/ clock 100 MS/s Limited architecture choices 100 MS/s V IN 2 GS/s 100 MS/s V IN 100 MS/s 2. Interleave several slower channels 100 MS/s Interleave errors (spurs) 100 MS/s Easy to correct: Offset, Gain 100 MS/s Hard to correct: Skew, Bandwidth 100 MS/s 100 MS/s Larger input load to drive 100 MS/s Larger area 100 MS/s 100 MS/s 100 MS/s Benjamin Hershberg High Performance ADCs for 5G 13 of 60
Giga-samples: how do we get there? Combine both strategies First: maximize channel speed ◼ Then: interleave as necessary ◼ 1 GS/s V IN 2 GS/s V IN 1 GS/s Core mission statement: Maximize per-channel speed! Benjamin Hershberg High Performance ADCs for 5G 14 of 60
Pipelining Pipelining Example 3b/stage Pipelined ADC Appears in all medium/high ◼ resolution giga-sample ADCs Σ V IN T/H x4 V RES Break task into smaller pieces ◼ 3b flash 3b Pass incomplete result along ◼ sub-ADC sub-DAC for more processing 3 D OUT Minimize # of operations in V IN Stage 1 Stage 2 Stage 3 Stage 4 Backend critical timing path 3 3 3 3 4 Sample ◼ 12 Time Alignment & Digital Error Correction D OUT Quantize ◼ Amplify ◼ 2b/stage of quantization • 1b/stage of redundancy (error correction) • Benjamin Hershberg High Performance ADCs for 5G 15 of 60
Case study: Deep Pipeline [Wu, ISSCC 2016] System 4 GS/s Channel 1 GS/s SNDR 56 dB SFDR 68 dB Power 300 mW FoM W 146 fJ/cs 1.5b/stage Flash ADC Quantizer ☺ Fast! Minimum set of actions per stage Many stages / residue amplifiers Benjamin Hershberg High Performance ADCs for 5G 16 of 60
Case study: Pipelined SAR [Vaz, ISSCC 2017] System 4 GS/s Channel 500 MS/s SNDR 57 dB SFDR 67 dB Power 513 mW FoM W 214 fJ/cs Area = 1mm 2 SAR as a sub-ADC ☺ Fewer stages / amplifiers ☺ Power efficient sub-ADC Slower channel speed 16nm Benjamin Hershberg High Performance ADCs for 5G 17 of 60
Case study: Hybrid Pipeline [Brandolini, JSSC 2015] System 5 GS/s Channel 2.5 GS/s SNDR 52 dB SFDR 58 dB Power 150 mW FoM W 96 fJ/cs Fast frontend, slower backend ☺ Fast frontend minimizes interleave factor ☺ Interleaved SARs improve backend efficiency Frontend amplifiers still power-hungry Benjamin Hershberg High Performance ADCs for 5G 18 of 60
AMPLIFICATION: THE HIDDEN BOTTLENECK Benjamin Hershberg High Performance ADCs for 5G 19 of 60
Amplification Pipelining requires passing along analog residues To go high speed, you need good amplifiers! Σ V IN T/H x4 V RES 3b flash 3b sub-ADC sub-DAC 3 D OUT V IN Stage 1 Stage 2 Stage 3 Stage 4 Backend 3 3 3 3 4 12 Time Alignment & Digital Error Correction D OUT Benjamin Hershberg High Performance ADCs for 5G 20 of 60
Case study: Industry Gigasample ADCs Class-A opamps in nanoscale CMOS 2.5V Not enough voltage headroom Poor efficiency / technology scaling Requires a special high-voltage supply Eliminates all hope of high efficiency But lacking better options, this is still what many in industry use... [Ali, JSSC 2014] Benjamin Hershberg High Performance ADCs for 5G 21 of 60
Case study: Industry Gigasample ADCs [Wu, VLSI 2013] Wu, VLSI 2013 All 3 ADCs use the same residue amplifier on 1.8V • Fs 5.4 GS/s 5.4GS/s Core circuits on 1.4V/0.4V ◼ • SNDR 52 dB 52dB SNDR ◼ 500mW Power 500 mW ◼ [Wu, ISSCC 2016] Brandolini, JSSC 2015 Fs 4 GS/s 5GS/s ◼ SNDR 56 dB 52dB SNDR ◼ Power 300 mW 150mW ◼ [Brandolini, JSSC 2015] Wu, ISSCC 2016 Fs 5 GS/s 4 GS/s ◼ SNDR 52 dB 56dB SNDR ◼ Power 150 mW 300mW ◼ Benjamin Hershberg High Performance ADCs for 5G 22 of 60
Case study: Industry Gigasample ADCs [Wu, VLSI 2013] Wu, VLSI 2013 Fs 5.4 GS/s 5.4GS/s ◼ 8 high-performance amps SNDR 52 dB 52dB SNDR ◼ 500mW Power 500 mW ◼ [Wu, ISSCC 2016] Wu, ISSCC 2016 Fs 4 GS/s 4 GS/s ◼ 2 high-performance amps SNDR 56 dB 56dB SNDR ◼ 14 low-performance amps Power 300 mW 300mW ◼ [Brandolini, JSSC 2015] Brandolini, JSSC 2015 Fs 5 GS/s 5GS/s ◼ 2 high-performance amps SNDR 52 dB 52dB SNDR ◼ Power 150 mW 150mW ◼ Benjamin Hershberg High Performance ADCs for 5G 23 of 60
Amplification: The Hidden Bottleneck Power Efficiency Performance High Voltage Supply Calibration Complexity Amplifier Bottleneck Linearity Architectural Architectural Freedom Freedom Input Swing Output Swing Benjamin Hershberg High Performance ADCs for 5G 24 of 60
Conclusions: Amplifier Bottleneck Class-A opamps will never be good in scaled CMOS Severely constrains ADC design freedoms ◼ 2010’s were the era of the (amplifier -less) SAR ADC ◼ A new approach is needed! Benjamin Hershberg High Performance ADCs for 5G 25 of 60
EMERGING AMPLIFICATION SOLUTIONS Benjamin Hershberg High Performance ADCs for 5G 26 of 60
Emerging Amplification Solutions Open loop Found in state-of-the-art Gm-C integrator Gigasample ADCs Gm-R amplifier Charge-pump based ◼ Feedback Ring amplifier Zero-crossing based circuit ◼ Charge-steering amplifier ◼ Digital amplifier ◼ Benjamin Hershberg High Performance ADCs for 5G 27 of 60
Amplifier Wishlist Benjamin Hershberg High Performance ADCs for 5G 28 of 60
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