HCLs and HCL2D thought that you might have given us a bye for one need to discuss amongst ourselves 3 selected anonymous feedback (2) “It seems that the quizzes were added to the page MUCH later than usual instead of coming up at least one quiz in advance and for whatever reason I week, didn’t realize that it just came late and ended not RISC-like: variable-length encoding up getting a zero for it. Doubtful you all can do anything about this but please keep uploading the quizzes early.” we will upload a placeholder “no quiz this week” quiz if there is no quiz for a week and yes, try to post early over other quiz questions being unclear e.g. “nop” is less bytes than “mrmovq” 1 selected anonymous feedback (1) logistics — exam there is an exam next Thursday next Tuesday — fjnishing up this topic + review next Wednesday — review with your lab TAs (entirely optional) 2 “Could you make the slides available some time in question the morning before lecture, so that we can have the option of printing them & taking notes on them in class?” mine: draft sometimes already posted “all lecture notes” link at top of schedule page on “simpler instructions can take up less space…” 4
selected anonymous feedback (3) still want held-out test cases (no hard-coding answers) simulator is miserable to use. I would like to see the test cases that are being run, and the output form that is expected of the functions. It is very hard to understand what to do when we dont know what you are testing the functions for.” probably should’ve given refresher on pointers-to-pointers would like to give AddressSanitizer output (or similar), selected anonymous feedback (5) but logistically hard “normal” assignment: no student-accessible autograder 7 selected anonymous feedback (6) office hour problems late Tuesday primary problem: TA missed their OH but queue not closed “For the hw, the directions are not clear enough, and the online 6 “Why do labs and homeworks have nothing to do and/or “things we thought were taught on 2150” with what we’re learning in lecture? It’s incredibly stressful to be handed these assignments when we’re not talking about them (nor are we learning anything about C) in lecture.” can’t really give you Y86-64 assignment yet mostly delay between lecture and HW scheduling constraint: avoided HW before strsep bug fjxed Monday — very sorry about this 5 selected anonymous feedback (4) on the homework: “Maybe don’t recommend coding in the assignment area because it can ”lose contact with the server” and, even though it assures you that your code is saved when the save button is pressed, it loses it when you refresh the page. Nice.” 8
describing hardware often abstracts away details like: somewhat difgerent from textbook’s HCL assumes you’re making a processor built for this course our tool: HCL2D 11 those details also not a topic in this course … how to build MUXes from gates how to build memories from transistors how to build registers from transistors how to build arithmetic operations from gates (typically) text-based representation of circuit how do we describe hardware? programming language for hardware hardware description language 10 not commonly used for processors such commercial tools exist, but… yes, something you can do circuits with pictures? 9 count add 1 pictures? 12
use is mandatory use is mandatory register pF { use is mandatory use is mandatory nop CPU p_thePc = F_thePc + 1; built-in component: Stat = STAT_AOK; built-in component pc = F_thePc; thePc : 64 = 0; } HLT: stop STAT_AOK Stat add 1 Mem. Instr. AOK: continue nop CPU 13 } HLT: stop AOK: continue built-in component: Stat = STAT_AOK; built-in component pc = F_thePc; thePc : 64 = 0; thePc STAT_AOK Stat add 1 Mem. Instr. thePc thePc nop CPU 13 pc = F_thePc; 13 HLT: stop AOK: continue built-in component: Stat = STAT_AOK; built-in component p_thePc = F_thePc + 1; thePc } thePc : 64 = 0; STAT_AOK Stat add 1 Mem. Instr. HLT: stop nop CPU Instr. Mem. AOK: continue built-in component: Stat = STAT_AOK; built-in component pc = F_thePc; p_thePc = F_thePc + 1; 13 } thePc : 64 = 0; STAT_AOK Stat add 1 “ pc ” “ i10bytes ” “ pc ” “ i10bytes ” register pF { “ pc ” “ i10bytes ” “ pc ” “ i10bytes ” register pF { register pF { p_thePc = F_thePc + 1;
use is mandatory use is mandatory p_thePc = F_thePc + 1; built-in component: AOK: continue HLT: stop 13 nop CPU thePc Instr. Mem. add 1 Stat STAT_AOK thePc : 64 = 0; } pc = F_thePc; thePc built-in component Stat = STAT_AOK; built-in component: AOK: continue HLT: stop 13 nop CPU: running need a program in memory .yo fjle tools/yas — convert .ys to .yo tools/yis — reference interpreter for .yo fjles if your processor doesn’t do the same thing… can build tools by running make Stat = STAT_AOK; nop CPU built-in component pc = F_thePc; Instr. Mem. add 1 Stat STAT_AOK thePc : 64 = 0; } p_thePc = F_thePc + 1; pc = F_thePc; built-in component Stat = STAT_AOK; built-in component: AOK: continue HLT: stop 13 add 1 p_thePc = F_thePc + 1; } thePc : 64 = 0; STAT_AOK Stat 14 Mem. Instr. thePc nop CPU “ pc ” “ i10bytes ” “ pc ” “ i10bytes ” use is mandatory register pF { register pF { “ pc ” “ i10bytes ” register pF {
nop CPU: creating a program R8: 0 | R12: 0 | R11: 0 R10: 0 | R9: 0 | 0 0 RDI: 0 | RSI: 0 | RBP: 0 RSP: 0 | RBX: R13: R14: RDX: 0x0000000_: .... 2 ----------------------+ 1 and +------------------- between cycles pc = 0x0; loaded [10 : nop] +-----------------------------------------------------------------------+ | 10 10 10 10 10 | 0 | | _c _d _e _f _8 _9 _a _b _4 _5 _6 _7 _0 _1 _2 _3 | used memory: | thePc=0000000000000000 | register pF(N) 0 | 0 create assemby fjle: nops.ys: 0x000: 10 | nop 0x004: 10 | nop 0x003: 10 | nop 0x002: 10 | nop 0x001: 10 | nop more readable/simpler than normal executables: loaded into data and program memory nop.yo 15 nops.yo assemble using tools/yas nops.ys or make nop nop nop nop nop | parts left of | just comments RCX: -d --debug 0 | RAX: 1 ----------------------+ 0 and +------------------- between cycles $ nop_cpu.exe nops.yo running simulator 17 : show every action during simulation : only show final state 16 -q --quiet -i --interactive : pause every clock cycle : time out after that many steps (default: 10000) [a number] Options: USAGE: ./nop_cpu.exe [options] somefile.yo then, ./nop_cpu.exe : run make nop_cpu.exe put HCL2D code in nop_cpu.hcl building a simulator 18
running simulator 0 | RBX: 0 RSP: 0 RBP: 0 | | RSI: 0 RDI: R8: RDX: 0 | | R9: 0 R10: 0 R11: 0 | | R12: 0 0 | 0 0 1 and | | 0x0000000_: 10 10 10 10 10 | +-----------------------------------------------------------------------+ pc = 0x0; loaded [10 : nop] +------------------- between cycles 2 ----------------------+ RCX: .... 18 running simulator $ nop_cpu.exe nops.yo +------------------- between cycles 0 and 1 ----------------------+ | RAX: 0 R13: R14: _8 _9 _a _b extract opcode add 1 valP Stat M U X STAT_AOK STAT_HLT STAT_INS register pP { Instr. thePc : 64 = 0; } p_thePc = P_thePc + 1; pc = P_thePc; Stat = [ i10bytes[4..8] == NOP : STAT_AOK; i10bytes[4..8] == HALT : STAT_HLT; 1 : STAT_INS; (default case) ]; Mem. thePc 0 | | | register pF(N) thePc=0000000000000000 | | used memory: _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 _a _b _c _d _e _f | 0x0000000_: nop/halt CPU 10 10 10 10 10 | +-----------------------------------------------------------------------+ pc = 0x0; loaded [10 : nop] +------------------- between cycles 1 and 2 ----------------------+ .... 18 _c _d _e _f _4 _5 _6 _7 $ nop_cpu.exe nops.yo thePc=0000000000000000 0 R11: 0 | | R12: 0 R13: 0 R14: 0 | | 0 | used memory: _0 _1 _2 _3 _4 _5 _6 _7 _8 _9 _a _b _c _d _e _f | | 0x0000000_: 10 10 10 10 R10: | R9: _0 _1 _2 _3 | RBX: +------------------- between cycles 0 and 1 ----------------------+ | RAX: 0 RCX: 0 RDX: 0 | 0 0 | RSP: 0 RBP: 0 | | RSI: 0 RDI: 0 R8: 10 | +-----------------------------------------------------------------------+ 0 | RDI: 0 R8: 0 | | R9: 0 R10: 0 R11: | R12: | RSI: 0 R13: 0 R14: 0 | | register pF(N) thePc=0000000000000000 | | used memory: 0 0 | pc = 0x0; loaded [10 : nop] 1 ----------------------+ +------------------- between cycles 1 and 2 ----------------------+ .... 18 running simulator $ nop_cpu.exe nops.yo +------------------- between cycles 0 and | RAX: RBP: 0 RCX: 0 RDX: 0 | | RBX: 0 RSP: 0 19 | register pF(N)
Recommend
More recommend
