Enabling High Frequency Electronics Ernesto Limiti ARES and - - PowerPoint PPT Presentation

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Enabling High Frequency Electronics Ernesto Limiti ARES and - - PowerPoint PPT Presentation

Enabling High Frequency Electronics Ernesto Limiti ARES and Dipartimento di Ingegneria Elettronica, Universit degli Studi di Roma Tor Vergata limiti@ing.uniroma2.it EE Dept., Universit di Roma Tor Vergata, Italy, 26th September 2014 ARES


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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

Ernesto Limiti

ARES and Dipartimento di Ingegneria Elettronica, Università degli Studi di Roma Tor Vergata limiti@ing.uniroma2.it

Enabling High Frequency Electronics

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES and High Frequency Electronics

  • ARES

ARES Consor Consortium ium has its main facilities and competences in high-frequency electronics at the Department of Electronic Engineering (DIE) of the University of Roma Tor Vergata (the building where the meeting is held).

  • The group at the DIE is composed by more than 20 people,

including permanent staff (professors, researchers, technicians) and post-doc/PhDs.

  • The heritage in microwaves and millimeter wave techniques

dates back to the early ‘80s, thus summing up to more than 30 years experience.

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Activities - 1

Two main directions, namely

  • Device/subsystem

vice/subsystem characterization characterization and nd modelling modelling: linear, non-linear and noise up to 110GHz (and above), scaleable, bias- dependent modelling with different approaches (equiv equivalent- lent- circuit circuit, black-bo black-box, physical physical).

  • Circuit

Circuit and nd subsystem subsystem design esign: Amplifiers (PAs, LNAs, VGAs, DPAs ...), Mixers (resistive, passive, active …), frequency multipliers, multifunction (Core chips, TR chips, Integrated Receivers …) adopting state-of-the-art design methodologies. Long-track experience in Hybrid brid as well as MMIC MMIC design with many foundries (SLX, UMS, OMMIC, NGS, TRW, Triquint, Raytheon, …).

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Characterization Facilities - 1

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  • 2 Vector Network Analysers (HP 8510C 0.05-50 GHz and Anritsu 37XXXD,

0.05-65 GHz, extended to 110 GHz)

  • 2 Spectrum Analyser (HP 70000 DC-40 GHz, Agilent PSA E4448A 3Hz-

50GHz)

  • Noise Measurement System (HP8970B-HP8971C DC-26.5 GHz, with

proprietary amplified SSB extension to 40 GHz)

  • 2 Elettromechanical Tuners (Focus 0.08-18 GHz e 3-50 GHz)
  • Digital Sampling Oscilloscope (TekTronix up to 50 GHz)
  • I-V Pulsed Measurement System (GaAs Code)
  • Power Amplifier (AR 0.8-4.2 GHz - 25 W)
  • Synthesised Sources (2 Anritsu MG3692A 2-20 GHz e HP 83640A DC-40

GHz)

  • Vector Signal Source (Agilent E4438C 250 kHz-6 GHz)
  • Probe Stations (Cascade Microtech RF-1 and proprietary semi-authomated
  • ne, equipped with anti-vibrating tables)
  • Cryogenic Probe Station (down to 20 K, proprietary)
  • Test-fixtures (Wiltron, Agilent, …)

Tor Vergata

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Characterization Facilities - 2

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Access to ccess to Activ tive Harmonic

  • nic Load-P

Load-Pull ull

Gate/Base Bias Network Drain/Coll Bias Supply On Wafer DEVICE Probe Station

CIRCULATOR

ISOLATOR ISOLATOR

BIAS TEE BIAS TEE

BANDPASS FILTER AT 6.5 GHz

DIRECTIONAL COUPLER

E5052A SIGNAL SOURCE ANALYZER

DIRECTIONAL COUPLER

SPECTRUM ANALYZER AND POWER METER

PC SOFTWARE CONTROL AND DATA ACQUISITION LOOP FREQUENCY AND AMPLITUDE TUNING IC/ID ACQUISITION

ZIN TUNING ZOUT TUNING

PHASE NOISE DATA ACQUISITION POWER AND FREQUENCY DATA ACQUISITION Computer Controlled Microwave Tuner Computer Controlled Microwave Tuner Computer Controlled Microwave Tuner

S1 S2 S3 S3c T3 T1 T2

50 Ohm

Access to ccess to Phase Phase noise

  • ise char

characterisation acterisation

RCVR

OUTPUT BLOCK SOURCE-PULL BLOCK

DUT

VNA Reference Planes DUT Reference Planes CH 1 CH 2

VNA NS

TUNER IN TUNER OUT BIAS TEE BIAS TEE TERM

SP4T DPDT

S-P S-Par &N r &Noise

  • ise integr

integrated ated Test B est Bench nch Closed Closed Loop Loop Cryo pr probe station

  • be station (do

(down to 20K) n to 20K)

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Activities - 2

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ARES ARES facilities are clearly used for internally-funded and coordinated basic research, and are very often adopted to support external companies for

  • Technology assessment
  • Technology optimization (realise-characterise-model loop)
  • Technology development
  • Realized subsystem characterization
  • Active/passive device model extractions
  • PDKs development and verification
  • ad-hoc modelling
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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Activities - 3

7

Examples amples :

  • KorriGan

rriGan : first large European-scale GaN project, in which MECSA acted (also) as device modelling center for Selex, III-V Lab and QinetiQ technologies, with evolving technologies.

  • GARANTE

GARANTE : Italian MoD project for 0.25m GaN technology assessment (Selex ES).

  • Quagas

agas : ASI project for Space qualification of 0.25m GaAs technology (Selex ES).

  • TeraSCREEN

raSCREEN : FP7 project, within which a 0.04m mHEMT technology is developed (OMMIC).

  • In

the past, several examples including COSMIC COSMIC, MANPO MANPOWER ER, ESPRIT ESPRIT IV IV European projects.

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Activities - 4

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… but ut also also technological technological investigations: nvestigations:

  • Physical

ysical simulation imulation and and modelling

  • delling (Monte Carlo, Drift-

diffusion …), using both commercial and ad-hoc simulation tools.

  • Thermal

Thermal simulation simulation and and modelling

  • delling (by using commercial and

ad-hoc simulation tools)

  • Thermal

Thermal characterization characterization (nonlinear thermal impedance measurements)

  • Basic

sic technological echnological exploration exploration (e.g. different semiconductor alloys and devices with non-conventional operating principles, such as Di Diamond)

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ARES Activities - 5

9

  • Regarding microwave circuit design, the research focus has

been historically directed towards Design Methodologies for high-efficiency transmitting subsystems and high performance receivers.

  • The heritage of ARES as circuit design center dates back to

the early ’90s with the COSMIC FP2 project (monolithic transimpedance amplifier design) and continues since then with the participation to many projects, both national and international, public- or privately funded.

  • All the major CAD tools are available (circuit, system and

EM-oriented), also for commercial commercial use.

  • A representative list is attempted in the following, as an

example of ARES capabilities and offer.

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

EDA project KorriGAN - 1

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2‐18 GHz SPDT GaN Switch X Band SPDT GaN Switch

Development of G lopment of GaN N HEMT HEMT Technology in E chnology in Europe

  • pe

(K (KorriGAN)

  • rriGAN),

, (2005-2009). (2005-2009).

  • To take advantage of

take advantage of high po high power r densities densities and po and power r handling handling of G

  • f GaN, S

N, Switching itching SPDT SPDT (up to 18 GHz) (up to 18 GHz) for transmitters. for transmitters.

  • Design

sign with S with Selex lex – SI and I and Tiger G ger GaN 0.25 μm N 0.25 μm microstrip technology microstrip technology

  • Small-

all- and Large-signal characterization of and Large-signal characterization of HEMT HEMT devices for devices for switching applications switching applications

  • Device modelling

vice modelling

  • Broadband (2-18
  • adband (2-18 GHz) and N

GHz) and Narr rrowband wband (X B (X Band) nd) SPDT switch design SPDT switch design

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

EDA project KorriGAN - 2

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2‐18 GHz GaN DLNA – V1

Development of G lopment of GaN N HEMT HEMT Technology in E chnology in Europe

  • pe

(K (KorriGAN)

  • rriGAN),

, (2005-2009). (2005-2009).

  • To take adv

take advantage of ntage of high r high robustness and po bustness and power r handling handling of G

  • f GaN devices

N devices for Lo for Low N w Noise ise applications. applications.

  • Design

sign with S with Selex lex – SI G I GaN 0.25 μm micr N 0.25 μm microstrip strip technology technology

  • Noise,

ise, Small- all- and Large-signal characterization of and Large-signal characterization of HEMT devices HEMT devices for for switching switching applications applications

  • Device modelling

vice modelling

  • 2 B

2 Broadband

  • adband (2-18 GHz) r

(2-18 GHz) robust LNA bust LNA designs as designs as cascade of cascade of distributed distributed amplifier amplifier cells cells

2‐18 GHz GaN DLNA – V2

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ASI project PROMIX - 1

12

X-band 1W MMIC Linear Power Amplifier in InGaP/GaAs HBT Technology X-band 10W MMIC High Power Amplifier in InGaP/GaAs HBT Technology

Design and sign and implementation of implementation of the the MMIC chip set MMIC chip set for X-band for X-band T/R T/R modules modules for for SAR SAR Payload of second generation yload of second generation (PR (PROMIX), MIX), (2009-2010

2009-2010).

  • Application: X-band

pplication: X-band T/R modules T/R modules for SAR for SAR

  • 2m

m GaInP/G P/GaAs HB As HBT T Technology chnology HB20PX fr HB20PX from

  • m

UMS UMS

  • Characterization

Characterization of HB

  • f HBT

T devices devices for model for model

  • ptimization
  • ptimization
  • Design and characterization of

sign and characterization of driver driver amplifiers amplifiers and and HP HPAs operating in pulsed condition As operating in pulsed condition (100 (100 us / 30% us / 30% duty) duty)

  • Optimization of HB

Optimization of HBT thermal T thermal behavior to avoid behavior to avoid thermal r thermal runaway naway

  • BUS bar

S bar solution for solution for the the final stage final stage

  • Optimization of large signal

Optimization of large signal working point to avoid working point to avoid parametric oscillations parametric oscillations

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ASI project PROMIX - 2

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Design and sign and implementation of implementation of the the MMIC chip set MMIC chip set for X-band for X-band T/R T/R modules modules for for SAR SAR Payload of second generation yload of second generation (PR (PROMIX), MIX), (2009-2010

2009-2010).

  • Application: X-band

pplication: X-band T/R modules T/R modules for SAR for SAR

  • 0.2

0.2m E/D P m E/D PHEMT technology ED02AH fr EMT technology ED02AH from

  • m

OMMIC OMMIC

  • Design and r

sign and realization of alization of a X-B a X-Band Cor nd Core Chip e Chip featur featured b ed by 6 bit phase control, 6 bit phase control, 6 bit amplitude 6 bit amplitude control control and and T/R switch, T/R switch, with integrated with integrated 3-stages 3-stages LNA and LNA and MP MPA

  • On-boar
  • board S/P

d S/P conv conversion ersion

  • T/R control

T/R control of amplifiers

  • f amplifiers’ biases

’ biases

  • Less than

Less than 15mm 15mm2 total ar total area ea

X-band Core Chip in OMMIC ED02AH Technology

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

ESA project SCFE

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Single GaN ngle GaN Chip F Chip Front-E

  • nt-End (SCFE),

d (SCFE), (2013-2014

2013-2014).

UMS SCFE Layout. MMIC size is 6.9 x 5.4 mm2 SLX SCFE Layout. MMIC size is 7.28 x 5.40 mm2.

  • Application: futur

pplication: future generation generation of C-band

  • f C-band T/R modules

T/R modules for SAR for SAR

  • 0.25

0.25m AlG m AlGaN/G N/GaN N HEMT HEMT Technology chnology GH25 fr GH25 from

  • m

UMS and 0.5 UMS and 0.5m AlG m AlGaN/G N/GaN HEMT N HEMT Technology chnology fr from S

  • m Selex

lex ES ES

  • Foundries

undries in the project team in the project team

  • Characterization of

Characterization of passive and active G passive and active GaN N devices for devices for model extraction/verification/optimization model extraction/verification/optimization

  • Design of

sign of SCFE in the two SCFE in the two technologies technologies integrating integrating HP HPA, LNA A, LNA and and T/R output switch T/R output switch to obtain 40W to obtain 40W

  • utput po
  • utput power (40% P

r (40% PAE), 36dB E), 36dB gain gain and and 2.5dB NF 2.5dB NF in in C B C Band nd

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

FP6 project RadioNET (Pharos)

15

Advanced RadioAstr nced RadioAstronomy nomy in in Europe

  • pe

(RadioNET (RadioNET), , (2006-2009

2006-2009).

FPA prototype

  • Application: build the futur

pplication: build the future instr instruments ments for for C-B C-Band nd

  • bser
  • bservation as focal-plane

ation as focal-plane array r array receivers ceivers

  • 0.2

0.2m pHEMT m pHEMT Technology ED02AH fr chnology ED02AH from OMMIC

  • m OMMIC
  • Design

sign of the entir

  • f the entire electr

e electronic

  • nic focal plane

focal plane array array components: components: LNAs, LNAs, MP MPAs, PSs, A As, PSs, ATTs (P (PAMs) AMs)

  • Assembly and

Assembly and test of the entir test of the entire focal plane e focal plane array array

  • Cryogenic (20K) operation of the LNAs,

yogenic (20K) operation of the LNAs, 77K operation 77K operation

  • f the P
  • f the PAMs

Ms

LNA (full C-Band) Buffered attenuator (full C-Band) 6-bit PS (full C-Band)

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014 16

ESA project SMPA

Switched itched Mode de Power Amplifiers R r Amplifiers Realization of alization of a a Transmitter based ransmitter based on

  • n

PWM (SMP PWM (SMPA), A), (2013-2015

2013-2015).

Transmitter architecture

  • Application:

pplication: study and development of study and development of a a Solid S lid State ate Transmitter for ansmitter for Synthetic nthetic Aper ertur ture Radar (SAR) Radar (SAR) in P-band (435 in P-band (435 MHz) MHz) for for Ear Earth obser th observation, capable of achieving ation, capable of achieving mor more than than 80% efficiency 80% efficiency at high at high po power lev r level l (150 (150 W) emplo employing E ying European technologies pean technologies

  • Driver stages

iver stages and and modulator: IHP CMOS modulator: IHP CMOS pr process

  • cess
  • Power

r stages : stages : UMS discr UMS discrete devices te devices (CHK040A) (CHK040A)

  • Design of

sign of the the po power r stages stages

PWM modulator On-chip driver Power stage Matching and resonator AM1 (analog) Out PWM modulator On-chip driver Power stage Matching and resonator Chip 1 Chip 2 Wilkinson Combiner

Power splitter

AM2 (analog) PWM modulator On-chip driver Power stage Matching and resonator AM3 (analog) PWM modulator On-chip driver Power stage Matching and resonator Chip 3 Chip 4 Wilkinson Combiner AM4 (analog) Wilkinson Combiner RF carrier 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.10 0.50 20 30 40 50 10 60 20 40 60 80 100

Duty cycle PAE[::,Index1]

m13

Pout_dBm[::,Index1]

m14

Output Performance

m13 plot_vs(PAE[::,Index1], delta)=85.737 m14 plot_vs(Pout_dBm[::,Index1], delta)=45.758

Preliminary performance

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014 17

FP7 project SLOGAN

Space quaLification ace quaLification Of H f High-P gh-Power er SSP SSPA based on A based on GaN technology N technology (SL (SLOGAN), OGAN), (2013-2016

2013-2016).

SSPA assembly

  • Application: to evaluate and

pplication: to evaluate and apply the apply the potentiality potentiality of matur

  • f mature UMS

UMS European G ropean GaN N based technology based technology (GH-50) for space (GH-50) for space applications, through the development applications, through the development of a

  • f a

GaN N SSP SSPA EQM for A EQM for the next generation of the next generation of Galileo satellites (E1 lileo satellites (E1 band, P band, Pout ut 300W 300W) ) ready to r ady to replace the curr place the current ent TWTAs

  • Design and assistance

sign and assistance in space qualification in space qualification

  • f the po
  • f the power stages

r stages

Preliminary Breadboarding of the PAs

80W PA 40W PA

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

Conclusions

  • ARES is a public/private consortium joining together the

experimental resources, the expertise and the critical mass of a dynamic university and the system capabilities of TECS.

  • ARES heritage in high-frequency enabling electronics is based on

more than 30 years experience.

  • Only microwave/millimetre-wave electronic activities have been

briefly presented: the activities in EM and propagation fields are also in the loop.

  • ARES is open to collaborations, not only academic but also

industrial and applied research in general, to promote and diffuse (as in its DNA) MTT, as demonstrated by the long-track experience briefly recalled.

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EE Dept., Università di Roma Tor Vergata, Italy, 26th September 2014

Ernesto Limiti

ARES and Dipartimento di Ingegneria Elettronica, Università degli Studi di Roma Tor Vergata limiti@ing.uniroma2.it Tel: +39 06 72597351 Fax : +39 06 72597953 Mob: +39 347 2537988