ELEN0037 Microelectronics Tutorials Pouyan Ebrahimbabaie, Vinayak - PowerPoint PPT Presentation

ELEN0037 Microelectronics Tutorials Pouyan Ebrahimbabaie, Vinayak Pachkawade,Thomas Schmitz With special thanks to Vincent P ierlot University of Liège - Montefiore Institute EMMI Unit: Electronics, Microsystems, Measurements, and Instrumentation Tutorial 1: MOSFET Operation and Modelling 1 / 25

Device Model Summary (Constants) q = 1 . 602 × 10 − 19 C k = 1 . 38 × 10 − 23 JK − 1 n i = 1 . 1 × 10 16 carriers / m 3 @ T = 300 K n i doubles for every 11°C increase in temperature n × p = n 2 i ε 0 = 8 . 854 × 10 − 12 Fm − 1 K ox ∼ = 3 . 9 K s ∼ = 11 . 8 2 / 25

Device Model Summary (Diode) Diode equations (Forward-Biased): � � V D I D = I S exp V T � D p � D n I S = A D qn i L n N A + L p N D q ∼ V T = kT = 26 mV @ 300 K Diode equations (Reverse-Biased): � 1 + V R Q = 2 C j 0 Φ 0 Φ 0 C j 0 C j = � 1+ VR Φ0 � qK s ε 0 N A N D C j 0 = 2Φ 0 N A + N D � qK s ε 0 C j 0 = 2Φ 0 N D if N A ≫ N D � � N A N D Φ 0 = V T ln n 2 i 3 / 25

Device Model Summary (Diode) Small-Signal Model of Forward-Biased Diode: r d = V T I D C T = C d + C j I D C d = τ t V T C j ∼ = 2 C j 0 4 / 25

Device Model Summary (MOSFET) 5 / 25

Device Model Summary (MOSFET) The following equations are for n-channel MOST. For p-channel MOST, put negative signs in front of all voltages. Also, the short-channel effects are not taken into account ( L < 2 L min ). Triode region ( V GS > V tn , V DS ≤ V eff ): � � � V 2 � W I D = µ n C ox ( V GS − V tn ) V DS − DS 2 L V eff = V GS − V tn � √ V SB + 2Φ F − √ 2Φ F � V tn = V tn − 0 + γ � � N A Φ F = V T ln n i √ 2 qK s ε 0 N A γ = C ox C ox = K ox ε 0 t ox 6 / 25

Device Model Summary (MOSFET) Small-Signal Model, Triode region (for V DS ≪ V eff ): r ds = ∂ V DS L ) ( V eff − V DS ) ∼ 1 1 ∂ I D = = µ n C ox ( W µ n C ox ( W L ) V eff C gd = C gs ∼ = 1 2 WLC ox + WL ov C ox C sb = C db = C j 0 ( A s + WL / 2) � 1+ Vsb Φ0 7 / 25

Device Model Summary (MOSFET) Active (or Pinch-Off) Region ( V GS > V tn , V DS ≥ V eff ): ( V GS − V tn ) 2 [1 + λ ( V DS − V eff )] � � I D = 1 W 2 µ n C ox L k ds λ = 2 L √ V DS − V eff +Φ 0 � 2 K s ε 0 k ds = qN A � 2 I D V eff = V GS − V tn = µ n C ox W / L � √ V SB + 2Φ F − √ 2Φ F � V tn = V tn − 0 + γ 8 / 25

Device Model Summary (MOSFET) Small-Signal Model, Active region ( V GS > V tn , V DS ≥ V eff ): 9 / 25

Device Model Summary (MOSFET) Small-Signal Model, Active region ( V GS > V tn , V DS ≥ V eff ): 10 / 25

Device Model Summary (MOSFET) Small-Signal Model, Active region ( V GS > V tn , V DS ≥ V eff ): � � � � � ∂ I D W W I D = 2 I D g m = ∂ V GS = µ n C ox V eff = 2 µ n C ox L L V eff ∂ I D γ g m g s = ∂ V SB = 2 √ V SB +2Φ F r ds = ∂ V DS ∂ I D ∼ 1 = λ I D k ds λ = 2 L √ V DS − V eff +Φ 0 � 2 K s ε 0 k ds = qN A C gs = 2 3 WLC ox + WL ov C ox C gd = WL ov C ox C sb = ( A s + WL ) C js + P s C j − sw C j 0 C js = � 1+ Vsb Φ0 C db = A d C jd + P d C j − sw C j 0 C jd = � 1+ Vdb Φ0 11 / 25

Device Model Summary (MOSFET) 12 / 25

Device Model Summary (MOSFET) 13 / 25

Device Model Summary (MOSFET) MOSFET parameters representative of various CMOS technologies 0 . 8 µ m 0 . 35 µ m 0 . 18 µ m 45 nm Technology NMOS PMOS NMOS PMOS NMOS PMOS NMOS PMOS � µ A / V 2 � µ C ox 92 30 190 55 270 70 280 70 V t 0 ( V ) 0.80 -0.90 0.57 -0.71 0.45 -0.45 0.45 -0.45 λ L ( µ m / V ) 0.12 0.08 0.16 0.16 0.08 0.08 0.10 0.15 � fF /µ m 2 � C ox 1.8 1.8 4.5 4.5 8.5 8.5 25 25 t ox ( nm ) 18 18 8 8 5 5 1.2 1.2 n 1.5 1.5 1.8 1.7 1.6 1.7 1.85 1.85 θ � V − 1 � 0.06 0.135 1.5 1.0 1.7 1.0 2.3 2.0 m 1.0 1.0 1.8 1.8 1.6 2.4 3.0 3.0 C ox / W = L ov V ox ( fF /µ m ) 0.20 0.20 0.20 0.20 0.35 0.35 0.50 0.50 C db / W ∼ = C sb / W ( fF /µ m ) 0.50 0.80 0.75 1.10 0.50 0.55 0.45 0.50 14 / 25

Device Model Summary (MOSFET) Default parameters for n-channel MOS transistors: T = 300 K (Room temperature) µ n C ox = 92 µ A / V 2 V tn = 0 . 8 V 1 / 2 γ = 0 . 5 V r ds (Ω) = 8000 L ( µ m ) / I D ( mA ) in active region C j = 2 . 4 × 10 − 4 pF / ( µ m ) 2 C j − sw = 2 . 0 × 10 − 4 pF /µ m C ox = 1 . 9 × 10 − 3 pF / ( µ m ) 2 C gs ( overlap ) = C gd ( overlap ) = 2 . 0 × 10 − 4 pF /µ m 15 / 25

Device Model Summary (MOSFET) Default parameters for p-channel MOS transistors: T = 300 K (Room temperature) µ p C ox = 30 µ A / V 2 V tp = − 0 . 9 V 1 / 2 γ = 0 . 8 V r ds (Ω) = 12000 L ( µ m ) / I D ( mA ) in active region C j = 4 . 5 × 10 − 4 pF / ( µ m ) 2 C j − sw = 2 . 5 × 10 − 4 pF /µ m C ox = 1 . 9 × 10 − 3 pF / ( µ m ) 2 C gs ( overlap ) = C gd ( overlap ) = 2 . 0 × 10 − 4 pF /µ m 16 / 25

Exercise 1 (1st/2nd, P1.1) Estimate the hole and electron concentrations in silicon doped with arsenic at a concentration of 10 25 atoms / m 3 at a temperature 22°C above room temperature. 1 Is the resulting material n-type or p-type? 1 n i = 4 . 4 10 16 carriers / m 3 @ T = 322 K , n-type material 17 / 25

Exercise 2 (1st/2nd, E1.2, P1.2) A PN junction has N A = 10 25 atoms / m 3 and N D = 10 22 atoms / m 3 . What is the built-in junction potential Φ 0 ? 2 Does the built-in potential increase or decrease when the temperature is increased 11°C above room temperature? 3 2 Φ 0 = 0 . 89 V 3 it decreases (Φ 0 = 0 . 88 V ) 18 / 25

Exercise 3 (1st/2nd, P1.4) A silicon diode has τ t = 12 ps and C j 0 = 15 fF . It is reverse-biased by a 43 k Ω resistor connected between the cathode of the diode and the input signal. Initially the input is 5 V , and then at time 0 it changes to 0 V . Estimate the time it takes for the output voltage to change from 5 V to 1 . 5 V . 4 Repeat for an input voltage change from 0 V to 5 V and an output voltage change from 0 V to 3 . 5 V . 5 4 t falling = 0 . 37 ns 5 t rising = 0 . 48 ns 19 / 25

Exercise 4 (1st, P1.7) Find I D for an n-channel MOST having doping concentrations of N A = 10 22 atoms / m 3 and N D = 10 25 atoms / m 3 , with W = 50 µ m , L = 1 . 5 µ m , V GS = 1 . 1 V , and V DS = V eff . 6 Estimate the new value of I D if V DS is increased by 0 . 3 V (we assume λ remains constant). 7 6 I D = 138 µ A 7 I D = 143 µ A 20 / 25

Exercise 5 (1st, P1.8) A MOS transistor in the active region has a drain current of 20 µ A when V DS = V eff . When V DS is increased by 0 . 5 V , I D increases to 23 µ A . Estimate the output impedance r ds , and the output impedance constant λ . 8 8 r ds = 167 k Ω , λ = 0 . 3 V − 1 21 / 25

Exercise 6 (1st, P1.9) Derive the low-frequency model parameters (i.e. find g m , g s , and r ds ) for an n-channel MOST having doping concentrations of N A = 10 22 atoms / m 3 and N D = 10 25 atoms / m 3 , with W = 10 µ m , L = 1 . 2 µ m , V GS = 1 . 1 V , and V DS = V eff . 9 9 r ds = 182 k Ω , g m = 230 µ A / V , g s = 44 µ A / V 22 / 25

Exercise 7 (1st, P1.10) Find the capacitances C gs , C gd , C sb , and C db for a MOST having W = 50 µ m and L = 1 . 2 µ m . Assume that the source and drain junctions extend 4 µ m beyond the gate, resulting in source and drain areas being A s = A d = 200 µ m 2 and the perimeter of each being P s = P d = 58 µ m . 10 10 C gs = 86 fF , C gd = 10 fF , C sb = 74 fF , and C db = 60 fF 23 / 25

Exercise 8 (1st, P1.11) Consider the circuit shown hereafter, where V in = 1 V , V G = 5 V , W = 10 µ m and L = 0 . 8 µ m . Taking into account only the channel charge storage, determine the final value of V out , when the transistor is turned off, assuming half the channel charge “goes” to C L . 11 11 V out = V out (0) − 0 . 024 = 1 − 0 . 024 = 0 . 976 V 24 / 25

Exercise 9 (1st, P1.12, P1.13) Consider the same circuit as before. The input voltage has a step voltage change at time 0 from 1 V to 1 . 2 V ( V G = 5 V ). Find its 99 % settling time. 12 You may ignore the body effect 1 and all capacitances except C L . Repeat the question for V in changing from 3 V to 3 . 1 V . 13 2 Repeat the same problem, but now take into account the body 3 effect, and assume N A = 10 22 atoms / m 3 . 14 12 t settling (1 → 1 . 2 V ) = 1 . 25 ns 13 t settling (3 → 3 . 1 V ) = 3 . 33 ns 14 t settling (1 → 1 . 2 V ) = 1 . 35 ns , t settling (3 → 3 . 1 V ) = 6 . 1 ns 25 / 25