Data Hazards Philipp Koehn 9 October 2019 Philipp Koehn Computer - PowerPoint PPT Presentation

Data Hazards Philipp Koehn 9 October 2019 Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Data Hazard 1 • Definition: instruction waits on result from prior instruction • Example add $s0, $t0, $t1 sub $t0, $s0, $t3 – add instruction writes result to register $s0 in stage 5 – sub instruction reads $s0 in stage 2 ⇒ Stage 2 of sub has to be delayed • We overcome this in hardware Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Graphical Representation 2 200 400 600 800 1000 add $s0,$t0,$t1 IF ID EX MEM WB • IF: instruction fetch • ID: instruction decode • EX: execution • MEM: memory access • WB: write-back Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Add and Subtract 3 200 400 600 800 1000 add $s0,$t0,$t1 IF ID EX MEM WB sub $t0,$s0,$t3 IF ID EX MEM WB • Add wiring to circuit to directly connect output of ALU for next instruction Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Load and Subtract 4 200 400 600 800 1000 1200 lw $s0,20($t0) IF ID EX MEM WB bubble bubble bubble bubble bubble sub $t0,$s0,$t3 IF ID EX MEM WB • Add wiring from memory lookup to ALU • Still 1 cycle unused: "pipeline stall" or "bubble" Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

5 forwarding Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Add and Subtract 6 • Example add $s0, $t0, $t1 sub $t0, $s0, $t3 • Plan 200 400 600 800 1000 add $s0,$t0,$t1 IF ID EX MEM WB sub $t0,$s0,$t3 IF ID EX MEM WB Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Add (Stage 1) 7 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 1), Add (Stage 2) 8 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 2), Add (Stage 3) 9 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 3), Add (Stage 4) 10 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Data Hazard 11 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Instruction Read Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Forwarding Data 12 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Selector Read Read Address PC register 1 data 1 Zero Selector ALU Instruction Read register 2 Selector Address Memory Result Registers Read data Write Instruction Read Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Forwarding Unit 13 • Forwarding Unit must – detect if there is a data hazard – forward the right register values • Relevant information for decision – identify of input registers used in instruction currently in EX (either first or second operand) – identity of output register used in instruction currently in MEM – value of output register used in instruction currently in MEM • Format of decision – Register value – Control lines for selectors for input to ALU Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Formal Names 14 • Relevant information for decision – EX.Rs and EX.Rt identify of input registers used in instruction currently in EX (either first or second operand) – MEM.Rd identity of output register used in instruction currently in MEM – MEM.RdValue value of output register used in instruction currently in MEM • Format of decision – Forward.Rs and Forward.Rt Register value – Hazard.Rs and Hazard.Rt Control lines for selectors for input to ALU Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Forwarding Logic 15 • Logic in forwarding unit if (MEM.Rd == EX.Rs) Forward.Rs = MEM.RdValue Hazard.Rs = 1 else Hazard.Rs = 0 if (MEM.Rd == EX.Rt) Forward.Rt = MEM.RdValue Hazard.Rt = 1 else Hazard.Rt = 0 • Must also check if "RegisterWrite" for instruction in MEM stage • Relevant information must be passed through stages Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Forwarding Unit 16 IF: ID: Instruction decoder MEM: EX: Execute / Instruction Fetch register file read Memory access address calculate Selector Read Read Address register 1 data 1 Zero ALU Instruction Read register 2 Selector Memory Result Registers Write Read Instruction register data 2 ForwardA ForwardB HazardA HazardB Write data Forwarding MEM.Rd Unit MEM.RdValue EX.Rs EX.Rt Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

17 stalling Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Load and Subtract 18 • Example load $s0, 20($t0) sub $t0, $s0, $t3 • Plan 200 400 600 800 1000 1200 lw $s0,20($t0) IF ID EX MEM WB bubble bubble bubble bubble bubble sub $t0,$s0,$t3 IF ID EX MEM WB Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Load (Stage 1) 19 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read PC Address register 1 data 1 Zero Selector Read ALU Instruction register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 1), Load (Stage 2) 20 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read PC Address register 1 data 1 Zero Selector Read ALU Instruction register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 2), Load (Stage 3) 21 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read PC Address register 1 data 1 Zero Selector Read ALU Instruction register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019

Subtract (Stage 3), Load (Stage 4) 22 IF: ID: Instruction decoder EX: Execute / MEM: WB: Instruction Fetch register file read address calculate Memory access Write Back 4 Add ADD Sign Shift extended Left Selector Read Read PC Address register 1 data 1 Zero Selector Read ALU Instruction register 2 Selector Address Memory Result Registers Read data Write Read Instruction Data register data 2 Memory Write Write data data Philipp Koehn Computer Systems Fundamentals: Data Hazards 9 October 2019