CS305 Computer Architecture Fall 2009 Lecture 04
Bhaskaran Raman Department of CSE, IIT Bombay
http://www.cse.iitb.ac.in/~br/ http://www.cse.iitb.ac.in/synerg/doku.php?id=public:courses:cs305-fall09:start
CS305 Computer Architecture Fall 2009 Lecture 04 Bhaskaran Raman - - PowerPoint PPT Presentation
CS305 Computer Architecture Fall 2009 Lecture 04 Bhaskaran Raman Department of CSE, IIT Bombay http://www.cse.iitb.ac.in/~br/ http://www.cse.iitb.ac.in/synerg/doku.php?id=public:courses:cs305-fall09:start Today's Topics Performance
http://www.cse.iitb.ac.in/~br/ http://www.cse.iitb.ac.in/synerg/doku.php?id=public:courses:cs305-fall09:start
– Example: Livermore loops
– Examples: Quick-sort, tower of Hanoi...
– Example: Whetstone, Dhrystone
Norm(A)Norm(A)Norm(A)Norm(B)Norm(B)Norm(B)Norm(C)Norm(C)Norm(C) A B C A B C A B C P1 1 10 20 0.1 1 2 0.05 0.5 1 P2 1 0.1 0.02 10 1 0.2 50 5 1 AM 1 5.05 10.01 5.05 1 1.1 25.03 2.75 1 GM 1 1 0.63 1 1 0.63 1.58 1.58 1
OR
i=1 n
i=1 n
– 20% instructions are branches, and another 20% are
– 2 cycles per branch, 1 cycle for all others – Clock-rate is 25% faster