[PPT] - Computer-Aided Design for Microfluidic g Chips Based on Multilayer PowerPoint Presentation

SLIDE 1

Computer-Aided Design for Microfluidic g Chips Based on Multilayer Soft Lithography

Nada Amin1, William Thies2, Saman Amarasinghe1

1 Massachusetts Institute of Technology

gy

2 Microsoft Research India

C f C International Conference on Computer Design October 5, 2009

SLIDE 2

Microfluidic Chips

Idea: a whole biology lab on a single chip

– Input/output Input/output – Sensors: pH, glucose, temperature, etc. – Actuators: mixing, PCR, electrophoresis, cell lysis, etc.

B fit

Benefits:

– Small sample volumes High throughput – High throughput – Low-cost

Applications:

1 mm 10x real-time

Applications:

– Biochemistry

Cell biology

– Biological computing Biological computing

SLIDE 3

Moore’s Law of Microfluidics: V l D it D bl E 4 M th Valve Density Doubles Every 4 Months

Source: Source: Fluidigm Corporation (http://www.fluidigm.com/images/mlaw_lg.jpg)

SLIDE 4

Moore’s Law of Microfluidics: V l D it D bl E 4 M th Valve Density Doubles Every 4 Months

Source: Source: Fluidigm Corporation (http://www.fluidigm.com/didIFC.htm)

SLIDE 5

Current Practice: Manage Gate-Level D t il f D i t O ti Details from Design to Operation

For every change in the experiment or the chip design:
For every change in the experiment or the chip design:

fabricate chip

1. Manually draw in AutoCAD
2. Operate each gate from LabView

SLIDE 6

Abstraction Layers for Microfluidics

C Silicon Analog Protocol Description Language C p g g

architecture-independent protocol description

x86 Fluidic Instruction Set Architecture (ISA)

primitives for I/O, storage, transport, mixing

P ti III Pentium III, Pentium IV

hi 1 hi 2 hi 3

transistors Fluidic Hardware Primitives

chip 1 chip 2 chip 3

transistors, registers, … Fluidic Hardware Primitives

valves, multiplexers, mixers, latches

SLIDE 7

Abstraction Layers for Microfluidics

Protocol Description Language

BioStream Language

Contributions p g g

architecture-independent protocol description

BioStream Language

[IWBDA 2009]

Fluidic Instruction Set Architecture (ISA)

primitives for I/O, storage, transport, mixing

Optimized Compilation

[Natural Computing 2007]

Demonstrate Portability

[DNA 2006] hi 1 hi 2 hi 3

Micado AutoCAD Plugin

[MIT 2008, ICCD 2009]

Fluidic Hardware Primitives

chip 1 chip 2 chip 3 [MIT 2008, ICCD 2009]

Digital Sample Control

Fluidic Hardware Primitives

valves, multiplexers, mixers, latches

Using Soft Lithography

[Lab on a Chip ‘06]

SLIDE 8

Droplets vs. Continuous Flow

Digital manipulation of droplets
n an electrode array
n an electrode array

[Chakrabarty, Fair, Gascoyne, Kim, …]

Pro:

– Reconfigurable routing – Electrical control M i i CAD i

Continuous flow of fluids (or

– More traction in CAD community

Source: Chakrabarty et al, Duke University

Continuous flow of fluids (or

droplets) through fixed channels

[Whitesides, Quake, Thorsen, …]

Pro:

– Smaller sample sizes p – Made-to-order availability [Stanford] – More traction in biology community

SLIDE 9

Primitive 1: A Valve (Quake et al.)

Control Control Layer Layer

pressurized control port

Flow Flow Layer Layer

SLIDE 10

Primitive 2: A Multiplexer (Thorsen et al.)

Bit 2 Bit 2 Bit 1 it 1 Bit 0 it 0 0 1 0 1 0 1 flow layer control layer 0 1 0 1 0 1 Output 7 Output 7 Output Output 6 control layer Input Input Output Output 6 Output 5 Output 5 Out Output 4 ut 4 p Output 3 Output 3 Output 2 Output 2 Output 0 Output 0 Output 1 Output 1

Example: select 3 = 011

SLIDE 11

Primitive 2: A Multiplexer (Thorsen et al.)

Bit 2 Bit 2 Bit 1 it 1 Bit 0 it 0 0 1 0 1 0 1 flow layer control layer 0 1 0 1 0 1 Output 7 Output 7 Output Output 6 control layer Input Input Output Output 6 Output 5 Output 5 Out Output 4 ut 4 p Output 3 Output 3 Output 2 Output 2 Output 0 Output 0 Output 1 Output 1

Example: select 3 = 011

SLIDE 12

Primitive 3: A Mixer (Quake et al.)

1 Load sample on bottom

1. Load sample on bottom
2. Load sample on top
3. Peristaltic pumping

Rotary Mixing

SLIDE 13

CAD Tools for Microfluidic Chips

Goal: automate placement, routing, control of

microfluidic features microfluidic features

Why is this different than electronic CAD?
1. Control ports (I/O pins) are bottleneck to scalability

– Pressurized control signals cannot yet be generated on-chip – Thus, each logical set of valves requires its own I/O port

2. Control signals correlated due to continuous flows

g

pipelined flow continuous flow

Demand & opportunity for minimizing control logic

pipelined flow continuous flow

SLIDE 14

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

SLIDE 15

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA

SLIDE 16

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA
2. Infer control valves

SLIDE 17

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA
2. Infer control valves

3 I f t l h i

3. Infer control sharing

SLIDE 18

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA
2. Infer control valves

3 I f t l h i

3. Infer control sharing
4. Route valves to control ports

SLIDE 19

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA
2. Infer control valves

3 I f t l h i

3. Infer control sharing
4. Route valves to control ports

5 G t i t ti GUI

5. Generate an interactive GUI

SLIDE 20

Our Paper: A t ti G ti f C t l L Automatic Generation of Control Layer

1. Describe Fluidic ISA
2. Infer control valves

3 I f t l h i

3. Infer control sharing
4. Route valves to control ports

5 G t i t ti GUI

5. Generate an interactive GUI

SLIDE 21

1. Describe a Fluidic ISA
Hierarchical and composable flow declarations

P P

Sequential flow P1 → P2

P1 P2 F

AND-flow F1 Λ F2

F1 F2

OR-flow F1 \/ F2

F1 F1

r

1 2

F2 F2

r

Mixing mix(F)

F

Pumped flow pump(F)

F

SLIDE 22

1. Describe a Fluidic ISA

SLIDE 23

1. Describe a Fluidic ISA

mix-and-store (S1, S2, D) {

1. in1 top out

2 i b t t

2. in2 bot out
3. mix(top bot-left

bot-right top) g p)

4. wash bot-right

top bot-left store }

50x real-time

SLIDE 24

2. Infer Control Valves

SLIDE 25

2. Infer Control Valves

SLIDE 26

3. Infer Control Sharing

SLIDE 27

3. Infer Control Sharing

SLIDE 28

3. Infer Control Sharing

Column Compatibility Problem NP hard

NP-hard
Reducible to graph coloring

SLIDE 29

3. Infer Control Sharing

Column Compatibility Problem NP hard

NP-hard
Reducible to graph coloring

SLIDE 30

3. Infer Control Sharing

Column Compatibility Problem NP hard

NP-hard
Reducible to graph coloring

SLIDE 31

3. Infer Control Sharing

Column Compatibility Problem NP hard

NP-hard
Reducible to graph coloring

SLIDE 32

4. Route Valves to Control Ports
Build on recent algorithm

for simultaneous pin assignment & routing

[Xiang et al 2001] [Xiang et al., 2001]

Idea: min cost - max flow

from valves to ports

Our contribution: extend algorithm to allow sharing
Our contribution: extend algorithm to allow sharing

– Previous capacity constraint on each edge:

f + f + f + f + f + f ≤ 1

– Modified capacity constraint on each edge:

f1 + f2 + f3 + f4 + f5 + f6 ≤ 1 (f f ) (f f ) f f 1

Solve with linear programming, allowing sharing where beneficial

max(f1, f4) + max(f2 , f3) + f5 + f6 ≤ 1

SLIDE 33

4. Route Valves to Control Ports
Build on recent algorithm

for simultaneous pin assignment & routing

[Xiang et al 2001] [Xiang et al., 2001]

Idea: min cost - max flow

from valves to ports

Our contribution: extend algorithm to allow sharing
Our contribution: extend algorithm to allow sharing

– Previous capacity constraint on each edge:

f + f + f + f + f + f ≤ 1

– Modified capacity constraint on each edge:

f1 + f2 + f3 + f4 + f5 + f6 ≤ 1 (f f ) (f f ) f f 1

Solve with linear programming, allowing sharing where beneficial

max(f1, f4) + max(f2 , f3) + f5 + f6 ≤ 1

SLIDE 34

Micado: An AutoCAD Plugin

Implements ISA, control inference, routing, GUI export

Using slightly older algorithms – Using slightly older algorithms than presented here [Amin ‘08] – Parameterized design rules g – Incremental construction of chips

Realistic use by at least 3
Realistic use by at least 3

microfluidic researchers Freel a ailable at

Freely available at:

http://groups.csail.mit.edu/cag/micado/

SLIDE 35

Embryonic Cell Culture

Courtesy J.P. Urbanski

SLIDE 36

Metabolite Detector

Courtesy J.P. Urbanski

SLIDE 37

Cell Culture with Waveform Generator

Courtesy David Craig

SLIDE 38

Open Problems

Automate the design of the flow layer

Hardware description language for microfluidics – Hardware description language for microfluidics – Define parameterized and reusable modules

R li t d k i iti d l ibl

Replicate and pack a primitive as densely as possible

– How many cell cultures can you fit on a chip?

Support additional primitives and functionality

– Metering volumes – Sieve valves – Alternate mixers – Separation primitives – …

SLIDE 39

Conclusions

Microfluidics represents

a rich new playground p yg for CAD researchers

Two immediate goals:

g

– Enable designs to scale – Enable non-experts to d i th i hi design their own chips

Micado is a first step towards these goals

Courtesy J.P. Urbanski

– Hierarchical ISA for microfluidics – Inference and minimization of control logic – Routing shared channels to control ports – Generation of an interactive GUI