CMOS Sensor for the Cold and Tiny Yuan Mei Lawrence Berkeley - - PowerPoint PPT Presentation
CMOS Sensor for the Cold and Tiny Yuan Mei Lawrence Berkeley - - PowerPoint PPT Presentation
CMOS Sensor for the Cold and Tiny Yuan Mei Lawrence Berkeley National Laboratory TPC is wonderful Signal extraction remains a challenge Physics Today 31(10), 46 (1978) 2 CCD, W. Boyle & G. Smith @ Bell Labs, 1969
TPC is wonderful
Physics Today 31(10), 46 (1978) CCD, W. Boyle & G. Smith @ Bell Labs, 1969
2
Signal extraction remains a challenge
https://www.visiononline.org/blog-article.cfm/CCD-vs-CMOS-Image-Sensors-Which-are-Better/82
TPC signal extraction
- µ-PIC (Micro Pixel Chamber)
- Printed Circuit Board technology
- 400µm pitch
- Some electron gain in gas
- Difficult for readout and scale-up
- D3, InGrid etc.
- Charge multiplication stage
- Non-specific ASIC readout
- FE-I3/-I4
- TimePix
S.E. Vahsen et al. http://arxiv.org/abs/1110.3401
3
cathode E PMT PMT S1 S2 e− γ, n, χ dt
- Liquid Xenon TPC
- Time Projection Chamber
- Wire and/or light readout
- mm~cm spatial resolution
XENON, LUX, LZ, etc.
Readout?
4
Avalanche gain?
- µ-PIC (Micro Pixel Chamber)
- Printed Circuit Board technology
- GEM
- Array of micro-holes in
thin foils with conductor cladding on both sides
5
- MicroMegas
- Micromesh placed (very)
close to readout PCB
- Catch charge as early as possible, convert
to digital information immediately
- Low noise
- Full 3D information
- Truly (massively) pixelated (2D)
- Adequate timing (waveform digitization)
- Affordable
Topmetal CMOS direct charge sensor
Topmetal Node Vreset RESET Vcc Pixel Output Row Col Ibias Buffer
R C
Source Drain Source Drain
PMOS CAP NMOS
Charge track
p-substrate
N-Well P-Well Gate Gate
GR GR
TM
n+ n+ p+ p+Topmetal-I Topmetal-II-
- Direct voltage readout
- High analog bandwidth
- Charge sensitive amplifier, <15e- noise
- Clock-less, frame-less logic hits readout
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CSA_VREF Md
- bit DAC
Topmetal & Gring CMP Cf ROW_SEL COL_SEL CSA FB_VREF CMP_VREF FB_RST EN SPDT U9U Priority Logic U<U Mf M: M> Pixel Addr Pull Up < 9 : >
- +
K COL_RST Column Bus Flag Reset EN PFI PFO AddrEN FB_RST AVDD AVDD TIME<9:<> ADDR<K:<> AVDD A_OUT +:9 :uA ICOL Ms9 Ms: AVDD From PFOi-9 To PFIim9 Ma9 Ma:
BufferCOL_READ CLK
- XFAB XH035 Process
- ~80µm pixel size
NIMA 810, 144 arXiv:1407.3712
Topmetal-II- seeing alpha (ion) tracks in air
NIMA 810, 144, 2016
y [pixel] x [mm] 10 20 30 40 50 60 70 1 2 3 4 5
t0
y [mm] 1 2 3 4 5
t1 t2 t3
x [pixel] 10 20 30 40 50 60 70
t4
−2 2 4 6 8 10 [mV]
t5
µ=10.47 [mV] σ=0.42 [mV], ENC=13.9 e− 10 mV step injection Baseline distribution µ=827.6 [mV] σ=1.2 [mV], ENC=39.5 e−
U [V] t [ms] Raw waveform Trapezoidal shaper 0.824 0.826 0.828 0.83 0.832 0.834 0.836 0.838 0.84 5 6 7 8 9 10 11 12 13 14
Topmetal
241Am
~ E 5 cm e− e− e−
CSA_VREF Md- bit DAC
- +
Δt = 3.3ms
Electron-track Compton Imaging
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- Medical Imaging
- Gamma (X-ray) Astronomy
Ne(90%)+DME(10%) @ 80kPa, 55Fe events (5.9keV X-ray), GEM on Topmetal-II-
2.5 x 2.5 mm field of view
http://www-cr.scphys.kyoto-u.ac.jp/research/MeV-gamma/wiki/wiki.cgi?page=Top_en
CMOS charge sensor array for 0νββ
10
- Eliminate charge multiplication
- Focusing electrode 100% coll. eff.
- Direct charge collection in X-Y
- In-sensor digitization
- Inter-sensor network for digital data
transmission
+ + + +
- Electric field
Readout Plane 1 Readout Plane 2
Focusing Electrode CMOS Sensor PCB
Source Drain Source DrainPMOS CAP NMOS
Charge track p-substrate N-Well P-Well Gate Gate GR GR TM n+ n+ p+ p+No electron multiplication!
Focusing Electrode CMOS Sensor PCB
Sensor array
5cm
python program generated PCB, parametrized
CMOS works in the cold
−6×10−5 −4×10−5 −2×10−5 2×10−5 4×10−5 6×10−5 8×10−5 0.0001 0.00012 −0.2 0.2 0.4 0.6 0.8 1 1.2 1.4 Ids [A] Vds [V] NMOS IV scan 0.1K 77K 300K −6×10−5 −4×10−5 −2×10−5 2×10−5 4×10−5 6×10−5 8×10−5 0.0001 0.00012 −0.2 0.2 0.4 0.6 0.8 1 1.2 1.4
State-of-the-art cold electronics
14
77K – LArPix, Q-Pix etc.
RESET CSA Qin (from/detector) CDigital/ Control
6:b/ADC 6:b/DAC CONVERT HIT THRESHOLD[5:0] DATA[5:0] SERIAL_OUT STROBEAmplifier%with%SelfEtriggered%Digi=za=on%and%Readout%
FrontEend%amplifier$ SelfEtriggering%Discriminator$ Standard%SAR%Digi=zer$ Digital%Control$
4K – FPGA etc. Driven by quantum computing needs
http://aip.scitation.org/doi/pdf/10.1063/1.4939094 http://aip.scitation.org/doi/pdf/10.1063/1.4979611 PhysRevApplied.3.024010
Logic
Multi- channel DAC ADC Coupler Multi-plexing Qubits Switch matrix
Pulsing
Biasing Readout
Address-line bus
dc Digital Readout carrier Prime waveform
Waveform generator
+
20 mK
300 K
4 K
Programming
100110100 001100010
Clock Power
Dilution refrigerator
Prime-line bus
CMOS @ <4K
15
Conventional CMOS designed to work at <4K temperature. Low-noise Transimpedance Amplifier (TIA) replaces SQUID 55nm CMOS devices proven to function down to ~10mK
−2×10−7 −1×10−7 1×10−7 2×10−7 −8 −6 −4 −2 2 4 6 8 IDB [A] VDB [V] Drain−Body IV scan, Floating G,S NMOS1 10~20mK NMOS1 60.8K NMOS1 298K PMOS2 10~20mK PMOS2 59.1K PMOS2 298K −2×10−7 −1×10−7 1×10−7 2×10−7 −8 −6 −4 −2 2 4 6 8
Rsh RTES Rf Cf Vo Tp Ts A TIA
−6×10−5 −4×10−5 −2×10−5 2×10−5 4×10−5 6×10−5 8×10−5 0.0001 0.00012 −0.2 0.2 0.4 0.6 0.8 1 1.2 1.4 Ids [A] Vds [V] NMOS IV scan 0.1K 77K 300K −6×10−5 −4×10−5 −2×10−5 2×10−5 4×10−5 6×10−5 8×10−5 0.0001 0.00012 −0.2 0.2 0.4 0.6 0.8 1 1.2 1.4
Interfacing quantum sensors
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Ds
Absorber Crystal (TeO2) Thermistor (NTD-Ge) Thermal coupling (PTFE) Heat bath ~10 mK (Copper) Energy release Si Heater (ref. NTD Ge Thermistor
NTD in CUORE TES in CUPID
s
SQUID Bias Out
10 mK 600 mK 300 K
Rsh = 20 mΩ L = 6 nH Rfb = 10 kΩ RTES = 0.5 Ω
+ Superconducting Qubits + CMB TES array
W=0.5u L=1.2u U1 NM W=1.2u L=1.2u U3 NM U4 W=10u L=0.18u M=1 U5 W=0.5u L=10u U6 W=1.2u L=10u I2 10n U8 W=0.22u L=10u R1 100Meg .5u VDD U1D Vgn2 Vin+ Vout Vouts ??? ??? ??? ??? ???