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An Adiabatic Power-Supply Controller for An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits Asynchronous Logic Circuits

• P. Asimakopoulos and A. Yakovlev

The 20th UK Asynchronous Forum - The University of Manchester, 1st-2nd September 2008

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Summary Summary

• Adiabatic logic background.
• Asynchronous adiabatic implementation.
• Simulations / Evaluation.
• Conclusions.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Standard CMOS Energetics Standard CMOS Energetics

• 1. Charging
• 2. Discharging

+ => Ed = QVDD = CVDD

2

The only ways to reduce energy consumption are:

• 1. Reduce supply voltage VDD.
• 2. Reduce load capacitance C.

VDD C Q = CVDD VDD C Q = CVDD

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev Supply C Q = CVDD

1 2 3

Supply C Q = CVDD

1 2 3

Adiabatic Logic Adiabatic Logic

• 1. Charge Q is recovered back to the power supply.
• 2. Charging current becomes uniform and small over

ramp time T → energy dissipation is minimized. => Ed = very small +

• 1. Charging
• 2. Discharging

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Adiabatic Logic Adiabatic Logic

I(mA) V(V) E(pJ) Time

J S Denker, “A Review of Adiabatic Computing”, 1994, IEEE Symposium on Low Power Electronics, pp.94-97.

Voltage/Current/Energy measurements. Dotted line: Conventional Inverter. Solid line: Adiabatic Inverter.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Supply IN+ IN- OUT+ OUT-

Wait Evaluate Hold “1” Reset Wait

Adiabatic Logic Adiabatic Logic

Basic 2N-2P Adiabatic Circuit. 2N-2P Timing Diagram. Dual-rail Dual-rail

} }

Supply IN+ IN- OUT- OUT+

Kramer A., Denker J.S. et al, “2nd order adiabatic computation with 2N-2P and 2N-2N2P logic circuits”, Proc.1995 Int. Symp. Low power design, pp. 191-196.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Synchronous Adiabatic Logic Synchronous Adiabatic Logic

• One fixed frequency
• one global power

supply.

• Might require

multiple phases of the power supply.

Power Supply IN1+ IN1- OUT1- OUT1+ CLK IN2+ IN2- OUT2- OUT2+ VDD/2 L Combinational Logic Combinational Logic IN3+ IN3- OUT3- OUT3+ Combinational Logic

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Asynchronous Adiabatic Logic Asynchronous Adiabatic Logic

Power Supply CLK VDD/2 L Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS Power Supply CLK VDD/2 L Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS Power Supply CLK VDD/2 L Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS

• Multiple frequencies –

many power supplies.

• Space consuming

design approach.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Asynchronous Adiabatic Logic Asynchronous Adiabatic Logic

• Using a stepwise charging

circuit, inductors are eliminated.

• Charging/discharging is no

longer ramp-like.

• Capacitors still occupy large

area on chip.

Willingham D.J. and Kale I., “Asynchronous, quasi-Adiabatic (Asynchrobatic) logic for low-power very wide data width applications”, Circuits and Systems, 2004, Proceedings of the 2004 International Symposium on Volume 2, 23-26 May 2004 pp. II - 257-60 Vol.2.

Stepwise Charging Circuit Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS Asynchronous Combinational Logic REQ ACK INPUTS OUTPUTS VDD C1 C2

SW1 SW2 SW3 SW4

( )

Stepwise Charging Circuit VDD C1 C2

SW1 SW2 SW3

Stepwise Charging Circuit VDD C1 C2

SW1 SW2 SW3 SW4 SW4

( ) ( )

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Proposed Circuit Proposed Circuit

Adiabatic Asynchronous Logic Adiabatic Supply Controller Inputs ACK Supply Evaluate/ Reset Hold “1” Wait Adiabatic Asynchronous Logic Adiabatic Supply Controller Inputs ACK Supply Evaluate/ Reset Hold “1” Wait

Peak H Peak L

• Only one inductor-

based supply.

• Ramp-like power

supply generated by individual adiabatic supply controllers.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Adiabatic Supply Controller Adiabatic Supply Controller

Adiabatic supply controller timing diagram.

Global Supply High Peak Low Peak Request Acknowledge EVALUATE/ RESET WAIT HOLD “1” Adiabatic Supply

1 2 3 4 5 6

Adiabatic Asynchronous Logic Adiabatic Supply Controller Inputs ACK Supply Evaluate/ Reset Hold “1” Wait

Peak H Peak L

1 2 3 4 5 6

Circuit topology.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Adiabatic Supply Controller Adiabatic Supply Controller

Adiabatic supply controller timing diagram.

Global Supply High Peak Low Peak Request Acknowledge EVALUATE/ RESET WAIT HOLD “1” Adiabatic Supply

1 2 3 4 5 6

Adiabatic Asynchronous Logic Adiabatic Supply Controller Inputs ACK Supply Evaluate/ Reset Hold “1” Wait

Peak H Peak L

1 2 3 4 5 6

Circuit topology.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Adiabatic Supply Controller Adiabatic Supply Controller

Acknowledge

C C

Peak H Peak L

C

HOLD “1” WAIT EVALUATE / RESET

Adiabatic supply controller logic.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Evaluation Evaluation

2-bit Multiplier. Half- Adder Half- Adder

X0 X1 Y0 Z0 Y1 X0 X1 Z1 Z2 Z3

• Performance is

evaluated by comparing 2,4,5 -bit asynchronous multipliers implemented in both conventional and adiabatic logic.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Evaluation Evaluation

C C C C Asynchronous Function Block C

A.f A.t B.t B.f

C

Acknowledge S.t S.f C.t C.f

• The dual-rail pipeline handles asynchronous handshaking.
• Is the same for both conventional asynchronous and

adiabatic asynchronous logic.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Evaluation Evaluation

VDD N Transistor Network INPUTS Acknowledge Acknowledge OUT.f OUT.t

Supply PULSE OUT- OUT+ PULSE N Transistor Network INPUTS

Modified 2N-2P Circuit. Precharged Differential CMOS Logic.

J Sparso and S Furber, ”Principles of asynchronous circuit design - A systems perspective”, Kluwer Academic Publishers, 2001. Yeh C.C., Lou J.H. and Kuo J.B., “1.5 V CMOS full-swing energy efficient logic (EEL) circuit suitablefor low-voltage and low-power VLSI applications”, Electronics Letters Volume 33, Issue 16, 31 Jul 1997 pp. 1375 - 1376.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

20 40 60 80 100 120 2 4 6 8 10 12 14 16

2-bit multiplier Adiabatic 2-bit multiplier Non-Adiabatic

Power (uW) Frequency (MHz)

20 40 60 80 100 120 10 20 30 40 50 60 70

4-bit multiplier Adiabatic 4-bit multiplier Non-Adiabatic

Power (uW) Frequency (MHz)

Simulation Results Simulation Results

2-bit Multiplier.

20 40 60 80 100 120 20 40 60 80 100 120

5-bit multiplier Adiabatic 5-bit multiplier Non-Adiabatic

Power (uW) Frequency (MHz)

4-bit Multiplier. 5-bit Multiplier.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Simulation Results Simulation Results

20 40 60 80 100 120

• 120
• 100
• 80
• 60
• 40
• 20

20 40 60 80 2-bit multiplier 4-bit multiplier 5-bit multiplier

Improvement (%) Frequency (MHz)

2,4,5-bit Adiabatic Multipliers power improvement over conventional circuit.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Circuit Weaknesses Circuit Weaknesses

• The operating frequency of the

asynchronous logic blocks is limited by the sine-wave supply frequency (can introduce to the handshaking, an additional delay of 3 times the sine-wave period).

• The adiabatic supply controller

induces a power consumption

• verhead. This makes the circuit

inefficient for simple logic implementations.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Future Future

Peak H Peak L Acknowledge

C C

Peak H Peak L

C

HOLD “1” WAIT EVALUATE / RESET

Peak detectors/sine-wave generator are ideal. Metastability.

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An Adiabatic Power-Supply Controller for Asynchronous Logic Circuits

P Asimakopoulos and A Yakovlev

Conclusions Conclusions

• A new approach for the design of

asynchronous adiabatic logic was presented.

• Only one inductor-based power supply is

required.

• The power improvement over conventional

CMOS asynchronous is demonstrated to be more than 60% (can be further improved with more complex computational loads).

• This design approach could benefit

applications that require low-to-medium speed performance and implement medium-to-high complexity logic functions → energy-harvester supplied computational logic.