9.8m SPAD-based Analogue Single Photon Counting Pixel with Bias - PowerPoint PPT Presentation

9.8μm SPAD-based Analogue Single Photon Counting Pixel with Bias Controlled Sensitivity International Image Sensors Workshop Neale Dutton, Lindsay Grant and Robert Henderson

CMOS SPAD Pixels 2 SPAD + SPAD Only 1b Mem Analogue Digital Minimal • • • • • SPAD Row and Time Gate Time Gate Digital logic Col Select in pixel • • • SPAD + 1b Memory Analogue • • Passive Column Counter or TDC or • A “Jot” Quench bus TAC Digital sharing Counters This Work Highest Fill Lowest Fill Factor Factor Least In- Most pixel In-pixel Functionality Functionality

CMOS SPAD Pixels 3 SPAD Only SPAD + Analogue Minimal Digital 1b Mem [A] Richardson, J. et al . “A 32 ×32 50ps Resolution 10 bit Time to Digital Converter Array in 130nm CMOS for Time Correlated Imaging” 2009, CICC, Proc. Of, [B] Webster et al. "A silicon photomultiplier with >30% detection efficiency from 450- 750nm and 11.6μm pitch NMOS -only pixel with 21.6% fill factor in 130nm CMOS“ Proc of ESSDERC, 2012 [C] Walker, R. et al. “High Fill Factor Digital Silicon Photomultiplier Structures in 130nm CMOS Imaging Technology” 2012, IEEE N SS, Proc. Of, [D] Maruyama, Y. et al. “ A Time-Gated 128X128 CMOS SPAD Array for On- Chip Fluorescence Detection” IISW 2011

Fabricated Test Array 4 NMOS Logic p+ n+ n+ S S S S T T T T P-well I I I I N-well N-well P-well 9.8µm Deep Retrograde N-well P-substrate

Pixel Schematic 5 SPAD & Time Gate CTA Readout Quench VHV VDD DIS M2 TEST RST M6 M4 SPAD VC EN M9 VIN VSPAD M7 M3 RD M10 VB CP MC Column VQ M1 DIS M5 VG M8 VS GND SPADGND ΔVC = (ΔV IN – V B – V T_M7 ) . (C P /C MC )

Charge Transfer Amplifier Timing 6 RST EN VSPAD VIN VB VC Δ VC ΔVC = (ΔV IN – V B – V T_M7 ) . (C P /C MC )

CTA Operation 7 VS = 0.0V VS = 0.3V Bias Controllable Sensitivity VS = 0.6V VS = 0.9V

Pixel Characterisation 8 • Column Output Voltage Histogram – Discretised Poisson Curve 3Ph 2Ph 1Ph 4Ph 5Ph 6Ph 7Ph VS = 0.3V VS = 0.0V VS = 0.6V

Bias Controlled Sensitivity 9 First Order Eq’n : ΔV = (ΔV IN – V B – V T ) . (C P /C MC )

Full Well Capacity 10

Pixel Response Non Uniformity 11 𝐷 𝑄 2 + 𝜏 𝑊𝑇𝑄𝐵𝐸 2 𝜏 ∆𝑊 = . 𝜏 𝑊𝑈_𝑁7 First Order Eqn: 𝐷 𝑁𝐷

Input Referred Noise 12 [1] Teranishi 2012: Readount noise less than 0.3e - for electron counting

Switched Current Source Mode 13 • CTA operated as a switched current source. • This mode enables fast single photon detection. • Zero, one, few photons . • Time gated QIS pixel, Fossum 2011 [11]

Switched Current Source Mode 14

Switched Current Source Mode 15

Summary (1) 16 • 11T NMOS-only SPAD-based Single Photon Counting pixel implemented in low voltage 130nm imaging CMOS with no extra implants.

Summary (2) 17 • Two modes: • ‘CTA’  Analogue Counting • ‘SCS’  1b Memory • Bias controlled sensitivity • PRNU <2% for sensitivity range 5.5mV to 13.1mV/event • Scalable pixel design with zero static bias current.

Thank You Questions?