Photolithography is an important process for VLSI manufacturing. As we had seen during in the introduction to the course, the key to success of VLSI technology is its ability to reduce device dimensions with a resultant increase in the performance. The cost per function also came down as more devices could be fabricated in the same chip area. This ability to fabricate smaller and smaller features is mainly attributed to advances in lithography. Lithography systems are also the most expensive tools in a modern VLSI manufacturing facility. The cost of 193 nm lithography tools that are presently used in manufacturing is in the range of 10 - 15 million USD. The cost of next generation extreme UV (EUV) tool is expected to be in the range of 100 million USD (ref: http://www.eetimes.com/electronics-news/4210901/EUV-tool-costs-hit--120- million-). From the perspective of the circuit designer, the interface between process technology and circuit designers traditionally happened at the lithography. The end product of a traditional logic circuit design cycle from a process point is a mask design which contains information on the relative locations of various structures on the chip and the interconnection between them. 403
A typical photolithograpy cycle is shown on the slide. The design of a chip would start with specifications, circuit design etc. Eventually the circuit designer would provide what is called a layout out of all the devices and structures and the interconnects. The layout is 2 dimensional. Once a layout is made, the correctness of the design and conformance to specifications should be verified using appropriate simulations. It should be also verified that the layout passes the design rules set out by technology. We would discuss this point in more detail later. Since modern VLSI circuits are quite complex and contains millions of transistors and other electronic devices, the task of layout design, simulation and DRC are carried out with the help of computer aided design tools. One of the interesting point here is that faster and more complex VLSI chips have resulted in higher performance of computers which in turn has facilitated the design of more complex chips. Once the layout is designed, it is transferred to a mask using an electron beam lithography process. The mask thus created is subsequently used for transferring patterns on the mask to photo resist coated on a wafer. The mask contains regions that are transparent and that are opaque. The wafer exposure system consist of a source of light, which is then collimated to obtain a parallel beam using a condenser lens. The parallel beam of light is then passed through the mask. Light will pass through the transparent regions in the mask. So the light pattern that comes out of the mask would follow the image on the mask. This light is subsequently used for exposing photo resist coated on the wafer surface. The photo resist is a photo sensitive material. The regions of the resist that is exposed to light would undergo certain changes. The resist regions exposed can be removed or retained selective to the regions that are not exposed. Typically the smallest features on the design could be as small as 100nm or smaller. However in advanced lithography systems, the corresponding feature may be 4 to 5 times larger. This simplifies mask fabrication. A reduction lens is used for reducing the size of the image printed on the wafer. 404
This is an example of the application of lithography. This also illustrates the lithography process in more detail. In this specific example, a feature is etched in SiO 2 grown or deposited on Si. First a photo resist is spin coated on the surface of the wafer. Subsequently a lithography mask is used to optically expose the photo resist. This results in transfer of the image on the mask on to the resist. Subsequently the resist is developed. Resist development is a process in which the whole wafer is dipped in a chemical solution called a developer which would selectively etch resist that has been exposed to light or that has not been exposed to light. In this particular example, the resist is removed from the areas where it was not exposed to light. Subsequently SiO 2 is etched using the resist as the mask. The etchant typically used for this process is buffered HF. Buffered HF is a solution of HF and NH 4 F in water. After etching the SiO 2 , the resist is removed so that the wafer can be further processed. 405
The optical source used has a profound impact on the lithography system and the minimum feature size that can be printed with the system. We would see later that the feature size is directly related to the wavelength of light. So lithography for smaller feature sizes would require smaller and smaller wavelengths of light. However there are several issues, which can be illustrated by EUV. EUV photons would have an energy of ~ 92 eV. The bandgap of SiO 2 used for glass is 9 eV !. So glass can not be used for making lenses as it would completely absorb the light. In fact air would also absorb EUV. Hence the lithography process has to be carried out in vacuum! Although higher wavelengths are not fully absorbed by SiO 2 , impurities in the glass would enhance the absorption. White light sources like Xenon lamps may be used for low resolution (large feature size) lithography. 406
The mask contains both transparent and opaque regions on it. Most popular material for mask is glass. However e-beam lithography does not use any mask. EUV would be absorbed by glass. In the lab we also use transparency sheets when the feature sizes are more than 20 um. The opaque regions in such cases are ink, printed using a laser printer. Coming back to glass, the opaque regions are usually Chrome. In fact Chrome is coated on the whole surface of the glass. A lithography process is then carried out on this stack to etch away Chrome. Typical Chrome thickness is in the range of 100 nm. Modern VLSI processing may use 30 – 40 masks. 407
Two types of resist are used. Positive resist develops in areas where it was exposed and negative resist develops in areas where it was not exposed. Generally positive resists give better lithographic resolution than negative resists. Modern resists contains organic compounds. The resist is subsequently used as mask for etching (both wet and reaction etching processes) and ion implantation. If the intended application is etching, the resist should be robust against the chemicals and ambient (plasma, temperature etc) used for etching. For example aqueous HF is widely used for etching of SiO 2 . However most of the resists would be attacked by HF. On the other hand buffered HF is not seen to etch resists. In an ion implantation process, the resist should be thick enough to block implantation into the underlying layer. Another issue is related to the fact that the resist should be removed after the etching or ion implantation. However the resist may undergo chemical and physical transformation during etching and ion implantation, which makes it harder to remove. 408
Out of these factors, resolution is controlled by the resolution of the optical system and the capabilities of the photo resist and related processes. Pitch and overlay are decided by the optical system. The other parameters are controlled by the optical system as well as resist track. 409
Critical dimension that can be printed is an important parameter. In every new technology generation, the gate length has to be reduced. Presently you can buy chip with gate lengths of about 30 nm. The pitch is the minimum period of a periodic array of minimum feature size lines that can be printed. This is an important consideration because you would like to pack more devices. So it is desirable to reduce the spacing between two adjacent lines. Overlay or alignment is a very important parameter which dictates many of the design rules. Overlay error is the displacement of the features in to consecutive lithographic steps using the same mask. In practice we may not use the same mask for two consecutive litho steps. The impact of overlay on design rules can be described using an example. The CD and pitch achieved using modern lithography processes are in the same order as the wavelength of light. 410
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