PXD9 Technology & Design Status Rainer Richter MPI - PowerPoint PPT Presentation

PXD9 Technology & Design Status Rainer Richter MPI Semiconductor Lab 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Outline - Production status - Technology change to overcome the odd/even pedestal shift problem after radiation - Design modifications to improve yield and testability - Update of 3d simulations final doping profils expected operation windows (voltage) ? 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 Technology Status (i) Process sequence – after SOI - Oxidation - Transfer of alignment marks from BOX->backside->frontside - Global n-implantation (nd0n) - Nitride deposition - 1. Poly deposition, implantation, recrystalization (Sept. 2012) - 1. Poly lithography and etching - 1. Poly oxidation - Nitride etching Litho and implantation – pshn (threshold adjustment ) - Litho and implantation – pdpn (pot. barrier beneath Clear) - Litho and implantation – nd1n (internal Gate) - Litho and implantation – noxn (Clear) - - 2. Poly deposition, implantation, recrystalization - 2. Poly lithography and etching - 2. Poly oxidation Litho and implantation – pson (Source) - 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Production Status 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 Technology Status (ii) Next steps Litho and implantation – pson (Source) - - 2. Poly oxidation Litho and implantation – poxn (Drain and Drift) - - Nitride, Oxide deposition - Contacts co1n (part 1) - co1n (part 2) - Al1n sputter and litho - by end of March - Module design has to be defined ! - first electrical tests - ZMI deposition - Contacts co2n - al2n sputter and litho - electrical tests Back thinning, BCB, Cu, Passivation … 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 – Technology Status (iii) Source, Drain, Drift Implantation originally planned to be HE p defined by 1 mask (poxn) DRIFT as in PXD6 After poly oxidation ! HE n G D C S CG D DRIFT 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

The odd even pedestal problem H.4.1.09 Results from Bonn 12 International Workshop on DEPFET Detectors and Applications, 7 R. H. Richter, HLL Wetzlar, 5. February 2013

H.4.1.09 Initial state After electron irradiation of 15 kGy Results from Bonn 12 International Workshop on DEPFET Detectors and Applications, 8 R. H. Richter, HLL Wetzlar, 5. February 2013

H.4.1.09 After electron irradiation of 15 kGy Results from Bonn Odd rows Even rows 12 International Workshop on DEPFET Detectors and Applications, 9 R. H. Richter, HLL Wetzlar, 5. February 2013

Where does it come from? HE p DRIFT implanted after oxidation HE n G D poly oxide acts as lateral spacer C S CG D DRIFT Bad connection between Source and channel Small region where connection is given by threshold adjust implant only (much lower boron concentration) Slight shadow effects during etching and implantation can cause asymmetries 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Bad Source – Channel Connection 2D Simulation Hole concentration along the channel VG = -3V, VD= -3V 10 18 10 17 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

What can we do? VG = -3V, VD= -3V Implant before oxidation before Ox. after Ox. Id = 113 µA 10 18 10 17 10 18 Id = 103 µA 10 17 before oxidation + optimized Id = 114,5 µA implantation 10 18 parameter 10 17 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Implications (i) Need of two implantations instead of one Preserving the nice low field conditions at drain HE p DRIFT HE n D G S C CG D 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Implications (ii) Yield lesson from PXD6: Relaxing the topology Clear line must run parallel to Source -> asymmetric Source contact Sheet resistance 300Ohm/sq. (3x lower than in the old technology due to better implant activation) Estimation: @Id=80µA, gm=50µS -> I ≈ 4µA We will see an odd-even behavior but no change with radiation 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Fault tolerant design Shorts between neighoring Drain lines (2nd metal when climbing over 1st metal (severe problem if S/D short) improve technology, relax topology, testing features 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Design for testability ‘removable‘ test pad array Cutting edge 16 x 64 4.5mm Matrix Aim: test all drain lines after 2nd metal with a probe card or ‘ flying needle ‘ (repair if necessary by overetching, or repeating the litho), A significant number of Depfet IV ca be taken. Sacrifice test matrices and structures to provide the space 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Removing of the metal 2 connections after the tests ‘removable‘ test pad array Cutting edge 16 x 64 Matrix coarse mask to disconnect the test pads by etching the 2nd metal traces 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Drain Fanout to DCD (i) Former design contains interleaved metal 1 und metal 2 lines Poly guard ring structure of punch through contact (-80V) Dangerous due to the weaker insulator (poly/first metal) 500nm oxide 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Drain Fanout to DCD (ii) All lines are routed now in metal2 -> oxide thickness 1.5µm -> smoother edge coverage 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Drain Fanout to DCD (iii) -> smaller lines, partially compensated by use of larger fanout angles than 45 smallest line width: 6.7µm (in matrix 7µm) 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 - Operation Windows (voltages) VD=-3V, Vdrift=-5V, Vcg=-0.5V, Vc=3V, Vb=-28V All 3d simulations with revised implantation parameters (applied to PXD9), also with ‘New Source Technology‘ 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 - Operation Windows (voltages) VG=3V, VD=-3V, Vdrift=-5V, Vcg=-0.5V, Vc=3V, Vb=-28V 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

PXD9 - Operation Windows (voltages) VG=6V, VD=-3V, Vdrift=-5V, Vcg=-0.5V, Vc=3V, Vb=-28V 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Charge collection (10.000 e/h pairs generated at backplane) Vclg = +4V K. Gärtner WIAS Berlin 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

ClearGate Voltage Range ‘irradiated‘ simulated by Vclg=5V corresponds to Nox ≈ 10 12 cm -2 Non irradiated Vclg=-0.5V Result of the new PXD9-Clear-Technology (As dop) Limitation is not given anymore by weak Clear barriers (back inj.) But by electron overflow from internal gate to clear gate 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Confirmed by Trajectories 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Next steps: Gated Mode + Cap. Coupled Clear Gate Simulations with ‘ buildt in‘ coupling factor between Clear and ClearGate (30%) First results – junk charge suppression Vclear =15V  Vclear =11V  12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013

Operation at Vd = -3V, instead of -5V Advantages less power (60%) less rad. damage in CG Oxide lower electric fields at Drain regions (gated mode) (less noisy pixel) less gm (more rad. tolerant) Drawbacks less gq ( about 10% for thin oxides - simulations ) slightly worse ‘Blind selectivity ‘ (Gated mode) Need for experimental verification ! (laser, source, TB) 12 International Workshop on DEPFET Detectors and Applications, R. H. Richter, HLL Wetzlar, 5. February 2013