- 2. Introduction to Diodes
ECE 65, Winter 2013, F. Najmabadi
2. Introduction to Diodes Lecture notes: page 2-1 to 2-19 Sedra - - PowerPoint PPT Presentation
2. Introduction to Diodes Lecture notes: page 2-1 to 2-19 Sedra & Smith (6 th Ed): Sec. 3.* and 4.1-4.4 Sedra & Smith (5 th Ed): Sec. 3.7* and Sec. 3.1-3.4 * Includes details of pn junction operation which is not covered in this course
ECE 65, Winter 2013, F. Najmabadi
and are responsible for the chemical properties of the material.
a finite number of electrons.
The larger the energy level, the larger is the spatial extent of electron orbital.
Nucleus position
bottom of conduction band
For small inter-distance between ions, energy levels become energy bands. Forbidden energy gaps between energy bands.
easily in the material and conduct heat and electricity (Conductors).
is full.
move to the conduction band and material conduct electricity.
Thus, at room temperature very few electrons are in the conduction band.
Metal Semiconductor at T = 0 k Semiconductor at T > 0 k Insulator
to the conduction bands.
conduction band move across the material (e.g., due to an applied electric field).
valance band jump between available slots in the valance bands (or “holes”).
moving to the right!
differentiate this current due to conduction band electrons.
Conduction band Valance band
“holes” or available slots in the valance band
Pure Si Crystal
Doped n-type Semiconductor
electron which is in the conduction band.
excitation
Doped p-type Semiconductor
electrons: a hole in the valance band.
excitation
volt-equivalent of temperature
T =
Construction on a CMOS chip
High concentration of h on the p side Holes diffuse towards the junction High concentration of e on the n side Electrons diffuse towards the junction n side is positively charged because it has lost electrons. p side is negatively charged because it has lost holes.
Holes from the p side and electrons from the n side combine at the junction, forming a depletion region Idif Idif
(holes) move toward the depletion region, and are swept into the p side by the potential where the combine with electrons. (similar process for minority carriers on the p side). This sets up a drift current, IS.
should flow (height of potential is slightly lower).
voltage barrier.
sensitive function of temperature.
Idif IS
Reverse-Bias:
Forward-Bias:
IS : Reverse Saturation Current (10-9 to 10-18 A) VT : Volt-equivalent temperature (= 26 mV at room temperature) n: Emission coefficient (1 ≤ n ≤ 2 for Si ICs)
/
T D nV
v S D
: bias Reverse : bias Forward 3 | | For
/ S D nV v S D T D
I i e I i nV v
T D
− ≈ ≈ ≥
For derivation of diode iv equation, see Sedra & Smith Sec. 3
Sensitive to temperature:
Thermal load, P = iD vD (typically specified as maximum iD ) Reverse Breakdown at Zener voltage (VZ) (due to Zener or avalanche effects) Zener diodes are made specially to operate in this region safely!
1 : Eq. : KVL elements all in current : KCL
/
− = + =
T D nV
v S D D D i D
e I i iv v Ri v i
1 : Eq. : KVL elements all in current : KCL
/
− = + =
T D nV
v S D D D i D
e I i iv v Ri v i
D D i
v Ri v + =
1
/
− =
T D nV
v S D
e I i
Intersection of two curves satisfies both equations and is the solution vi vi/R vDQ iDQ Load Line
Constant Voltage Model
Si for V 7 . 6 . voltage, in"
" and : OFF Diode and : ON Diode − = < = ≥ =
D D D D D D D
V V v i i V v
Circuit Models: ON: OFF: Diode ON Diode OFF VD0
that we can find numerical values of iD and vD .
D D D D i D
v i v Ri v i + = + = 10 5 : KVL elements all in current : KCL
3
incorrect Assumption V 7 . V 5 V 5 10 5 and : OFF is diode Assume
3
→ = > = = → + × = < =
D D D D D D D
V v v v V v i correct Assumption mA 3 . 4 mA 3 . 4 7 . 10 5 and V 7 . : ON is diode Assume
3
→ > = = → + = ≥ = =
D D D D D D
i i i i V v
Diode is ON with iD = 4.3 mA and vD = 0.7 V).
Incorrect! V 7 . V 5 V 5 10 5
3
→ = > = = → + × =
D D D D
V v v v Correct! mA 3 . 4 mA 3 . 4 7 . 10 5
3
→ ≥ = = → + =
D D D
i i i
Diode is ON with iD = 4.3 mA and , vD = 0.7 V. Solution with diode circuit models:
and : OFF Diode
D D D
V v i < = and : ON Diode ≥ =
D D D
i V v
R
D i D D i D D i
V v V v v v v v < → < = → + × = / ) ( R
D i D D i D D D i D D
V v i R V v i V i v V v ≥ → ≥ − = → + = = and : OFF Diode
D D D
V v i < = and : ON Diode ≥ =
D D D
i V v
i D D i D D D i
Solution Inequality
Constant Voltage Model
Diode ON Diode OFF VD0 Diode can be in forward bias with vD as small as 0.4 V when iD is small (Lab 4) In forward bias, “cut-in” voltage (VD0) can vary between 0.6 & 0.8 V (± 0.1 V) In forward bias, diode voltage changes slightly as current changes (discussed later in small signal model)
Schottky Barrier Diode
Zener Diode
reverse breakdown region.
many circuits. Light-emitting diode (LED)
and : Zener and : OFF Diode and : ON Diode ≤ − = < < − = ≥ =
D Z D D D Z D D D D
i V v V v V i i V v
Diode ON Diode OFF VD0 Zener Circuit Models: ON: OFF: Zener:
and : region in Zener diode Assume 1) ≤ − =
D Z D
i V v constant : KVL = = − =
Z D
v v R V v i i V Ri v i i i
Z s
Z s
− − = + = − = : KVL : KCL
(Independent of io !)
for region in Zener Diode ≤
D
i
max ,
s
i R V v i i = − ≤ → ≤
Acts as independent voltage sources even if vs changes!
Do D Z D
V v V i < < − = and : region bias reverse in diode Assume 2)
v v v Ri v i i − = + = = : KVL : KCL
(vo drops as io increases)
Do D Z
V v V < < − for region bias
in Diode R v i R V v V Ri v v V v V V v V v v
s
s Z
Do D Z D
< − → < − = ≤ − > > + → < < − − =
Problem specified vo ≥ 0
modeled with a “sloped” line: vD = VD0 + RDiD (instead of vD = VD0 )
(RD and VD0 ) and the choice is somewhat arbitrary.
“increased accuracy”
important
modeled with a “sloped” line: vD = −VZ0 + RZ iD (instead of vD = −VZ0 )
important.
model for Example 2, we find*:
constant
instead = = − ≈
Z
Z
v i R V v
* See lecture notes, page 2-18