Towards a Synchronous React ive UML Prof ile? Robert de Simone - - PowerPoint PPT Presentation

towards a synchronous react ive uml prof ile
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Towards a Synchronous React ive UML Prof ile? Robert de Simone - - PowerPoint PPT Presentation

Towards a Synchronous React ive UML Prof ile? Robert de Simone Charles Andr SVERTS San Francisco 2003 Charles ANDRE Synchronous hypot heses S/ R st ands f or Synchronous React ive Logical division of t ime int o inst ant


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SLIDE 1

SVERTS – San Francisco 2003 – Charles ANDRE

Towards a “Synchronous React ive” UML Prof ile?

Robert de Simone Charles André

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SLIDE 2

SVERTS – San Francisco 2003 – Charles ANDRE

Synchronous hypot heses

S/ R st ands f or Synchronous React ive

  • Logical division of t ime int o inst ant s
  • At each inst ant : execut e a synchronous

cycle (a react ion)

– Acquisit ion – Comput e (a global run-t o-complet ion) – Act uat e

  • Signals are t he unique support f or

communicat ion

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SVERTS – San Francisco 2003 – Charles ANDRE

Where S/ R should be used

  • Applicat ions:

– Embedded cont r oller , HMI , HW/ SW, …

  • Formalisms:

– St r ict ly synchr onous

  • SCADE, Est erel St udio, Block Diagrams

– Almost synchronous

  • St at echart s, VHDL/ Verilog, Simulink, Scicos

Circuits CAD DSP, autom . Control simulators

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SVERTS – San Francisco 2003 – Charles ANDRE

Cont rol-f low / Dat a-f low

State

(hierarchical, register, counter, …)

Control Flow Memory, Processing units Data Flow (pipeline, …) Clk Activations Conditions (events) INPUTS OUTPUTS

S/ R capsules Esterel/ SyncCharts: state- oriented Lustre/ Scade: activity- oriented ?

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SVERTS – San Francisco 2003 – Charles ANDRE

S/ R semant ic domain

+react() SRModel +testPresence() +fixStatus() +noMoreEmit() +setPresence() +getValue() +setValue() SRSignal presenceStatus value +actuate() SROutput +react() SRUnit +sample() SRInput Clock 0..* +inp 0..* 0..1 +output 1 0..1 +top 1 0..1 +input 1 0..* +outp 0..* +parent 0..1 +child 0..* 0..1 +local * 0..1 * 0..1 *

Not a metamodel – Only to represent main concepts

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SVERTS – San Francisco 2003 – Charles ANDRE

Dynamic semant ics

{ctr_sync2} SREvent {ctr_sync1} SRReaction presenceStatus value SRClockedSignal Clock SRInput SROutput SRSignal SRInputEvent SROutputEvent SRModel SRInstant +sig 1 +outputHistory {ordered} * +sigOccs * 1 read +inEvent 1 +instant 1 * 1 +reactionSequence {ordered} * +sig 1 +inputHistory {ordered} * 1 +instantSequence {ordered} * +sig 1 +signalHistory {ordered} * write +outEvent 1 +instant * 1 +instant 1 *

Reaction = Behavior at

  • ne instant

Signal

  • ccurrence

Event = Set of signal

  • ccurrences
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SLIDE 7

SVERTS – San Francisco 2003 – Charles ANDRE

Example of an Ar bit er

User 1 User N

UserCtrl UserCtrl Arbiter Critical resource

  • Users: Rq and Rl
  • Arbit er: G, D
  • Exclusive access
  • St at ic pr ior it y
  • D valued wit h t he nb
  • f candidat es f or

t he resource wit h higher pr ior it y

  • Linear descr ipt ion
  • vs. t he nb of users
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SVERTS – San Francisco 2003 – Charles ANDRE

St at e-based synchronous modeling

using blkd

# not Fi Fi / G / D

rscNeeded

Fi/Fo

auto

Rq # Rl

ArbUnit

input Fi, Rq, Rl

  • utput Fo, G, D

syncCharts

Fi Fo Rq Rl G D A1:ArbUnit Rq Rl G D U1:UserCtrl

  • ther inputs
  • ther outputs

Fi Fo Rq Rl G D A2:ArbUnit Rq Rl G D U2:UserCtrl

  • ther inputs
  • ther outputs

Fi Fo Rq Rl G D A3:ArbUnit Rq Rl G D U3:UserCtrl

  • ther inputs
  • ther outputs

F1 F2

Structure diagram

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SVERTS – San Francisco 2003 – Charles ANDRE

Limit at ions of t he UML St at e Machines

  • Obj ect -based variant of st at echart s
  • Semant ics described in t erms of
  • perat ions of a hypot het ical machine
  • Event queue + dispat cher
  • Event s are dispat ched and processed
  • ne at a t ime
  • Run-t o-complet ion assumpt ion
  • Poor support f or concurrency
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SVERTS – San Francisco 2003 – Charles ANDRE

What is missing

  • Dealing wit h one event at a t ime is not

accept able f or S/ R models: many is t he r ule

  • Combinat ion of event s (signals)
  • Run-t o-complet ion: t o much rest rict ive.

S/ R have high degree of concurrency

  • A not ion out of t he scope of classical

asynchronous models: react ion t o t he absence

  • Needs: a clear not ion of inst ant
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SVERTS – San Francisco 2003 – Charles ANDRE

Act ivit y-orient ed approach

U Fi.test() G.setP() D.setP() [present] [absent] Rl.test() state=auto state=rscNeeded [present] [absent] Fo.setA() A U [state==auto] [state==rscNeeded] A Rq.test() [present] [absent] Fi.test() Fo.setP() Fo.setA() [present] [absent] U D.setA() G.setA() Initially: state = auto

I nitial node Final node Activities f rom initial to f inal within one instant

Activity diagram for a reaction of the ArbUnit

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SVERTS – San Francisco 2003 – Charles ANDRE

Emer gent behavior

Stable conf iguration

U1:UserCtrl A1:ArbUnit autonomous auto autonomous.react() Rq.setP() Rq.test() Fi.test() G.setP() Fo.setA() Rl.test() using G.test() usingRsc.react() usingRsc U2:UserCtrl A2:ArbUnit usingRsc using Fi.test() D.setP() Fo.setA() Rl.test() using D.test() usingRsc U3:UserCtrl A3:ArbUnit autonomous using Fi.test() G.setA() D.setP() Fo.setA() Rl.test() using G.test() usingRsc autonomous.react() Rq.setP() Rq.test() D.setA() G.setA() Rl.setA() Rl.setA() Rl.setA()

A reaction

Causality relation

A signal may be t est ed

  • nly af t er

being set

Finite and acyclic at each instant

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SVERTS – San Francisco 2003 – Charles ANDRE

Ref erence clock (represent s physical t ime) Causality appears as time precedence Signal buf f ering, queues Logical discrete time abstract causality within instant Strict instant: possibility to lose f leeting events

Time

Temporal analysis Perf ormance analysis Real- time simulation Relevance of timing f igures? High- level design & programming I mplementation independent

Purpose SPT SR

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SVERTS – San Francisco 2003 – Charles ANDRE

Scheduling in S/ R

  • Temporal and/ or spat ial mapping

(SynDEx)

  • Essent ial needs: respect causalit y
  • I nt roduce chronomet ric t ime on

archit ect ural plat f orm resources

  • Of t en: a unif orm scheduling f or t he

whole applicat ion (i.e., a scheduling valid f or all react ions).

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SVERTS – San Francisco 2003 – Charles ANDRE

Conclusion

  • “Cont rol syst em engineering” has specif ic

needs, not all addressed by t he UML

  • The S/ R approach answers some of t hem
  • UML + …
  • SPT OK f or real-t ime cooperat ion of
  • bj ect s
  • S/ R well-suit ed f or Cont rol f low/ Dat a

f low t ight int eract ions. But it demands relaxing some UML rules (especially f or UML SM semant ics)

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SVERTS – San Francisco 2003 – Charles ANDRE

S/ R Mixed Archit ect ure

Event Activation