[PPT] - The Protection of Electronic Devices The Protection of Electronic PowerPoint Presentation

SLIDE 1

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

The Protection of Electronic Devices The Protection of Electronic Devices Against Transient Threat Events Against Transient Threat Events

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Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

OUTLINE OUTLINE

♦ ♦ The ESD Testing of Electronic Products The ESD Testing of Electronic Products ♦ ♦ The EFT Testing of Electronic Products The EFT Testing of Electronic Products ♦ ♦ The Surge Testing of Electronic Products The Surge Testing of Electronic Products ♦ ♦ The Functions of Transient Voltage The Functions of Transient Voltage Suppressor (TVS) Suppressor (TVS) ♦ ♦ The TVS Arrays The TVS Arrays ♦ ♦ Summary Summary

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2007. Dec.
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The ESD Testing of Electronic The ESD Testing of Electronic Products Products

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2007. Dec.
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HBM HBM

Grounded Surface

!@#$%&*$ ^#

ESD : ESD : E Electro lectroS Static tatic D Discharge ischarge

Discharge event due to tribo-electrically generated charges. ESD is a High-Current (~Amps) and Short-duration (~ ns) stress event.

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1.

1. The IC

The IC’ ’s are progressing into nm era, e.g. 90nm, 60nm, 45nm s are progressing into nm era, e.g. 90nm, 60nm, 45nm processes. processes. Transistors are very weak for sustaining ESD event. Transistors are very weak for sustaining ESD event. 2.

2. The system operating voltage is going to low voltage, e.g. 5V

The system operating voltage is going to low voltage, e.g. 5V 3.3V 3.3V

2.5V

2.5V 1.8V 1.8V 1.2V. 1.2V.

Signals are easy to be destroyed due to

Signals are easy to be destroyed due to ESD transient event. ESD transient event. 3.

3. The Aspects of Electronic Products are going into Compact and

The Aspects of Electronic Products are going into Compact and Light. Light. ESD event is easy to enter the core circuit regions of the ESD event is easy to enter the core circuit regions of the system. system. 4.

4. The User

The User’ ’s usage behaviors should be more friendlier, e.g. less s usage behaviors should be more friendlier, e.g. less limitation. limitation. One popular usage behavior is the hot One popular usage behavior is the hot-

plugging action.

plugging action. ESD event is easy to be generated. ESD event is easy to be generated. 5.

5. High Quality demand is current vogue.

High Quality demand is current vogue. ESD testing specifications ESD testing specifications are more stricter! are more stricter!

Why System ESD Issue Is More Important? Why System ESD Issue Is More Important?

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2007. Dec.
2007. Dec.

ESD Is So Serious ! ESD Is So Serious !

Means of Static Generation Electrostatic Voltage

10% R.H. 40% R.H. 55% R.H. Person walking across Carpet Person walking across Vinyl Floor Worker at a Bench Ceramic DIP in Plastic Tube Ceramic DIP in Vinyl Set-up Trays IC Packs as Bubble Plastic Cover is removed IC Packs as Packed in Foam Lined Shipping Box

35,000 V 15,000 V 7,500 V 12,000 V 5,000 V 3,000 V 6,000 V 500 V 400 V 2,000 V 700 V 400 V 11,500 V 4,000 V 2,000 V 26,000 V 20,000 V 7,000 V 21,000 V 11,000 V 5,500 V End End-

user

user’ ’s s environment environment Factory Factory’ ’s s environment environment

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Two Kinds of ESD Testing Standards Two Kinds of ESD Testing Standards Component Level: Component Level:

To Simulate the ESD events in a

To Simulate the ESD events in a well well-

controlled

controlled environment, such as factory environment. environment, such as factory environment.

To characterize a component

To characterize a component’ ’s ( s (e.g. IC e.g. IC’ ’s s) electrostatic ) electrostatic discharge (ESD) susceptibility fully. discharge (ESD) susceptibility fully.

It is

It is not alive testing not alive testing and it uses damage as testing and it uses damage as testing criterion. criterion.

System Level: System Level:

To Simulate the ESD events in an

To Simulate the ESD events in an un un-

controlled

controlled environment, such as end environment, such as end-

user

user’ ’s environment. s environment.

To characterize a system

To characterize a system’ ’s ( s (e.g. Electronic Products e.g. Electronic Products) ) electrostatic discharge (ESD) susceptibility fully. electrostatic discharge (ESD) susceptibility fully.

It is

It is alive testing alive testing and it uses interference, mal and it uses interference, mal-

function, and

function, and damage as testing criteria. damage as testing criteria.

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ESD Events for IC ESD Events for IC’ ’s s (Component Level) (Component Level)

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ESD Events for IC ESD Events for IC’ ’s (Component Level) s (Component Level) Component Level: Component Level:

(To Simulate the ESD events in a (To Simulate the ESD events in a well well-

controlled

controlled environment, environment, such as factory environment) such as factory environment) To characterize a component To characterize a component’ ’s ( s (e.g. IC e.g. IC’ ’s s) electrostatic ) electrostatic discharge (ESD) susceptibility fully, it should be tested to the discharge (ESD) susceptibility fully, it should be tested to the following three ESD test standards: following three ESD test standards: Human Body Model Human Body Model– –HBM : HBM : Discharge to the IC Discharge to the IC’ ’s. s. (ANSI/ESD STM5.1 (ANSI/ESD STM5.1-

2001)

2001) Machine Model Machine Model– –MM : MM : Discharge to the IC Discharge to the IC’ ’s. s. (ANSI/ESD STM5.2 (ANSI/ESD STM5.2-

1999)

1999) Charged Device Model Charged Device Model– –CDM: CDM: Discharge from the IC Discharge from the IC’ ’s. s. (ANSI/ESD STM5.3.1 (ANSI/ESD STM5.3.1-

1999)

1999)

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(1). Human Body Model (HBM) (1). Human Body Model (HBM)

CHBM= 100pF; RHBM= 1.5kΩ

Ipeak = ~ 1.3A (for 2000V HBM) tr = 2 ~ 10 ns

DEVICE UNDER TEST

1.5kΩ

B A

100pF R V

+

_

Discharge to the Component Discharge to the Component

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(2). Machine Model (MM) (2). Machine Model (MM)

CMM= 200pF RMM= 0Ω

VESD

Device Under Test C=200pF GND Rg

Ipeak = ~ 3.8A (for 200V MM) Resonance Freq. = ~ 16 MHz Discharge to the Component Discharge to the Component

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(3). Charged Device Model (CDM) (3). Charged Device Model (CDM)

GND

VESD

Device Under Test

Cd Rg Ld Rd

Ipeak= 15A (for 1000-V CDM @ 4pF) tr < 200ps (for CDM @4pF) Discharge from the Component Discharge from the Component

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Comparisons among the ESD Pulses Comparisons among the ESD Pulses

Rise Time: Duration : Peak Current: CDM < MM < HBM HBM > MM > CDM CDM > MM > HBM

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Pin Combination in HBM / MM ESD Testing (I)

ESD stress on the input or output pins with the VDD or VSS pins relatively grounded:

(1) PS-mode (2) NS-mode (3) PD-mode (4) ND-mode

VESD

0V +V VSS VDD

V

0V

VESD

VSS VDD

VESD

0V +V VSS VDD

V

0V

VESD

VSS VDD

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Pin Combination in HBM / MM ESD Testing (II) Pin-to-Pin ESD Stress: (1) Positive-mode (2) Negative-mode

VESD

0V +V VDD

I/O

VSS

VESD

V

0V

VDD

I/O

VSS

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VDD-to-VSS ESD Stress: Pin Combination in HBM / MM ESD Testing (III) (1) Positive-mode (2) Negative-mode

VESD

V

0V

VSS VDD

VESD

0V +V VSS VDD

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VDD-to-VSS ESD Stress for the IC having multiple power pins:

0V +V VSS1 VDD1 VDD2 VSS2

VESD

V

0V

VSS1 VDD1 VDD2 VSS2

VESD

0V +V VSS1 VDD1 VDD2 VSS2

VESD

V

0V

VSS1 VDD1 VDD2 VSS2

VESD

(1) VDD1 to all VSS pin (+ Zapping) (3) VDD1 to all VSS pin ( - Zapping) (2) VDD2 to all VSS pin (+ Zapping) (4) VDD2 to all VSS pin ( - Zapping)

Pin Combination in HBM / MM ESD Testing (IV)

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Pin Combination in CDM ESD Testing

(1) Positive-mode (2) Negative-mode

In the CDM ESD testing: (a) The ESD voltage is added into the pin which is connected to the substrate and stored in the substrate. (b) The ESD voltage is discharged through the pins included the input, output, I/O, and VDD pins. (c) The pin shorted to ground to discharge the ESD current : (1) by the relay (switch) -- socketed ; (2) by the grounded discharge bar -- non-socketed.

+VESD

VDD

R

VSS

VESD

VDD

R

VSS

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Available CDM ESD Tester

Conductor Plate High-Voltage Power Supply Insulator

Non-Socketed CDM Socket Socketed CDM

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HBM / MM ESD Failure on the I/O Transistors HBM / MM ESD Failure on the I/O Transistors

HBM Failure MM Failure

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General ESD Specifications for IC Products General ESD Specifications for IC Products HBM MM CDM +/- 2kV +/- 200V +/- 1kV +/- 4kV +/- 400V +/- 1.5kV +/- 10kV +/- 1kV +/- 2kV Okay Safe Super

* An IC during ESD test with all pin combinations has to pass above ESD specifications (both positive and negative ESD voltages). * ESD failure criterion including pin leakage current and all function testing.

Basic Spec. for Commercial IC’s

This Spec. Can This Spec. Can’ ’t Guarantee System Level ESD Performance! t Guarantee System Level ESD Performance!

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CMOS Technology Roadmap CMOS Technology Roadmap

Feature Size (µm) Junction Depth (µm) Oxide Thickness (A) 3 2 1.5 1.0 0.8 0.5 0.35 0.25 0.18 0.8 0.5 0.4 0.35 0.3 0.25 0.2 0.18 0.15 500 400 300 200 150 100 70 50 30

Reliability Concerns

Hot Carrier degradation LDD

ESD degradation

Silicide/ Salicide ESD Process

ptimization

HC Process

ptimization

ESD degradation

Still be major Still be major concern concern

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ESD Event for Systems ESD Event for Systems (System Level) (System Level)

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2007. Dec.

System System-

Level ESD Testing Standard

Level ESD Testing Standard

♦ ♦ IEC 61000 IEC 61000-

4

4-

2

2: Electromagnetic Compatibility (EMC) : Electromagnetic Compatibility (EMC) Part 4: Testing and measurement techniques Part 4: Testing and measurement techniques Session 2: Electrostatic discharge immunity Test. Session 2: Electrostatic discharge immunity Test.

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Air discharge Air discharge head head Contact discharge Contact discharge head head

System System-

Level ESD Gun (IEC/EN 61000

Level ESD Gun (IEC/EN 61000-

4

4-

2)

2)

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♦ ♦Test Set Test Set-

up

up

Electronics System Electronics System-

Level ESD Test Set

Level ESD Test Set-

up

up

System is alive System is alive to be tested! to be tested!

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System System-

Level ESD Waveform

Level ESD Waveform

♦ ♦ Shortage Discharging Current Waveform Shortage Discharging Current Waveform

2Aτ 1/πτ 1/πtr 頻率

Wide Freq. Band

(10MHz) (320MHz) (1.8μA/MHz)

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♦ ♦IEC 61000 IEC 61000-

4

4-

2 Test Levels

2 Test Levels

Electronics System Electronics System-

Level ESD Test Levels

Level ESD Test Levels

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Bad Contact Bad Contact Hole Hole

Current will automatically find Current will automatically find the lowest impedance path. the lowest impedance path. The electromagnetic The electromagnetic field generated by ESD field generated by ESD

The Affection of ESD on the System Operation The Affection of ESD on the System Operation

5 10 15 1 2 3 4 電場 kV/m 磁場 A/m 5 10 15 時間 ns 10 cm 20 cm 50 cm 5 10 15 1 2 3 4 電場 kV/m 磁場 A/m 5 10 15 時間 ns 10 cm 20 cm 50 cm

The electromagnetic field The electromagnetic field generated by ESD generated by ESD

Shell Shell

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Electronics System Electronics System-

Level ESD Test Criteria

Level ESD Test Criteria

Class Criterion Result Class A No abnormal phenomenon

ccurs during ESD stress。

Pass Class B Abnormal phenomenon

ccurs during ESD stress, but

will recover automatically 。 Pass Class C Abnormal phenomenon

ccurs after ESD stress,

manual restart is needed 。 Pass/ Fail Class D Hardware damage。 Fail

More popular More popular Criterion for High Criterion for High Quality Products! Quality Products!

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Where has to be tested and How is the test Level? Where has to be tested and How is the test Level? ♦Test points：All contactable points. ♦Test Level： Shell：contact 8kV。 I/O ports： Should be also 8kV。

Why: Why: Although the data pins in the I/O Although the data pins in the I/O ports can not be touched by hands, ports can not be touched by hands, But the 8kV ESD event can stress But the 8kV ESD event can stress the data pins via the data pins via Cable Discharge Cable Discharge method. method.

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Class 1 equipment (2

Class 1 equipment (2 kv kv test level) should test level) should: :

Not be in a low humidity environment

Not be in a low humidity environment

be protected by Anti

be protected by Anti-

static Material

static Material

Class 2 equipment (4

Class 2 equipment (4 kv kv test level) should : test level) should :

be protected by Anti

be protected by Anti-

static Material

static Material

Class 3 equipment (8

Class 3 equipment (8 kv kv test level) should : test level) should :

be in a low humidity environment

be in a low humidity environment

Class 4 equipment (15

Class 4 equipment (15 kv kv test level) should : test level) should :

Not to worry (too much)

Not to worry (too much)

The informal Classification of ESD Performances The informal Classification of ESD Performances

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Cable Discharging Event Cable Discharging Event (CDE) (CDE) (New Focused Event) (New Focused Event)

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Cable Discharge Event Cable Discharge Event

♦Tribocharging (surface charges) Cable frictionizes with floor. ♦Tribocharging (space charges) Cable carries high voltage signal. ♦Tribocharging (space charges) Cable is placed in electric field ♦Induced voltages If a cable is subjected by the field of a strong pulse (e.g., a lightning stroke, ESD close to the cable) a momentary voltage will be introduced along the cable.

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Direct Pin Injection Contact

Direct Pin Injection Contact Discharge Test Discharge Test is necessary for is necessary for evaluating evaluating the immunity to Cable the immunity to Cable Discharge Event Discharge Event! !

IEEE 802.3 Cable Discharge Ad IEEE 802.3 Cable Discharge Ad-

Hoc

Hoc

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Direct Pin Injection Contact Discharge Test Direct Pin Injection Contact Discharge Test

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The References for Cable Discharge Events The References for Cable Discharge Events

1. 1.

K. Chatty, P. Cottrell, R. Gauthier, M. Muhammad, F.
K. Chatty, P. Cottrell, R. Gauthier, M. Muhammad, F. Stellari

Stellari, A. , A. Weger Weger, P. Song, and M. McManus, , P. Song, and M. McManus, “ “Model Model-

based guidelines to suppress cable discharge event (CDE) induced

based guidelines to suppress cable discharge event (CDE) induced Latchup Latchup in CMOS ICs, in CMOS ICs,” ” in Proc. IEEE International Reliability Physics in Proc. IEEE International Reliability Physics Symp Symp., 2004, pp.130 ., 2004, pp.130-

134.

134. 2. 2.

R. Brooks,
R. Brooks, “

“A simple model for a cable discharge event, A simple model for a cable discharge event,” ” IEEE 802.3 Cable Discharge Ad IEEE 802.3 Cable Discharge Ad-

hoc,

hoc, March 2001. March 2001. (http://www.ieee802.org/3/ad_hoc/copperdis/public/docs/cable_discharge_model1.pdf). 3. 3. J.

J. Deatherage

Deatherage and D. Jones, and D. Jones, “ “Multiple factors trigger cable discharge events in Multiple factors trigger cable discharge events in ethernet ethernet LANs, LANs,” ” Electronic Design, vol. 48, no. 25, pp. 111 Electronic Design, vol. 48, no. 25, pp. 111-

116, Dec., 2000. (http://

116, Dec., 2000. (http://www.elecdesign www.elecdesign. . com/Articles/ArticleID/4991/4991.html). com/Articles/ArticleID/4991/4991.html). 4. 4. Intel Corporation, Intel Corporation, “ “Cable discharge event in local area network environment, Cable discharge event in local area network environment,” ” White Paper, Order White Paper, Order No: 249812 No: 249812-

001, July 2001.

001, July 2001. 5. 5. “ “Cabling ESD Study, Cabling ESD Study,” ” IEEE 802.3 Cable Discharge Ad IEEE 802.3 Cable Discharge Ad-

hoc, March 2001. (http://www.

hoc, March 2001. (http://www. ieee802.org/3/ad_hoc/copperdis/ public/docs/ ieee802.org/3/ad_hoc/copperdis/ public/docs/index.html index.html). ). 6. 6. Telecommunications Industry Association (TIA), Category 6 Cablin Telecommunications Industry Association (TIA), Category 6 Cabling: Static Discharge Between g: Static Discharge Between LAN Cabling and Data Terminal Equipment, Category 6 Consortium, LAN Cabling and Data Terminal Equipment, Category 6 Consortium, Dec. 2002.

Dec. 2002.

7. 7. H.

H. Geski

Geski, , “ “DVI compliant ESD protection to IEC 61000 DVI compliant ESD protection to IEC 61000-

4 2 level d Standard,

4 2 level d Standard,” ” in Conformity, Sept. in Conformity, Sept. 2004, pp. 12 2004, pp. 12-

17.

17. 8. 8. T. T.-

H. Lai and M.
H. Lai and M.-
D.
D. Ker

Ker, , “ “Method to evaluate cable discharge event (CDE) reliability of in Method to evaluate cable discharge event (CDE) reliability of integrated tegrated circuits in CMOS technology, circuits in CMOS technology,” ” in Proc. of IEEE International Symposium on Quality Electronic in Proc. of IEEE International Symposium on Quality Electronic Design, 2006, pp. 597 Design, 2006, pp. 597-

602.

602. 9. 9. M. M.-

D.
D. Ker

Ker and T. and T.-

H. Lai,
H. Lai, “

“Dependence of layout parameters on CDE (cable discharge event) Dependence of layout parameters on CDE (cable discharge event) robustness of CMOS devices in a 0.25 robustness of CMOS devices in a 0.25-

mm

mm salicided salicided CMOS process, CMOS process,” ” in Proc. of IEEE International in Proc. of IEEE International Reliability Physics Reliability Physics Symp Symp., 2006, pp.633 ., 2006, pp.633-

634.

634.

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Two Field Return Cases Two Field Return Cases

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Chip IO

C=0.1uF R=75 ohm

PCB signal connector

damaged Hot plug on/off, chip IO diode damaged Chip passed HBM 2kV, Chip passed HBM 2kV, MM 200V test MM 200V test

A Field Return Case A Field Return Case

This case tells two things: This case tells two things: 1.

1. Component level performance can

Component level performance can’ ’t guarantee System level performance. t guarantee System level performance. 2.

2. Cable Discharge Event exists practically.

Cable Discharge Event exists practically.

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Chip IO

C=0.1uF R=75 ohm

PCB signal connector

damaged Hot plug on/off, chip IO diode damaged Chip passed HBM 2kV, Chip passed HBM 2kV, MM 200V test MM 200V test

System Level ESD Protector Is Necessary System Level ESD Protector Is Necessary

System Level ESD Protector System Level ESD Protector should be placed at here! should be placed at here!

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Another Field Return Case Another Field Return Case

Chip passed

Chip passed Latchup Latchup test, but test, but Latchup Latchup still happened after still happened after System Level ESD test System Level ESD test. So called . So called Transient Transient Latchup Latchup Issue Issue. .

SCR path stays at ON. SCR path stays at ON.

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System Level ESD Protector Is Necessary System Level ESD Protector Is Necessary

IC IC

ESD Protector ESD Protector

VDD VDD GND GND PCB PCB

Transient Voltage passes to VDD trace on PCB Transient Voltage passes to VDD trace on PCB

Necessary! Necessary!

Shell Shell

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Two Regions on a System Need ESD Protectors Two Regions on a System Need ESD Protectors I/O ports I/O ports Critical Critical Power/Control/Signal Power/Control/Signal Lines Lines

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EFT Event for Systems EFT Event for Systems (System Level) (System Level)

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♦ ♦ Electrical Fast Transients (EFT) occur as a result of arcing con Electrical Fast Transients (EFT) occur as a result of arcing contacts in tacts in switched and relays. switched and relays. ♦ ♦ EFT disturbances are common in industrial environments where EFT disturbances are common in industrial environments where electromechanical switches are used to connect and disconnect electromechanical switches are used to connect and disconnect inductive loads inductive loads. . ♦ ♦ IEC 61000 IEC 61000-

4

4-

4

4 specifies the EFT threat in both specifies the EFT threat in both power power and and I/O data lines I/O data lines. .

♦ ♦EFT Burst EFT Burst EFT Event EFT Event

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EFT COUPLING CLAMP EFT COUPLING CLAMP

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♦ ♦Level Level-

1 : In Well Protected Environment

1 : In Well Protected Environment ♦ ♦Level Level-

2 : In Protected Environment

2 : In Protected Environment ♦ ♦Level Level-

3 : In Typical Industrial Environment

3 : In Typical Industrial Environment ♦ ♦Level Level-

4 : In Severe Industrial Environment

4 : In Severe Industrial Environment

♦ ♦ Like ESD, EFT can be fatal Like ESD, EFT can be fatal

n data and I/O lines.
n data and I/O lines.

♦ ♦ Protectors are needed. Protectors are needed.

IEC 61000 IEC 61000-

4

4-

4 EFT Severity Level

4 EFT Severity Level

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Class Criterion Result Class A No abnormal phenomenon occurs during EFT stress。 Pass Class B Abnormal phenomenon occurs during EFT stress, but will recover automatically 。 Pass Class C Abnormal phenomenon occurs after EFT stress, manual restart is needed 。 Fail Class D Hardware damage。 Fail EFT Test Criteria EFT Test Criteria

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Surge Event for Systems Surge Event for Systems (System Level) (System Level)

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Voltage Pulse Voltage Pulse so called 1.2/50us waveform so called 1.2/50us waveform Current Pulse Current Pulse so called 8/20us waveform so called 8/20us waveform

♦ ♦ IEC 61000 IEC 61000-

4

4-

5

5 addresses addresses the most severe transient conditions the most severe transient conditions on both

n both

power and data lines. power and data lines. ♦ ♦ These are transient caused by These are transient caused by lightning strikes lightning strikes and and switching. switching. ♦ ♦ Switching transients Switching transients may be the result of power switching, load changes may be the result of power switching, load changes in power distribution systems, or short circuit fault conditions in power distribution systems, or short circuit fault conditions. . ♦ ♦ Lightning transients Lightning transients may result from a direct strike or induced voltages may result from a direct strike or induced voltages and current due to an indirect strike. and current due to an indirect strike.

Surge Event Surge Event

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2007. Dec.
2007. Dec.

IEC 61000 IEC 61000-

4

4-

5 Surge Severity Level

5 Surge Severity Level

Class

Power Supply Unbalanced Lines (Long Distance Bus) Balanced Lines Data Bus (Short Distance Bus) Coupling Mode Coupling Mode Coupling Mode Coupling Mode Line to Line (Zs=2Ω) Line to Earth (Zs=12 Ω) Line to Line (Zs=42 Ω) Line to Earth (Zs=42 Ω) Line to Earth (Zs=42 Ω) Line to Earth (Zs=42 Ω)

Current (A) NA NA NA NA NA NA 1 Current (A) NA 42 NA 12 12 NA 2 Current (A) 250 84 12 24 24 12 3 Current (A) 500 167 24 48 48 NA 4 Current (A) 1000 333 48 96 48 NA 5 Current (A) Note Note 48 96 96 NA Note: Depends on the class of the local power supply system.

0: Well protected environment; 1: Partially protected environmen 0: Well protected environment; 1: Partially protected environment; t; 2: Well separated cables; 3: Cables run in parallel; 2: Well separated cables; 3: Cables run in parallel; 4: Multi 4: Multi-

wire cables for both electronic & electrical circuits;

wire cables for both electronic & electrical circuits; 5: Connection to telecommunications cables and overhead power li 5: Connection to telecommunications cables and overhead power lines nes

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2007. Dec.
2007. Dec.

Class Criterion Result Class A No abnormal phenomenon occurs during Lightning stress。 Pass Class B Abnormal phenomenon occurs during Lightning stress, but will recover automatically 。 Pass Class C Abnormal phenomenon occurs after Lightning stress, manual restart is needed 。 Fail Class D Hardware damage。 Fail Surge Test Criteria Surge Test Criteria

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2007. Dec.
2007. Dec.

One Region on a System Need EFT/Surge Protectors One Region on a System Need EFT/Surge Protectors Power, I/O ports Power, I/O ports

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2007. Dec.
2007. Dec.

The Functions of Transient The Functions of Transient Voltage Suppressor (TVS) Voltage Suppressor (TVS)

(System Level ESD Protection Devices) (System Level ESD Protection Devices)

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2007. Dec.
2007. Dec.

The Function of ESD Protection Device The Function of ESD Protection Device

I/O port of a Product I/O port of a Product ♦ ♦ Prevent the operation of an Electronic Product from the Prevent the operation of an Electronic Product from the disturbance of ESD event. disturbance of ESD event. -

Bypass the ESD current

Bypass the ESD current and and Clamp the voltage at a low value. Clamp the voltage at a low value.

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2007. Dec.
2007. Dec.

The Operation of TVS Device The Operation of TVS Device

Prevent System from Malfunction! Prevent System from Malfunction!

TVS TVS’ ’s s Clamping Voltage Clamping Voltage is the most important parameter. is the most important parameter.

System mal System mal-

function threshold

function threshold

Different Systems have different Different Systems have different “ “system mal system mal-

function threshold

function threshold” ” values. values.

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2007. Dec.
2007. Dec.

How to Evaluate the Protection Performance of TVS Device ? How to Evaluate the Protection Performance of TVS Device ? See See Its Its Clamping Voltage

Clamping Voltage during bypassing the transient

during bypassing the transient ESD current ! ESD current !

Lower Lower Clamping Voltage, Higher Protection Performance !

Clamping Voltage, Higher Protection Performance !

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2007. Dec.
2007. Dec.

TVS TVS’ ’s s Clamping Voltage Clamping Voltage

For ESD event: For ESD event: During TVS is bypassing ESD current, During TVS is bypassing ESD current, its terminal voltage is the ESD Clamping its terminal voltage is the ESD Clamping Voltage Voltage。。 Lower Clamping Voltage means greater Lower Clamping Voltage means greater ESD protection performance. ESD protection performance. For Lightning event: For Lightning event: During TVS is bypassing Lightning current, During TVS is bypassing Lightning current, its terminal voltage is the Lightning its terminal voltage is the Lightning Clamping Voltage Clamping Voltage。。 Lower Clamping Voltage means greater Lower Clamping Voltage means greater Lightning protection performance. Lightning protection performance.

ESD Current waveform ESD Current waveform Lightning Current waveform Lightning Current waveform

High freq. High freq. Low freq. Low freq.

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2007. Dec.
2007. Dec.

How to Measure the Clamping Voltage of TVS Device ? (I) How to Measure the Clamping Voltage of TVS Device ? (I) Not Proper ! Not Proper !

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2007. Dec.
2007. Dec.

How to Measure the Clamping Voltage of TVS Device ? (II) How to Measure the Clamping Voltage of TVS Device ? (II) The Proper The Proper Method: Method: Transmission Transmission Line Pulsing (TLP) Line Pulsing (TLP) System System

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2007. Dec.
2007. Dec.

How to Measure the How to Measure the TVS TVS’ ’s s ESD Clamping Voltage? (III) ESD Clamping Voltage? (III)

TVS TVS’ ’s s ESD Clamping Voltage Only can be measured by using TLP measurem ESD Clamping Voltage Only can be measured by using TLP measurement ent

system. Because ESD is a high freq. noise, measuring this high f
system. Because ESD is a high freq. noise, measuring this high freq waveform

req waveform needs to do the impedance matching needs to do the impedance matching。。

♦ ♦TLP: Transmission Line Pulsing. TLP: Transmission Line Pulsing.

t

DUT

+

V_TLP

I_TLP A B C D E A B C D E V_TLP I_TLP

The Clamping Voltage during Bypassing ESD Current (I_TLP).

30ns~100ns 30ns~100ns （（similar to ESD Gun similar to ESD Gun’ ’s waveform s waveform））

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2007. Dec.
2007. Dec.

An Example of TLP I An Example of TLP I-

V Curve

V Curve

Transmission Line Pulsing (TLP) Measurement Transmission Line Pulsing (TLP) Voltage (V) 2 4 6 8 10 12 14 2 4 6 8 10 12 14 16 18 20

V_pulse 100ns Pulse from a transmission line DUT TLP_I +

TLP_V

I/O to GND

♦ ♦When I When ITLP

TLP =I

=IESD

ESD = 16A (~ESD

= 16A (~ESD 5kV), the 5kV), the TVS TVS’ ’s s ESD clamping ESD clamping voltage V voltage VCL

CL = 12V.

= 12V. ♦ ♦When I When ITLP

TLP =I

=IESD

ESD = 6A (~ESD

= 6A (~ESD 2kV), the 2kV), the TVS TVS’ ’s s ESD clamping ESD clamping voltage V voltage VCL

CL = 8.75V.

= 8.75V.

SLIDE 63

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2007. Dec.
2007. Dec.

Stress condition: Stress condition: I/O vs. GND I/O vs. GND

AZ1015 AZ1015-

04S

04S Sx Sx Cxxx Cxxx S x x x x x x S x x x x x x Pxxxxxx Pxxxxxx

Clamping Voltage Comparison by TLP Measurement Clamping Voltage Comparison by TLP Measurement

TLP: Transmission Line Pulsing TLP: Transmission Line Pulsing

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2007. Dec.
2007. Dec.

Self Recover Errors Self Recover Errors ( X: error happened, V: pass)) ( X: error happened, V: pass)) Parts Parts ± ±600V 600V (contact) (contact) ± ±1kV 1kV (contact) (contact) ± ±2kV 2kV (contact) (contact) ± ±4kV 4kV (contact) (contact) Cxxxx Cxxxx X X

Pxxxxxx

Pxxxxxx X X

Sx

Sx V V V V X X

AZ1015

AZ1015-

04S

04S V V V V V V V V

Contact Discharge @ USB ports of PCB Contact Discharge @ USB ports of PCB Put ESD Protect IC Put ESD Protect IC @ USB Port @ USB Port

(Class (Class-

A)

A)

TLP Clamping Voltage Determines the System ESD Performance TLP Clamping Voltage Determines the System ESD Performance

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2007. Dec.
2007. Dec.

The Clamping Types of TVS Devices The Clamping Types of TVS Devices

Unipolar Unipolar Bipolar Bipolar

gnd

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2007. Dec.
2007. Dec.

TVS TVS’ ’s s Lightning Clamping Voltage Measurement Lightning Clamping Voltage Measurement

GND GND

TVS TVS’ ’s s Lightning (8us/20us) Clamping Voltage can be measured by using Lightning (8us/20us) Clamping Voltage can be measured by using

scilloscope. This is because Lightning pulse (<1MHz) is a low f
scilloscope. This is because Lightning pulse (<1MHz) is a low freq

req noise. noise.

SLIDE 67

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2007. Dec.
2007. Dec.

TVS TVS’ ’s s Peak Pulse Power (to Lightning Waveform, 8/20us) Peak Pulse Power (to Lightning Waveform, 8/20us)

TVS TVS’ ’s s Peak Pulse Power Peak Pulse Power：： P Ppk

pk =

= I Ipp

pp x

x V Vclamp

clamp

I Ipp

pp ：

： the max. lightning Current that TVS can bypass the max. lightning Current that TVS can bypass。。 V Vclamp

clamp ：

： the terminal voltage during TVS is bypassing the max. lightning the terminal voltage during TVS is bypassing the max. lightning Current. Current.

TVS TVS’ ’s s Peak Pulse Power is Not an important parameter. It Peak Pulse Power is Not an important parameter. It easily makes users choose wrong TVS. easily makes users choose wrong TVS.

For example For example：： TVS TVS-

1 :

1 : Ipp Ipp =12 A, =12 A, Vclamp Vclamp = 8V, Power = V*I =96W = 8V, Power = V*I =96W TVS TVS-

2 :

2 : Ipp Ipp = 12A, = 12A, Vclamp Vclamp = 20V, Power = V*I =240W = 20V, Power = V*I =240W Do you think which one has better protection performance? Do you think which one has better protection performance? Answer is the TVS Answer is the TVS-

1, which

1, which Vclamp Vclamp is lower. is lower. If you use Power as your selection criterion, you will choose TV If you use Power as your selection criterion, you will choose TVS S-

2! But,

2! But, its protection performance is poor than that of TVS its protection performance is poor than that of TVS-

1.

1.

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2007. Dec.
2007. Dec.

The TVS Arrays The TVS Arrays

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2007. Dec.
2007. Dec.

The Types of ESD Protection devices The Types of ESD Protection devices

♦ ♦Transient Voltage Suppressors (TVS) Transient Voltage Suppressors (TVS) ♦ ♦Varistor Varistor ♦ ♦Zener Zener diode diode ♦ ♦Diode Diode

♦ ♦ Advantages Advantages Single channel, 2 terminals, easy to use. Single channel, 2 terminals, easy to use. Cheap. Cheap. ♦ ♦ Disadvantages Disadvantages Clamping Voltage is high. Clamping Voltage is high. C load is big, not suitable for high speed C load is big, not suitable for high speed application. application. ♦ ♦The main function of TVS is to absorb high peak power as a surge The main function of TVS is to absorb high peak power as a surge device. device. ♦ ♦It also can be an ESD protector. It also can be an ESD protector.

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2007. Dec.
2007. Dec.

The Types of ESD Protection devices (cont The Types of ESD Protection devices (cont’ ’d) d)

♦ ♦Integrated ESD protection array Integrated ESD protection array

♦ ♦ Advantages Advantages Multiple channels. Multiple channels. Small size. Small size. C load could be low, suitable for high C load could be low, suitable for high speed applications. speed applications. ♦ ♦ Disadvantages Disadvantages Cost is a little of higher than TVS. Cost is a little of higher than TVS. Board has to be pre Board has to be pre-

designed for use.

designed for use.

♦ ♦Zener Zener diode array diode array ♦ ♦Regular Diodes array Regular Diodes array ♦ ♦Special designed array Special designed array

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2007. Dec.
2007. Dec.

Application Examples of TVS Diodes Array Application Examples of TVS Diodes Array Varistors Varistors TVS Arrays TVS Arrays TVS Arrays TVS Arrays Diodes Diodes

♦ ♦Save Board Area! Save Board Area! ♦ ♦Save Total System Cost! Save Total System Cost!

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2007. Dec.
2007. Dec.

Varistor TVS Diode TVS Diode Array Response Time Slow Fast Fast Clamp Voltage High Low Low Peak ESD Current High Lower, but Enough Lower, but Enough C_load High Medium Low Heat Sink Good Fare Fare Individual Cost Low Low High System Cost High High Low

Varistor Varistor, TVS Diode, and TVS Diode Array , TVS Diode, and TVS Diode Array

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2007. Dec.
2007. Dec.

I/O GND VDD

High Speed I/O Bus

C_load

I/O GND VDD

ESD Current

Transmission Line Pulsing (TLP) Measurement Transmission Line Pulsing (TLP) Voltage (V) 2 4 6 8 10 12 14 Transmission Line Pulsing (TLP) Current (A) 2 4 6 8 10 12 14 16 18 20 V_pulse 100ns Pulse from a transmission line DUT TLP_I +

TLP_V

I/O to GND

Clamping Voltage Clamping Voltage

♦ ♦C_load C_load should be small : Should not affect the should be small : Should not affect the High Speed Data transmission. High Speed Data transmission. ♦ ♦Clamping Voltage Clamping Voltage should be small : Lower should be small : Lower value can sustain higher ESD level. value can sustain higher ESD level.

I/O GND VDD

ESD Current

The Types of TVS arrays The Types of TVS arrays

♦ ♦Steering Diode Design Steering Diode Design

Connector Keyboard Terminal Printer . . . IC to be protected

VDD data-1 data-2 Control-1 GND 3 1 2

AZ2015-02S

3 1 2

AZ2015-02S

For Low Speed I/O port For Low Speed I/O port For High Speed I/O port For High Speed I/O port

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2007. Dec.
2007. Dec.

正確正確

Wrong Wrong

The Installation considerations of TVS Devices ( The Installation considerations of TVS Devices (Ground Issue Ground Issue) ) OR OR

ESD ESD Shield

Bad! Bad! Good! Good!

♦ ♦TVS solution TVS solution ♦ ♦Mechanical solution Mechanical solution

It costs. It costs.

Chassis Chassis Chassis Chassis Design a discharge path Design a discharge path

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2007. Dec.
2007. Dec.

L1 L1 -

between the connector and the ESD suppressor,

between the connector and the ESD suppressor, smaller is better to reduce smaller is better to reduce the possibility of transient signal coupling to sensitive traces the possibility of transient signal coupling to sensitive traces or power plates!

r power plates!

L2 L2 -

between the ESD suppressor and the I/O pin of the chip ,

between the ESD suppressor and the I/O pin of the chip , bigger is better to bigger is better to reduce the transient voltage amplitude which is seen at IC/ASIC reduce the transient voltage amplitude which is seen at IC/ASIC side! side! L3 L3 -

between the I/O line and the ESD suppressor (stub trace),

between the I/O line and the ESD suppressor (stub trace), smaller is better to smaller is better to let the potential of signal trace be the same as the clamping vo let the potential of signal trace be the same as the clamping voltage of TVS! ltage of TVS!

The Installation considerations of TVS Devices The Installation considerations of TVS Devices ♦ ♦The trace inductance plays a key role. The trace inductance plays a key role.

small small small small large large

VDD or I/O's

IC / ASIC

Signal Ground

TVS Small Small Core Circuit Region

I/O Ports I/O Ports

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2007. Dec.
2007. Dec.

The Application Examples of The Application Examples of TVS Arrays TVS Arrays

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2007. Dec.
2007. Dec.

Computer Systems Computer Systems

CPU North Bridge South Bridge PS2 Print Port DVI VGA HDMI IEEE 1394 10M/100M/ 1G LAN USB 2.0 Audio SATA Card Reader

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2007. Dec.
2007. Dec.

LCD Display Systems LCD Display Systems

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2007. Dec.
2007. Dec.

Portable Systems Portable Systems

LCD Interface LED

Ext. Memory

Card Keypad Serial Port USB/OTG Battery Volumn Adj/ ON/OFF Speaker Mic

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2007. Dec.
2007. Dec.

AZ1015 AZ1015-

04S

04S (SOT23 (SOT23-

6L)

6L)

6 5 4 1 2 3

I/O 1 I/O 2 I/O 3 I/O 4 VDD GND Input Voltage (V) 1 2 3 4 5 Input Capacitance (pF) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Typical Variation of CIN vs. VIN

VDD = 5V, GND = 0V, f = 1MHz, T=25 oC,

Peak pulse Current (A) 4 5 6 7 8 9 10 11 12 13 Clamping Voltage (V) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Clamping Voltage vs. Peak Pulse Current

Waveform Parameters: tr=8μs td=20μs

I/O pin to GND pin Transmission Line Pulsing (TLP) Measurement Transmission Line Pulsing (TLP) Voltage (V) 2 4 6 8 10 12 14 Transmission Line Pulsing (TLP) Current (A) 2 4 6 8 10 12 14 16 18 20

V_pulse 100ns Pulse from a transmission line DUT TLP_I +

TLP_V

I/O to GND

Lowest Value Lowest Value Lowest Value Lowest Value

Can pass 2.0 eye Can pass 2.0 eye For ESD For ESD For Lightning For Lightning

TVS Array Helps USB ports to pass 2~8KV contact Mode Class TVS Array Helps USB ports to pass 2~8KV contact Mode Class-

A Criterion

A Criterion

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2007. Dec.
2007. Dec.

USB Controller

1 2 3 4 5 6 AZ1015-04S

USB Port1 USB Port2 V BUS GND D+ D+ D_ D_ VBUS VBUS GND GND RT RT RT RT CT CT CT CT

1. 1. VDD pin directly short to USB VDD pin directly short to USB’ ’s VBUS s VBUS plate, No trace connection. plate, No trace connection. 2. 2. GND pin directly short to USB GND pin directly short to USB’ ’s GND s GND plate, No trace connection. plate, No trace connection. 3. 3. TVS can NOT be placed at the TVS can NOT be placed at the boundary of different power Plates. boundary of different power Plates. 4. 4. Data trace should be connected to Data trace should be connected to TVS TVS’ ’s s I/O pin first, then connected to I/O pin first, then connected to the controller. the controller.

TVS Array on USB ports TVS Array on USB ports

That That’ ’s ALL! s ALL!

Chip cap.

USBV D1+ D1- GND GND GND

Common Mode Choke

Dual Ports USB Connector

1 3 4

Amazing's 6-pin TVS

6

USBV D2+ D2- GND GND

Common Mode Choke

Use power plate is better

GND

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2007. Dec.
2007. Dec.

Port 1 Port 1 Port 2 Port 2 Port 3 Port 3 Port 4 Port 4 w/o w/o ESD Device ESD Device w/ w/ TVS TVS (AZ1015 (AZ1015-

04S)

04S)

USB 2.0 Eye Diagram Measurement Result USB 2.0 Eye Diagram Measurement Result @ High Speed Operation Mode @ High Speed Operation Mode

TVS Array Helps USB ports to pass 2~8KV contact Mode Class TVS Array Helps USB ports to pass 2~8KV contact Mode Class-

A Criterion

A Criterion

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2007. Dec.
2007. Dec.

Choose Different Choose Different TVS TVS’ ’s s Specs for Different ESD Test Specs. Specs for Different ESD Test Specs. ♦ ♦AZC099 AZC099-

04S

04S ♦ ♦AZC002 AZC002-

04S

04S ♦ ♦AZC015 AZC015-

04S

04S ♦ ♦AZ1015 AZ1015-

04S

04S ♦ ♦AZ1045 AZ1045-

04S

04S

6 5 4 1 2 3

I/O 1 I/O 2 I/O 3 I/O 4 VDD GND

SOT23-6L Higher ESD spec. Higher ESD spec. & Higher Criterion & Higher Criterion Lower Price Lower Price

Simple ESD Design Flow: Simple ESD Design Flow: Pick & Place! Pick & Place!

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2007. Dec.
2007. Dec.

1 15 5

1 2 3 4 5 6 AZ1015-04S

VDD VDD GND GND

Red Green Blue DDC DA T DDC CLK H-Sync V-Sync

11

1 2 3 4 5 6 AZ1015-04S

♦ ♦AZC099 AZC099-

04S

04S ♦ ♦AZC002 AZC002-

04S

04S ♦ ♦AZC015 AZC015-

04S

04S ♦ ♦AZ1015 AZ1015-

04S

04S ♦ ♦AZ1045 AZ1045-

04S

04S

Higher ESD spec. Higher ESD spec. & Higher Criterion. & Higher Criterion. Lower Price Lower Price

TVS Arrays on VGA port TVS Arrays on VGA port (for 3kV ~ 8kV contact ESD)

(for 3kV ~ 8kV contact ESD)

Red Green Blue VSYNC HSYNC DDC_Data DDC_CLK DIG_GND Red_GND Green_GND Blue_GND VCC

6 5

1

2 4 3

VCC

Blue Red Green

GND

6 5

1

2 4 3

VCC

DDC_Data VSYNC HSYNC DDC_CLK Video Filter

75Ω Red

Video Filter

75Ω Green

Video Filter

75Ω Blue

FB

VSYNC

FB

HSYNC

FB

DDC_Data

FB

DDC_CLK

Signals From Scaler

15-pin VGA connector VCC

* optional 0.1uF or 0.01uF chip capacitor for filtering high-frequency ESD noise

VCC

Pick & Pick & Place! Place!

TVS arrays TVS arrays

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2007. Dec.
2007. Dec.

TVS Arrays on DVI port TVS Arrays on DVI port (for 3kV ~ 8kV contact ESD)

(for 3kV ~ 8kV contact ESD)

TMDS_D2- DDC_CLK DDC_Data Detect VCC

VCC

GND

FB Detect FB DDC_Data FB DDC_CLK

Signals From Scaler

DVI_D connector VCC * optional 0.1uF or 0.01uF chip capacitor for filtering high-frequency ESD noise

TMDS_D2+ TMDS_D1- TMDS_D1+ TMDS_D0- TMDS_D0+ TMDS_CK- TMDS_CK+

VCC TMDS_CK- TMDS_D0- VCC 6 5 1 2 4 3 VCC Detect DDC_CLK DDC_Data VCC 6 5 1 2 4 3 6 5 1 2 4 3 TMDS_CK+ TMDS_D0+ TMDS_D1- TMDS_D1+ TMDS_D2- TMDS_D2+ 1 2 4 3 TMDS-D2- common mode choke TMDS-D2+ 1 2 4 3 TMDS-D1- common mode choke TMDS-D1+ 1 2 4 3 TMDS-D0- common mode choke TMDS-D1+ 1 2 4 3 TMDS-CK- common mode choke TMDS-CK+ TMDS DATA 2- TMDS DATA 2+ TMDS DATA 1- TMDS DATA 1+ TMDS DATA 0- TMDS DATA 0+ TMDS DATA CLK+ TMDS DATA CLK- DDC DATA DDC CLK Hot Plug Detect +5V Power CKT1 CKT 24 AZC099-04S AZC099-04S AZC099-04S 0.1uF 0.1uF 0.1uF TMDS DATA 2- TMDS DATA 2+ TMDS DATA 1- TMDS DATA 1+ TMDS DATA 0- TMDS DATA 0+ TMDS DATA CLK+ TMDS DATA CLK- DDC DATA DDC CLK Hot Plug Detect +5V Power CKT1 CKT 24 AZC099-04S AZC099-04S AZC099-04S 0.1uF 0.1uF 0.1uF

TVS arrays TVS arrays ♦ ♦AZC099 AZC099-

04S

04S ♦ ♦AZC002 AZC002-

04S

04S ♦ ♦AZC015 AZC015-

04S

04S ♦ ♦AZ1015 AZ1015-

04S

04S ♦ ♦AZ1045 AZ1045-

04S

04S

Higher ESD spec. Higher ESD spec. & Higher Criterion. & Higher Criterion. Lower Price Lower Price

Pick & Pick & Place! Place!

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2007. Dec.
2007. Dec.

HDMI Block Diagram HDMI Block Diagram

♦ ♦ Audio, video and auxiliary data is transmitted across the three Audio, video and auxiliary data is transmitted across the three TMDS data channels. TMDS data channels. ♦ ♦ A TMDS clock is transmitted on the TMDS clock channel and is use A TMDS clock is transmitted on the TMDS clock channel and is used by the receiver as a d by the receiver as a frequency reference for data recovery on the three TMDS data cha frequency reference for data recovery on the three TMDS data channels. nnels. ♦ ♦ The DDC is used by the Source to read the Sink The DDC is used by the Source to read the Sink’ ’s Enhanced Extended Display s Enhanced Extended Display Identification Data (E Identification Data (E-

EDID) in order to discover the Sink

EDID) in order to discover the Sink’ ’s configuration and/or s configuration and/or capabilities. capabilities.

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2007. Dec.
2007. Dec.

Conceptual Schematic for one TMDS differential pair Conceptual Schematic for one TMDS differential pair

♦ ♦ The termination resistance (RT) and the characteristic The termination resistance (RT) and the characteristic impedance of the cable (Z0) impedance of the cable (Z0) must be matched! must be matched!

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2007. Dec.
2007. Dec.

The Problems of Adding TVS on TMDS differential pairs The Problems of Adding TVS on TMDS differential pairs

1 1、、The The C_load C_load of TVS will destroy the impedance match.

f TVS will destroy the impedance match.

2 2、、The termination resistance will induce back drive current. The termination resistance will induce back drive current.

HDMI Source HDMI Sink Power OFF = 0V Power ON = 5V Backdrive Current TVS TVS

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2007. Dec.
2007. Dec.

The Solutions to Make Impedance Match The Solutions to Make Impedance Match

1 1、、Do trace compensation to add inductance. Do trace compensation to add inductance. 2 2、、Make the Make the C_load C_load of TVS to

f TVS to approach 0.5pF

approach 0.5pF, or below. , or below. Such Such C_load C_load will have will have small influence small influence on impedance

n impedance

match.

match. No trace compensation is needed

No trace compensation is needed. .

♦ ♦The trace width may The trace width may become very small if become very small if C C(TVS)

(TVS) is larger than

is larger than 1pF. 1pF.

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90

2007. Dec.
2007. Dec.

TVS Arrays Help HDMI port to pass 8KV contact Mode TVS Arrays Help HDMI port to pass 8KV contact Mode

AZ1045 AZ1045-

04S

04S (SOT23 (SOT23-

6L)

6L)

6 5 4 1 2 3

I/O 1 I/O 2 I/O 3 I/O 4 VDD GND

Voltage (V)

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

Capacitance (pF)

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

I/O I/O-

to

to-

GND

GND

Lowest Value Lowest Value

AZ1045 AZ1045-

04S

04S

0.55pF 0.55pF

Transmission Line Pulsing (TLP) Measurement Transmission Line Pulsing (TLP) Voltage (V) 2 4 6 8 10 12 14 2 4 6 8 10 12 14 16 18

V_pulse 100ns Pulse from a transmission line DUT TLP_I +

TLP_V

I/O to GND

Transmission Line Pulsing (TLP) Measurement Transmission Line Pulsing (TLP) Voltage (V) 1 2 3 4 5 6 7 8 9 10 2 4 6 8 10 12 14 16 18

V_pulse 100ns Pulse from a transmission line DUT TLP_I +

TLP_V

VDD to GND

Power Power-

Rail

Rail I/O I/O-

to

to-

GND

GND Lowest Value Lowest Value Lowest Value Lowest Value

SLIDE 91

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

HOTPLUG_DET

+5V OUT GND DDC_DAT TMDS_D2+ TMDS_GND TMDS_D2- TMDS_D1+ TMDS_GND TMDS_D1- TMDS_D0+ TMDS_GND TMDS_D0- CE_REMOTE N/C DDC_CLK TMDS_CK+ TMDS_GND TMDS_CK- TMDS_D2+ TMDS_D2- TMDS_D1+ TMDS_D1- TMDS_D0+ TMDS_D0- TMDS_CK+ TMDS_CK-

HOTPLUG_DET

DDC_DAT CE_REMOTE DDC_CLK

HDMI Connector

AZC099-04S

3 2 4 5 6 1 Via hole to GND Via hole to GND GND +5V Via hole to +5V C=100nF (optional)

AZ1045-04SU

3 2 4 5 6 1 Via hole to GND Via hole to GND GND +5V Via hole to +5V C=100nF (optional)

AZ1045-04SU

3 2 4 5 6 1 Via hole to GND Via hole to GND GND +5V Via hole to +5V C=100nF (optional)

TVS Arrays on HDMI port (1) TVS Arrays on HDMI port (1)

SLIDE 92

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

NC NC GND NC NC 10 9 8 7 6 Line-1 Line-2 VDD Line-3 Line-4 1 2 3 4 5

Flow through layout style. Flow through layout style.

TMDS_D0+ TMDS_D0- TMDS_CK- TMDS_CK+ C=100nF (optional) TMDS_D2+ TMDS_D2- TMDS_D1- 1 2 3 4 5 10 9 8 7 6

HOTPLUG_DET

+5V IN GND DDC_DAT TMDS_D2+ TMDS_GND TMDS_D2- TMDS_D1+ TMDS_GND TMDS_D1- TMDS_D0+ TMDS_GND TMDS_D0- CE_REMOTE N/C DDC_CLK TMDS_CK+ TMDS_GND TMDS_CK-

HDMI Connector

1 2 3 4 5 10 9 8 7 6 GND +5V TMDS_D1+ C=100nF (optional) GND +5V

HOTPLUG_DET

DDC_DAT CE_REMOTE DDC_CLK AZC099-04S

3 2 4 5 6 1 Via hole to GND Via hole to GND GND VCC Via hole to VCC C=100nF (optional)

AZ1045 AZ1045-

04Q

04Q (MSOP (MSOP-

10L)

10L)

TVS Arrays on HDMI port (2) TVS Arrays on HDMI port (2)

SLIDE 93

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

AZ2015 AZ2015-

01H/01L

01H/01L (SOD523, SOD323) (SOD523, SOD323) AZ2015 AZ2015-

02S

02S (SOT23 (SOT23-

3L)

3L)

AZ2025 AZ2025-

01H (SOD523)

01H (SOD523) AZ2025 AZ2025-

01L(SOD323)

01L(SOD323) AZ2025 AZ2025-

02S

02S (SOT23 (SOT23-

3L)

3L)

TVS Arrays for Low Speed I/O Ports TVS Arrays for Low Speed I/O Ports

3 1 2 GND I/O I/O

2 1

3 1 2

1 2 3 5 4

1 2 3 6 4 5

AZ2015 AZ2015-

04C/04S

04C/04S (SOT353, SOT23 (SOT353, SOT23-

5L)

5L) AZ2015 AZ2015-

05C/05S

05C/05S (SOT363, SOT23 (SOT363, SOT23-

6L)

6L)

(Examples) (Examples)

SLIDE 94

Ryan Hsin-Chin Jiang 姜信欽

94

2007. Dec.
2007. Dec.

Voltage (V)

1 2 3 4 5 6 7 8 9 10 11 12 13 14

Current (A)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 AZ2015-02S I/O vs. G ND AZ2015-02S I/O vs. I/O

TLP pulse width : 100ns Pulse rise/fall time: 1ns/1ns

♦ ♦Excellent Clamping Performance Excellent Clamping Performance @ 8/20us Current @ 8/20us Current Lowest Value Lowest Value is the best choice. is the best choice. @ TLP Current @ TLP Current Lowest Value Lowest Value is the best choice. is the best choice.

♦ ♦ The Lower Clamping Voltage The Lower Clamping Voltage helps systems to pass Higher helps systems to pass Higher ESD level with Class ESD level with Class-

A criteria.

A criteria.

AZ2015 AZ2015-

02S

02S AZ2015 AZ2015-

02S

02S

Choosing Low Clamping Voltage TVS Arrays Choosing Low Clamping Voltage TVS Arrays

SLIDE 95

Ryan Hsin-Chin Jiang 姜信欽

95

2007. Dec.
2007. Dec.

2 1 AUR AUL Shield 2 1 AUR AUL Shield 3 1 2

@ Bidirectional node @ Bidirectional node

Input Output

gnd VBR

VBR

gnd VBR

VBR

gnd VCL

VCL

gnd Normal Operation Transient Voltage

Protected Devices

3 1 2

Audio Port Audio Port Bidirectional Clamping TVS Arrays Bidirectional Clamping TVS Arrays

SLIDE 96

Ryan Hsin-Chin Jiang 姜信欽

96

2007. Dec.
2007. Dec.

Connector Keyboard Terminal Printer . . . IC to be protected

VDD data-1 data-2 Control-1 GND 3 1 2

AZ2015-02S

3 1 2

AZ2015-02S

Connector IC to be protected

I/O 1 I/O 2 I/O 3 I/O 4 GND

1 2 3 5 4 Connector IC to be protected

I/O 1 I/O 2 I/O 3 I/O 4 GND

1 2 3 6 4 5

I/O 5

Chip-A Chip-B Chip-C Low Speed Data Line Low Speed Data Line Control Line Control Line VDD VCC GND AZ2015-02S AZ2015-02S AZ2015-02S

TVS Arrays on Low Speed I/O Ports / Internal Buses TVS Arrays on Low Speed I/O Ports / Internal Buses

Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed I/O port Low Speed Low Speed Internal Buses Internal Buses Low Speed Low Speed Internal Buses Internal Buses

SLIDE 97

Ryan Hsin-Chin Jiang 姜信欽

97

2007. Dec.
2007. Dec.

TVS arrays on TVS arrays on Internal Buses Internal Buses TVS arrays on Low TVS arrays on Low Speed I/O Port Speed I/O Port TVS Arrays on Low Speed I/O Ports / Internal Buses TVS Arrays on Low Speed I/O Ports / Internal Buses

♦ ♦Mobile Phone Application (pass 12kV Air ESD) Mobile Phone Application (pass 12kV Air ESD)

1 2 3 6 4 5

AZ2015 AZ2015-

05C

05C (SOT363) (SOT363)

SLIDE 98

Ryan Hsin-Chin Jiang 姜信欽

98

2007. Dec.
2007. Dec.

TVS Arrays on Critical Internal Buses TVS Arrays on Critical Internal Buses

TVS TVS TVS TVS TVS TVS ♦ ♦LCM Module for Mobile Products (pass 12kV Air ESD) LCM Module for Mobile Products (pass 12kV Air ESD)

AZ2015 AZ2015-

01H

01H (SOD523) (SOD523)

2 1

SLIDE 99

Ryan Hsin-Chin Jiang 姜信欽

99

2007. Dec.
2007. Dec.

♦ ♦ Shielding GND should be Shielding GND should be shorted to Chassis. shorted to Chassis. ♦ ♦ Shielding GND should be shorted Shielding GND should be shorted to Chassis. to Chassis. ♦ ♦ Each GND plate should be short Each GND plate should be short together via together via ferrobead ferrobead and and TVS TVS’ ’s s ♦ ♦ Each power plate should has its Each power plate should has its

wn TVS connected to GND
wn TVS connected to GND

TVS Arrays on Ground Plates Connections TVS Arrays on Ground Plates Connections

SLIDE 100

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

Summary Summary

SLIDE 101

Ryan Hsin-Chin Jiang 姜信欽

101

2007. Dec.
2007. Dec.

Summary Summary

ESD event can not be erased from nature.

ESD event can not be erased from nature.

To reduce the returned fail rate of a electronic product

To reduce the returned fail rate of a electronic product and maintain high quality image, ESD testing spec and maintain high quality image, ESD testing spec should go to more stricter. should go to more stricter.

Using TVS arrays makes the High ESD protection

Using TVS arrays makes the High ESD protection design be Easy and Reusable. design be Easy and Reusable.

Using TVS arrays can save the total cost of the system

Using TVS arrays can save the total cost of the system product. product.

Using TVS solutions have the best flexibility

Using TVS solutions have the best flexibility regarding to the Trade regarding to the Trade-

off between ESD
ff between ESD

Performance and Cost . Performance and Cost .

SLIDE 102

Ryan Hsin-Chin Jiang 姜信欽

102

2007. Dec.
2007. Dec.

Amazing Amazing’ ’s s 2007 2007-

2008

2008 Products Roadmap Products Roadmap

SLIDE 103

Ryan Hsin-Chin Jiang 姜信欽

103

2007. Dec.
2007. Dec.

Amazing Product Families Amazing Product Families

System Level ESD System Level ESD Protectors Protectors (TVS Arrays) (TVS Arrays) System Level System Level EMI Filter Arrays EMI Filter Arrays With ESD With ESD High Speed High Speed Switches Switches With ESD With ESD High Performance High Performance Transceivers Transceivers with ESD with ESD On On-

Chip ESD

Chip ESD Protection IP Protection IP’ ’s s

Amazing Amazing

SLIDE 104

Ryan Hsin-Chin Jiang 姜信欽

104

2007. Dec.
2007. Dec.

Amazing TVS Array Product Families Amazing TVS Array Product Families

TVS Array TVS Array Product Product Families Families Family Family Name Name Functions Functions AZ1 AZ1 High Performance, High Speed, ESD/EFT/Lightning High Performance, High Speed, ESD/EFT/Lightning Protector Protector AZ2 AZ2 High Performance, Low Speed, ESD/EFT/Lightning High Performance, Low Speed, ESD/EFT/Lightning Protector Protector AZC AZC High Speed, ESD Protector High Speed, ESD Protector AZ3 AZ3 Lightning Protector Lightning Protector AZ4 AZ4 High Voltage, ESD/EFT/Lightning Protector High Voltage, ESD/EFT/Lightning Protector AZ5 AZ5 Tiny Package, ESD Protector Tiny Package, ESD Protector

SLIDE 105

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

Family Family Name Name Example Example Description Description AZ1 AZ1 AZ1 AZ101 015 5-

04

04S S AZ1: family name, AZ1: family name, 01: Sub 01: Sub-

family name

family name, , 5: for below 5V 5: for below 5V

perating systems
perating systems,

, 04: 4 I/O channels 04: 4 I/O channels, , S: Package code S: Package code. . AZ2 AZ2 AZ2 AZ201 015 5-

02

02S S AZ2: family name, AZ2: family name, 01: Sub 01: Sub-

family name

family name, , 5: for below 5V 5: for below 5V

perating systems
perating systems,

, 02: 2 I/O channels 02: 2 I/O channels, , S: Package code S: Package code. . AZC AZC AZC AZC002 002-

04

04C C AZC: family name, AZC: family name, 002: Sub 002: Sub-

family name

family name, , 04: 4 I/O 04: 4 I/O channels channels, , C: Package code C: Package code. . AZ3 AZ3 AZ3 AZ301 013 3-

04

04P P AZ3: family name, AZ3: family name, 01: Sub 01: Sub-

family name

family name, , 3: for below 3V 3: for below 3V

perating systems
perating systems,

, 04: 4 I/O channels 04: 4 I/O channels, , P: Package code P: Package code. . AZ4 AZ4 AZ4 AZ40 012 12-

01L

01L AZ4: family name, AZ4: family name, 0: Sub 0: Sub-

family name

family name, , 12: for below 12V 12: for below 12V

perating systems
perating systems,

, 01: 1 I/O channels 01: 1 I/O channels, , L: Package code L: Package code. . AZ5 AZ5 AZ5 AZ501 015 5-

01R

01R AZ5: family name, AZ5: family name, 01: Sub 01: Sub-

family name

family name, , 5: for below 5V 5: for below 5V

perating systems
perating systems,

, 01: 1 I/O channels 01: 1 I/O channels, , R: Package code R: Package code. .

♦ ♦Part Number Naming: Part Number Naming:

Amazing TVS Array Product Families (cont Amazing TVS Array Product Families (cont’ ’d) d)

SLIDE 106

Ryan Hsin-Chin Jiang 姜信欽

106

2007. Dec.
2007. Dec.

Amazing Available TVS Array Product List Amazing Available TVS Array Product List

♦ ♦AZ1: AZ1: AZ1015 AZ1015-

04S

04S AZ1015 AZ1015-

02S

02S AZ1015 AZ1015-

02N

02N AZ1045 AZ1045-

04S

04S AZ1045 AZ1045-

04SU

04SU AZ1045 AZ1045-

04Q

04Q AZ1045 AZ1045-

04QU

04QU AZ1045 AZ1045-

12T

12T AZ1013 AZ1013-

04S

04S AZ1013 AZ1013-

04C

04C AZ1013 AZ1013-

02N

02N ♦ ♦AZ2: AZ2:

AZ2015 AZ2015-

01H

01H AZ2015 AZ2015-

01L

01L AZ2015 AZ2015-

02S

02S AZ2015 AZ2015-

04C

04C AZ2015 AZ2015-

04S

04S AZ2015 AZ2015-

05C

05C AZ2015 AZ2015-

05S

05S AZ2025 AZ2025-

01H

01H AZ2025 AZ2025-

01L

01L AZ2025 AZ2025-

02S

02S AZ2025 AZ2025-

04S

04S AZ2025 AZ2025-

04V

04V AZ2023 AZ2023-

01H

01H AZ2013 AZ2013-

01H

01H AZ2013 AZ2013-

02S

02S AZ2013 AZ2013-

04C

04C AZ2013 AZ2013-

05C

05C

♦ ♦AZC: AZC: AZC015 AZC015-

04S

04S AZC015 AZC015-

04C

04C AZC015 AZC015-

02N

02N AZC002 AZC002-

04S

04S AZC002 AZC002-

02N

02N AZC099 AZC099-

04S

04S AZC013 AZC013-

04S

04S AZC013 AZC013-

04C

04C AZC013 AZC013-

02N

02N ♦ ♦AZ3: AZ3: AZ3013 AZ3013-

04P

04P ♦ ♦AZ4: AZ4: AZ4012 AZ4012-

01L

01L AZ4024 AZ4024-

01L

01L ♦ ♦AZ5: AZ5: AZ5015 AZ5015-

01J

01J AZ5015 AZ5015-

02J

02J AZ5015 AZ5015-

06J

06J AZ5013 AZ5013-

01J

01J AZ5013 AZ5013-

02J

02J AZ5013 AZ5013-

06J

06J AZ5025 AZ5025-

01J

01J AZ5025 AZ5025-

02J

02J

TVS Arrays TVS Arrays

Black: Available Black: Available Green: will be available on end of Green: will be available on end of Q4, 2007 Q4, 2007 Red: will be available on end of Q1, Red: will be available on end of Q1, 2008 2008

SLIDE 107

Ryan Hsin-Chin Jiang 姜信欽

107

2007. Dec.
2007. Dec.

Amazing TVS Array Product Roadmap Amazing TVS Array Product Roadmap

2007 2007 Q1 Q1 2007 2007 Q2 Q2 2007 2007 Q3 Q3 2007 2007 Q4 Q4 2008 2008 Q1 Q1 2008 2008 Q2 Q2 2008 2008 Q3 Q3 2008 2008 Q4 Q4

AZ1 AZ1

For < 5V systems For < 5V systems 3pF,1pF, 0.5pF 3pF,1pF, 0.5pF For < 3.3V systems For < 3.3V systems 3pF, 1pF, 0.5pF 3pF, 1pF, 0.5pF For <5V,3.3V system For <5V,3.3V system 0.2pF 0.2pF

AZ2 AZ2

For < 5V systems For < 5V systems For < 3.3V systems For < 3.3V systems For < 2.5V systems For < 2.5V systems

AZ3 AZ3

20A Surge 20A Surge Protectors Protectors 50A Surge 50A Surge Protectors Protectors 100A Surge 100A Surge Protectors Protectors

AZ4 AZ4

For < 12V, 24V For < 12V, 24V systems systems For < 48V systems For < 48V systems

AZ5 AZ5

For < 5V systems For < 5V systems For <3.3V, 2.5V For <3.3V, 2.5V systems systems

AZC AZC

For < 5V systems For < 5V systems 2pF,1pF, 0.5pF 2pF,1pF, 0.5pF For < 3.3V systems For < 3.3V systems 3pF, 1pF, 0.5pF 3pF, 1pF, 0.5pF For <5V,3.3V system For <5V,3.3V system 0.2pF 0.2pF

SLIDE 108

Ryan Hsin-Chin Jiang 姜信欽

108

2007. Dec.
2007. Dec.

Amazing EMI Array Product Families Amazing EMI Array Product Families

EMI Array EMI Array Product Product Families Families

(w/ ESD (w/ ESD Protection) Protection)

Family Family Name Name Functions Functions AZM AZM-

LCD

LCD EMI filter and ESD protector for LCD interface. EMI filter and ESD protector for LCD interface. AZM AZM-

MMC

MMC EMI filter and ESD protector for Multi EMI filter and ESD protector for Multi-

media card

media card interface. interface. AZM AZM-

SIM

SIM EMI filter and ESD protector for SIM card interface. EMI filter and ESD protector for SIM card interface. AZM AZM-

CON

CON EMI filter and ESD protector for Connector EMI filter and ESD protector for Connector interface. interface. AZM AZM-

USB

USB EMI filter and ESD protector for USB interface. EMI filter and ESD protector for USB interface. AZM AZM-

MIC

MIC EMI filter and ESD protector for Microphone EMI filter and ESD protector for Microphone interface. interface. AZM AZM-

SPK

SPK EMI filter and ESD protector for Speaker interface. EMI filter and ESD protector for Speaker interface. AZM AZM-

AUD

AUD EMI filter and ESD protector for Audio interface. EMI filter and ESD protector for Audio interface.

SLIDE 109

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

Family Name Family Name Example Example Description Description AZM AZM-

LCD

LCD AZM AZM-

LCD

LCD01 01-

10

10B B AZM AZM-

LCD: family name,

LCD: family name, 01: Sub 01: Sub-

family name

family name, , 10: 10: 10 I/O channels 10 I/O channels, , B: Package code B: Package code. . AZM AZM-

MMC

MMC AZM AZM-

MMC

MMC01 01-

06

06B B AZM AZM-

MMC: family name,

MMC: family name, 01: Sub 01: Sub-

family name

family name, , 06: 6 I/O channels 06: 6 I/O channels, , B: Package code B: Package code. . AZM AZM-

SIM

SIM AZM AZM-

SIM

SIM01 01-

03

03B B AZM AZM-

SIM: family name,

SIM: family name, 01: Sub 01: Sub-

family name

family name, , 03: 03: 3 I/O channels 3 I/O channels, , B: Package code B: Package code. . AZM AZM-

CON

CON AZM AZM-

CON

CON01 01-

04

04B B AZM AZM-

CON: family name,

CON: family name, 01: Sub 01: Sub-

family name

family name, , 04: 4 I/O channels 04: 4 I/O channels, , B: Package code B: Package code. . AZM AZM-

USB

USB AZM AZM-

USB

USB01 01-

02

02B B AZM AZM-

USB: family name,

USB: family name, 01: Sub 01: Sub-

family name

family name, , 02: 2 I/O channels 02: 2 I/O channels, , B: Package code B: Package code. . AZM AZM-

MIC

MIC AZM AZM-

MIC

MIC01 01-

02

02B B AZM AZM-

MIC: family name,

MIC: family name, 01: Sub 01: Sub-

family name

family name, , 02: 02: 2 I/O channels 2 I/O channels, , B: Package code B: Package code. . AZM AZM-

SPK

SPK AZM AZM-

SPK

SPK01 01-

02

02B B AZM AZM-

SPK: family name,

SPK: family name, 01: Sub 01: Sub-

family name

family name, , 02: 02: 2 I/O channels 2 I/O channels, , B: Package code B: Package code. . AZM AZM-

AUD

AUD AZM AZM-

AUD

AUD01 01-

02

02B B AZM AZM-

AUD: family name,

AUD: family name, 01: Sub 01: Sub-

family name

family name, , 02: 2 I/O channels 02: 2 I/O channels, , B: Package code B: Package code. .

♦ ♦Part Number Naming: Part Number Naming:

Amazing EMI Array Product Families (cont Amazing EMI Array Product Families (cont’ ’d) d)

SLIDE 110

Ryan Hsin-Chin Jiang 姜信欽

110

2007. Dec.
2007. Dec.

Amazing Developing EMI Array Product List Amazing Developing EMI Array Product List

Black: Available Black: Available Red: Developing Red: Developing

♦ ♦AZM AZM-

LCD:

LCD: AZM AZM-

LCD01

LCD01-

04B

04B AZM AZM-

LCD01

LCD01-

10B

10B ♦ ♦AZM AZM-

MMC :

MMC : AZM AZM-

MMC01

MMC01-

06B

06B ♦ ♦AZM AZM-

SIM:

SIM: AZM AZM-

SIM01

SIM01-

03B

03B ♦ ♦AZM_CON: AZM_CON: AZM AZM-

CON01

CON01-

04B

04B AZM AZM-

CON01

CON01-

06B

06B AZM AZM-

CON01

CON01-

08B

08B AZM AZM-

CON02

CON02-

10B

10B ♦ ♦AZM AZM-

USB:

USB: AZM AZM-

USB01

USB01-

02B

02B ♦ ♦AZM AZM-

MIC:

MIC: AZM AZM-

MIC01

MIC01-

02B

02B

ESD/EMI ESD/EMI

♦ ♦AZM AZM-

SPK:

SPK: AZM AZM-

SPK01

SPK01-

02B

02B ♦ ♦AZM AZM-

AUD:

AUD: AZM AZM-

AUD01

AUD01-

02B

02B

SLIDE 111

Ryan Hsin-Chin Jiang 姜信欽

111

2007. Dec.
2007. Dec.

Amazing EMI Array Product Roadmap Amazing EMI Array Product Roadmap

2007 2007 2008 2008

Q1 Q1 Q2 Q2 Q3 Q3

Q4 Q4 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4

AZM AZM-

LCD01

LCD01-

04B

04B AZM AZM-

LCD01

LCD01-

10B

10B AZM AZM-

MIC01

MIC01-

02B

02B AZM AZM-

SPK01

SPK01-

02B

02B AZM AZM-

AUD01

AUD01-

02B

02B AZM AZM-

USB01

USB01-

02B

02B AZM AZM-

CON01

CON01-

04B

04B AZM AZM-

CON01

CON01-

06B

06B AZM AZM-

CON01

CON01-

08B

08B AZM AZM-

CON02

CON02-

10B

10B AZM AZM-

MMC01

MMC01-

06B

06B AZM AZM-

SIM01

SIM01-

03B

03B AZM AZM-

LCD0X

LCD0X-

YYB

YYB AZM AZM-

MIC0X

MIC0X-

YYB

YYB AZM AZM-

SPK0X

SPK0X-

YYB

YYB AZM AZM-

AUD0X

AUD0X-

YYB

YYB AZM AZM-

USB0X

USB0X-

YYB

YYB AZM AZM-

CON0X

CON0X-

YYB

YYB AZM AZM-

MMC0X

MMC0X-

YYB

YYB AZM AZM-

SIM0X

SIM0X-

YYB

YYB

SLIDE 112

Ryan Hsin-Chin Jiang 姜信欽

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2007. Dec.
2007. Dec.

SOT23 SOT23-

3L

3L (S) (S) SOT23 SOT23-

5L

5L (S) (S) SOT23 SOT23-

6L

6L (S) (S) SOT143 SOT143-

4

4 (N) (N) SC70 SC70-

5L

5L (C) (C) SC70 SC70-

6L

6L (C) (C) SOD323 SOD323 (L) (L)

(l x w x t) (l x w x t) in mm in mm 2.92x1.3x1.0 2.92x1.3x1.0 (l x w x t) (l x w x t) in mm in mm 2.92x1.6x1.1 2.92x1.6x1.1 (l x w x t) (l x w x t) in mm in mm 2.92x1.6x1.1 2.92x1.6x1.1 (l x w x t) (l x w x t) in mm in mm 2.92x1.3x1.0 2.92x1.3x1.0 (l x w x t) (l x w x t) in mm in mm 2.0x1.25x0.95 2.0x1.25x0.95 (l x w x t) (l x w x t) in mm in mm 2.0x1.25x0.95 2.0x1.25x0.95 (l x w x t) (l x w x t) in mm in mm 1.3x1.66x0.9 1.3x1.66x0.9

SOD523 SOD523 (H) (H) MSOP MSOP-

10L

10L (Q) (Q) SOP SOP-

8L

8L (P) (P) TSSOP TSSOP-

38L

38L (T) (T) TSOT25 TSOT25 (V) (V) TSOT26 TSOT26 (V) (V)

QFN1616P6E QFN1616P6E

(F) (F)

(l x w x t) (l x w x t) in mm in mm 0.8x1.2x0.6 0.8x1.2x0.6 (l x w x t) (l x w x t) in mm in mm 3x3x0.87 3x3x0.87 (l x w x t) (l x w x t) in mm in mm 4.9x3.9x1.4 4.9x3.9x1.4 (l x w x t) (l x w x t) in mm in mm 9.7x4.4x0.93 9.7x4.4x0.93 (l x w x t) (l x w x t) in mm in mm 2.9x1.6x0.825 2.9x1.6x0.825 (l x w x t) (l x w x t) in mm in mm 2.9x1.6x0.825 2.9x1.6x0.825 (l x w x t) (l x w x t) in mm in mm 1.6x1.6x0.55 1.6x1.6x0.55

Amazing TVS/EMI Array Available Packages Amazing TVS/EMI Array Available Packages

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2007. Dec.

Amazing TVS/EMI Array Coming Soon Packages Amazing TVS/EMI Array Coming Soon Packages

uDFN6 uDFN6 (M) (M) FBP FBP-

02C

02C (J) (J) FBP FBP-

03B

03B (J) (J) FBP FBP-

06D

06D (J) (J)

(l x w x t) (l x w x t) in mm in mm 1.25x1.0x0.5 1.25x1.0x0.5 (l x w x t) (l x w x t) in mm in mm 1.0x0.6x0.5 1.0x0.6x0.5 (l x w x t) (l x w x t) in mm in mm 1.2x1.2x0.5 1.2x1.2x0.5 (l x w x t) (l x w x t) in mm in mm 1.6x1.4x0.5 1.6x1.4x0.5

CSP CSP-

5B

5B (B) (B) CSP CSP-

8B

8B (B) (B) CSP CSP-

11B

11B (B) (B) CSP CSP-

16B

16B (B) (B) CSP CSP-

20B

20B (B) (B) CSP CSP-

25B

25B (B) (B)

(l x w x t) (l x w x t) in mm in mm 1.07x1.47x0.65 1.07x1.47x0.65 (l x w x t) (l x w x t) in mm in mm 1.42x1.42x0.65 1.42x1.42x0.65 (l x w x t) (l x w x t) in mm in mm 1.42x1.92x0.65 1.42x1.92x0.65 (l x w x t) (l x w x t) in mm in mm 1.92x1.92x0.65 1.92x1.92x0.65 (l x w x t) (l x w x t) in mm in mm 3.82x1.29x0.65 3.82x1.29x0.65 (l x w x t) (l x w x t) in mm in mm 2.64x2.64x0.7 2.64x2.64x0.7

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2007. Dec.
2007. Dec.

Amazing High Speed Switch with ESD Product Families Amazing High Speed Switch with ESD Product Families

High Speed High Speed Switch with Switch with ESD Product ESD Product Families Families Family Family Name Name Functions Functions AZHW2 AZHW2 2 to 1 HDMI Switch with System 2 to 1 HDMI Switch with System-

Level ESD

Level ESD Protection. Protection. AZHW3 AZHW3 3 to 1 HDMI Switch with System 3 to 1 HDMI Switch with System-

Level ESD

Level ESD Protection. Protection. AZHW4 AZHW4 2 to 1 Display Port Switch with System 2 to 1 Display Port Switch with System-

Level

Level ESD Protection. ESD Protection. AZHW6 AZHW6 3 to 1 Display Port Switch with System 3 to 1 Display Port Switch with System-

Level

Level ESD Protection. ESD Protection.

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2007. Dec.
2007. Dec.

Amazing High Speed Switch with ESD Product Roadmap Amazing High Speed Switch with ESD Product Roadmap 2007 2007 2008 2008 Q4 Q4 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4

High High Speed Speed Switch Switch with ESD with ESD Product Product Families Families AZHW341 AZHW341 (3 to 1 HDMI 1.1 (3 to 1 HDMI 1.1 Switch) Switch) AZHW351 AZHW351 (3 to 1 HDMI 1.3 Switch) (3 to 1 HDMI 1.3 Switch) AZHW241/251 AZHW241/251 (2 to 1 HDMI 1.1/1.3 Switch) (2 to 1 HDMI 1.1/1.3 Switch) AZHW651 AZHW651 (3 to 1 Display Port Switch) (3 to 1 Display Port Switch) AZHW451 AZHW451 (2 to 1 Display Port switch) (2 to 1 Display Port switch)

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2007. Dec.
2007. Dec.

Amazing Transceiver with ESD Product Families Amazing Transceiver with ESD Product Families

High High Performance Performance Transceiver Transceiver with ESD with ESD Product Product Families Families Family Family Name Name Functions Functions AZRS232 AZRS232 RS232 Transceivers with System RS232 Transceivers with System-

Level ESD

Level ESD Protection. Protection. AZRS422 AZRS422 RS422 Transceivers with System RS422 Transceivers with System-

Level ESD

Level ESD Protection. Protection. AZRS485 AZRS485 RS485 Transceivers with System RS485 Transceivers with System-

Level ESD

Level ESD Protection. Protection.

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2007. Dec.
2007. Dec.

Amazing Transceivers with ESD Product Roadmap Amazing Transceivers with ESD Product Roadmap

2007 2007 2008 2008 Q4 Q4 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 High High Performance Performance Transceiver Transceiver with ESD with ESD Product Product Families Families AZRS2322 AZRS2322 (Dual Ports RS232 (Dual Ports RS232 Transceiver) Transceiver) AZRS4222 AZRS4222 (Dual Ports RS422 (Dual Ports RS422 Transceiver) Transceiver) AZRS4852 AZRS4852 (Dual Ports RS485 (Dual Ports RS485 Transceiver) Transceiver) AZRS232X AZRS232X (X Ports RS232 Transceiver) (X Ports RS232 Transceiver) AZRS422X AZRS422X (X Ports RS422 Transceiver) (X Ports RS422 Transceiver) AZRS485X AZRS485X (X Ports RS485 Transceiver) (X Ports RS485 Transceiver)

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2007. Dec.
2007. Dec.

Amazing On Amazing On-

Chip ESD Protection IP List

Chip ESD Protection IP List

Title Title 1 1 ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND LAYOUT THEREOF ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND LAYOUT THEREOF 2 2 MIXED MIXED-

VOLTAGE I/O BUFFER TO LIMIT HOT

VOLTAGE I/O BUFFER TO LIMIT HOT-

CARRIER DEGRADATION

CARRIER DEGRADATION 3 3 HIGH/LOW VOLTAGE TOLERANT INTERFACE CIRCUIT AND CRYSTAL HIGH/LOW VOLTAGE TOLERANT INTERFACE CIRCUIT AND CRYSTAL OSCILLATOR CIRCUIT OSCILLATOR CIRCUIT 4 4 ESD PROTECTION CIRCUIT WITH ACTIVE TRIGGERING ESD PROTECTION CIRCUIT WITH ACTIVE TRIGGERING 5 5 ESD PROTECTION CIRCUIT FOR IC WITH SEPARATED POWER DOMAINS ESD PROTECTION CIRCUIT FOR IC WITH SEPARATED POWER DOMAINS 6 6 POWER POWER-

RAIL ESD PROTECTION CIRCUIT WITH ULTRA LOW GATE LEAKAGE

RAIL ESD PROTECTION CIRCUIT WITH ULTRA LOW GATE LEAKAGE 7 7 HIGH EFFICIENT CHARGE PUMP CIRCUIT WITH BIPOLAR OUTPUT HIGH EFFICIENT CHARGE PUMP CIRCUIT WITH BIPOLAR OUTPUT 8 8 DUAL DUAL-

DIRECTION SILICON CONTROLLED RECTIFIER DEVICE FOR HIGH

DIRECTION SILICON CONTROLLED RECTIFIER DEVICE FOR HIGH-

VOLTAGE

VOLTAGE 9 9 SYMMETRICAL DUAL SYMMETRICAL DUAL-

DIRECTION SILICON CONTROLLED RECTIFIER DEVICE

DIRECTION SILICON CONTROLLED RECTIFIER DEVICE FOR HIGH FOR HIGH-

VOLTAGE ELECTRO

VOLTAGE ELECTRO-

STATIC DISCHARGE PROTECTION

STATIC DISCHARGE PROTECTION 10 10 CELL STRUCTURE FOR OVER CELL STRUCTURE FOR OVER-

VOLTAGE AND OVER

VOLTAGE AND OVER-

CURRENT PROTECTION

CURRENT PROTECTION

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2007. Dec.
2007. Dec.