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9 th International Workshop on Radiation Safety at Synchrotron Radiation Sources The Construction and Development of Safety and Control for Interlock System in TPS Front End Vacuum Group Jyun Yan Chuang 21 Apr. 2016 Nati tional S l


  1. 9 th International Workshop on Radiation Safety at Synchrotron Radiation Sources The Construction and Development of Safety and Control for Interlock System in TPS Front End Vacuum Group Jyun Yan Chuang 21 Apr. 2016 Nati tional S l Synchrotr tron on R Radiati tion on Research C Center

  2. • Introduce to TPS Front end • Hardware construction  Interlock control system  The Real time and FPGA of cRIO Outline • Safety Logic design • Fail safe upgrade of FE interlock • Conclusions 2

  3. Introduce to TPS Front End GV1 MG V Slit 1&2 IP IP IP B C 2 IP 1 3 National Synchrotron Radiation Research Center

  4. The Design of TPS FE Mask Beam Cooling water When miss-steering incident light into the MASK , the highest T=177 0 C , stress=350 MPa 。 (GlidCop 250 0 C , 393MPa) (total power : 12.35Kw) MASK0 Inlet: 37mm(H)x25mm(V) Outlet: 14mm(H)x10mm(V) MASK1 Inlet: 21mm(H)x17mm(V) Outlet: 5mm(H)x5mm(V) 4 Reference from Y. T Cheng

  5. Beam dimensions control by slits Slit 1 aperture measurement 60 50 Aperture size (pixel) 40 30 20 10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Horizontal 51.846.634.727.51.1627.635.747.448.330.923.3 0 23.330.947.448.351.550.739.5 0 39.651.451.5 52 52.351.445.825.645.851.4 Vertical 50.451.348.547.540.647.451.351.351.448.343.5 0 43.548.351.351.447.529.413.3 0 16.429.447.550.752.647.531.929.849.447.5 National Synchrotron Radiation Research Center 5

  6. XBPM measurement in Front end 6 Reference from Y. T Cheng National Synchrotron Radiation Research Center

  7. Front End Control System and the Connection 7 National Synchrotron Radiation Research Center

  8. The Hardware of TPS FE Interlock System EMG loop NI Compact RIO RT Processor 9074  9030 1. Real-time OS 2. Application software NI 9476 NI 9425 3. Networking and 32-channel 32-channel peripheral I/O drivers 500 μs digital output 7 µs sinking digital inputs 4. DMA, interrupt, and bus 6 to 36 V output range, Compatible with 12 and 24 V control drivers sourcing levels FPGA 250 mA/ch maximum current Industry-standard 37-pin D-Sub 1. Application IP drive on all channels connector 2. Control IP Industry-standard 37-pin D- Hot-swappable operation 3. DSP IP 4. Specialized I/O drivers Sub connector Extreme industrial and interface Hot-swappable operation -40 to 70 °C operating range 5. DMA controller -40 to 70 °C operating range 8 National Synchrotron Radiation Research Center

  9. The Software of TPS FE Interlock System 9 National Synchrotron Radiation Research Center

  10. Interlock Control Logics Priority Description of Interlock Logic 10 National Synchrotron Radiation Research Center

  11. Interlock Control Programming State chart Project Variables 11 National Synchrotron Radiation Research Center

  12. Fail safe upgrade of Interlock system HMS redundancy limit switch replacement Controller modification Keep CPU usage below 70%. • Utilized Watch dog • Control System upgrade 12 National Synchrotron Radiation Research Center

  13. Fail safe upgrade of Interlock system 13 National Synchrotron Radiation Research Center

  14. Redundancy PLC and PAC controller setup Transferred all compact RIO I/O node • from Real Time to FPGA. Programmed watch dog monitor • function by RT sub VI. This function enabled to output an alarm signal to FPGA if RT time out. Continue to Program I/O node valid • monitor, CPU loading monitor and failed signal output is wiring. 14 National Synchrotron Radiation Research Center

  15. Network communication ADAM Modbus EPICS server system 15 National Synchrotron Radiation Research Center

  16. Conclusions 1. 6 insertion device beamlines have been available for user operation after safety interlock systems commissioned and reviewed. 2. After fail safe upgraded , a YOKOGAWA FAM3 PLC as a redundancy system which used to monitor NI cRIO 9030 status and enable to switch off TPS FE if cRIO 9030 failed. 3. In order to enhance the stability if FE interlock system, all PPS and MPS logics from RT system to FPGA are changed. 4. All FE interlock system will be upgraded on July 2017. 16 National Synchrotron Radiation Research Center

  17. Acknowledgement Albert Sheng 1. FE high hat load components design & simulation. 2. XBPM design & simulation. 3. Crotch absorber design & simulation 4. The administrator of FE. C. K. Kuan 1. FE components design. 2. Photon beam monitor design. 3. High heat load components design. 4. Beam stability analysis. Y. T. Cheng Y. M. Hsiao Y. Z. Lin 1. FE vacuum 1. FE baking 1. EPICS IOC system system 2. Motor control. 2. XBPM 2. Interlock assembly. maintenance. 17 National Synchrotron Radiation Research Center

  18. Thank you for your attention! Enjoy the Taiwan Culture! 18

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