Synth` ese de syst` emes distribu es ouverts Nathalie Sznajder - - PowerPoint PPT Presentation

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Synth` ese de syst` emes distribu es ouverts Nathalie Sznajder - - PowerPoint PPT Presentation

Synth` ese de syst` emes distribu es ouverts Nathalie Sznajder LSV, ENS Cachan & CNRS & INRIA Saclay IdF 12 Novembre 2009 Nathalie Sznajder PhD defense - November 12th, 2009 , p.1 Introduction Need for formal methods Nathalie


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SLIDE 1

Synth` ese de syst` emes distribu´ es ouverts

Nathalie Sznajder

LSV, ENS Cachan & CNRS & INRIA Saclay IdF

12 Novembre 2009

Nathalie Sznajder PhD defense - November 12th, 2009 , p.1

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SLIDE 2

Introduction

Need for formal methods

Nathalie Sznajder PhD defense - November 12th, 2009 , p.2

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SLIDE 3

Introduction

Need for formal methods

Need for formal tools to check behaviors of critical programs:

◮ Test ◮ Computer-aided proofs ◮ Model-checking

Nathalie Sznajder PhD defense - November 12th, 2009 , p.2

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SLIDE 4

Introduction

Principles of Model-checking

a system a specification

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 5

Introduction

Principles of Model-checking

Does a system satisfy a specification ?

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 6

Introduction

Principles of Model-checking

Does a system satisfy a specification ?

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 7

Introduction

Principles of Model-checking

Does a system satisfy a specification ? model

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 8

Introduction

Principles of Model-checking

Does a system satisfy a specification ? φ formula model

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 9

Introduction

Principles of Model-checking

Does a system satisfy a specification ? φ | =

Model-checking algorithm

formula model

Nathalie Sznajder PhD defense - November 12th, 2009 , p.3

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SLIDE 10

Introduction

Synthesis

a specification

Nathalie Sznajder PhD defense - November 12th, 2009 , p.4

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SLIDE 11

Introduction

Synthesis

Find a system satisfying a specification

Nathalie Sznajder PhD defense - November 12th, 2009 , p.4

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SLIDE 12

Introduction

Synthesis

Find a system satisfying a specification

Nathalie Sznajder PhD defense - November 12th, 2009 , p.4

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SLIDE 13

Introduction

Synthesis

Find a system satisfying a specification φ formula

Nathalie Sznajder PhD defense - November 12th, 2009 , p.4

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SLIDE 14

Introduction

Synthesis

Find a system satisfying a specification φ | = formula model

Nathalie Sznajder PhD defense - November 12th, 2009 , p.4

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SLIDE 15

Introduction

Synthesis of open and reactive systems

inputs from E

  • utputs to E

Open system S

Nathalie Sznajder PhD defense - November 12th, 2009 , p.5

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SLIDE 16

Introduction

Synthesis of open and reactive systems

inputs from E

  • utputs to E

Open system S Specification ϕ

◮ Decide whether there exists a program st. P||E |

= ϕ, ∀E.

◮ Synthesis: If so, compute such a program.

For reasonable systems and specifications, the problems are decid- able.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.5

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SLIDE 17

Introduction

Synthesis of open reactive systems different from satisfiability

Open system Eventually u = 1 u x

Nathalie Sznajder PhD defense - November 12th, 2009 , p.6

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SLIDE 18

Introduction

Synthesis of open reactive systems different from satisfiability

Open system Eventually u = 1 u not controllable! u x

Nathalie Sznajder PhD defense - November 12th, 2009 , p.6

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SLIDE 19

Introduction

Synthesis of open reactive systems different from satisfiability

Open system Eventually u = 1 u not controllable! x = 1 if and only if eventually u = 1 u x

Nathalie Sznajder PhD defense - November 12th, 2009 , p.6

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SLIDE 20

Introduction

Synthesis of open reactive systems different from satisfiability

Open system Eventually u = 1 u not controllable! x = 1 if and only if eventually u = 1 the system cannot foresee what will happen! u x

Nathalie Sznajder PhD defense - November 12th, 2009 , p.6

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SLIDE 21

Introduction

Synthesis of distributed open systems

input of E

  • utput to E

Open distributed system S S1 S2 S3 S4 Specification ϕ

Nathalie Sznajder PhD defense - November 12th, 2009 , p.7

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SLIDE 22

Introduction

Synthesis of distributed open systems

input of E

  • utput to E

Open distributed system S S1 S2 S3 S4 Specification ϕ P1 P2 P3 P4

Two problems

◮ Decide the existence of a distributed program such that the

joint behavior P1||P2||P3||P4||E satisfies ϕ, for all E.

◮ Synthesis: If it exists, compute such a distributed program.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.7

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SLIDE 23

Introduction

Synthesis of distributed systems

Main parameters

◮ Which semantics?

synchronous, asynchronous

◮ What kind of specification? ◮ What kind of memory for the programs?

local memory bounded or unbounded memory

Nathalie Sznajder PhD defense - November 12th, 2009 , p.8

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SLIDE 24

Introduction

Outline

Introduction Synthesis of synchronous distributed systems Model and motivations Uncomparable information Uniformly well connected architectures Well connected architectures Synthesis of asynchronous distributed systems Model Specifications Decidability Results Conclusion

Nathalie Sznajder PhD defense - November 12th, 2009 , p.9

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SLIDE 25

Synthesis of synchronous distributed systems

Outline

Introduction Synthesis of synchronous distributed systems Model and motivations Uncomparable information Uniformly well connected architectures Well connected architectures Synthesis of asynchronous distributed systems Model Specifications Decidability Results Conclusion

Nathalie Sznajder PhD defense - November 12th, 2009 , p.10

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SLIDE 26

Synthesis of synchronous distributed systems

Distributed systems with shared variables

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4

Architecture

◮ (Proc ⊎ V , E) bipartite graph, where

E ⊆ (Proc × V ) ∪ (V × Proc).

◮ VI ⊆ V input values from the environment, and VO ⊆ V

  • utput values from the system, read by the environment.

◮ Sv (finite) domain for each variable v ∈ V . ◮ s0 ∈ SV initial state

where SI =

v∈I Sv for I ⊆ V .

Nathalie Sznajder PhD defense - November 12th, 2009 , p.11

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SLIDE 27

Synthesis of synchronous distributed systems

Distributed systems with shared variables

x0 x0 x1 x2 x3 x4 x5 x4 x5 a1 a2 a3 a4

Architecture

◮ (Proc ⊎ V , E) bipartite graph, where

E ⊆ (Proc × V ) ∪ (V × Proc).

◮ VI ⊆ V input values from the environment, and VO ⊆ V

  • utput values from the system, read by the environment.

◮ Sv (finite) domain for each variable v ∈ V . ◮ s0 ∈ SV initial state

where SI =

v∈I Sv for I ⊆ V .

Nathalie Sznajder PhD defense - November 12th, 2009 , p.11

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SLIDE 28

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4

Parameters

◮ Which semantics?

synchronous behaviors

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 29

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4

Parameters

◮ Which semantics?

synchronous behaviors s0s1s2 · · · where sn ∈ SV are global states.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 30

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4

Parameters

◮ Which semantics?

synchronous behaviors s0s1s2 · · · where sn ∈ SV are global states.

◮ With or without delays?

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 31

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4 x1 x2 x3 x5 a3

Parameters

◮ Which semantics?

synchronous behaviors s0s1s2 · · · where sn ∈ SV are global states.

◮ With or without delays? ◮ What kind of memory for the program?

local memory f p : (SE −1(p))∗ → SE(p) for all p ∈ P.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 32

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4 x0 x4 x5 x1 x2 x3

Parameters

◮ Which semantics?

synchronous behaviors s0s1s2 · · · where sn ∈ SV are global states.

◮ With or without delays? ◮ What kind of memory for the program?

local memory f p : (SE −1(p))∗ → SE(p) for all p ∈ P.

◮ What kind of specification? Temporal logic formulae, total or

external over words/trees over alphabet SV .

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 33

Synthesis of synchronous distributed systems

Synthesis of synchronous distributed systems

x0 x1 x2 x3 x4 x5 a1 a2 a3 a4 x0 x4 x5 x1 x2 x3

Parameters

◮ Which semantics?

synchronous behaviors s0s1s2 · · · where sn ∈ SV are global states.

◮ With or without delays? ◮ What kind of memory for the program?

local memory f p : (SE −1(p))∗ → SE(p) for all p ∈ P.

◮ What kind of specification? Temporal logic formulae, total or

external over words/trees over alphabet SV .

Nathalie Sznajder PhD defense - November 12th, 2009 , p.12

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SLIDE 34

Synthesis of synchronous distributed systems

Synchronous runs

u t v x a1 a2 u1 u2 u3 . . . v1 v2 v3 . . . t1 t2 t3 . . . x1 x2 x3 . . .

◮ 0-delay:

ti = ft(u1 · · · ui) xi = fx((t1, v1) · · · (ti, vi))

◮ 1-delay:

ti = ft(u1 · · · ui−1) xi = fx((t1, v1) · · · (ti−1, vi−1))

Nathalie Sznajder PhD defense - November 12th, 2009 , p.13

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SLIDE 35

Synthesis of synchronous distributed systems

Undecidable and decidable architectures

Pnueli-Rosner (FOCS’90)

Synthesis problem for synchronous distributed systems is undecid- able for LTL or CTL external or total specifications. u y v z a b

Nathalie Sznajder PhD defense - November 12th, 2009 , p.14

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SLIDE 36

Synthesis of synchronous distributed systems

Undecidable and decidable architectures

Pnueli-Rosner (FOCS’90)

Synthesis problem for synchronous distributed systems is undecid- able for LTL or CTL external or total specifications.

Pnueli-Rosner (FOCS’90), Kupferman-Vardi (LICS’01)

Synthesis problem for pipeline architectures is decidable for CTL∗ total specifications. u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.14

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SLIDE 37

Synthesis of synchronous distributed systems

Undecidable and decidable architectures

Pnueli-Rosner (FOCS’90)

Synthesis problem for synchronous distributed systems is undecid- able for LTL or CTL external or total specifications.

Pnueli-Rosner (FOCS’90), Kupferman-Vardi (LICS’01)

Synthesis problem for pipeline architectures is decidable for CTL∗ total specifications. u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

?

Nathalie Sznajder PhD defense - November 12th, 2009 , p.14

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SLIDE 38

Synthesis of synchronous distributed systems

Total specifications: Information fork criterion

Finkbeiner-Schewe (LICS’05)

Synthesis problem is decidable for a given architecture if and only if there is no information fork. u v p x0 x1 a b y0 y1 q w

Nathalie Sznajder PhD defense - November 12th, 2009 , p.15

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SLIDE 39

Synthesis of synchronous distributed systems

Total specifications: Information fork criterion

Finkbeiner-Schewe (LICS’05)

Synthesis problem is decidable for a given architecture if and only if there is no information fork. u v p x0 x1 a b y0 y1 q w

Nathalie Sznajder PhD defense - November 12th, 2009 , p.15

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SLIDE 40

Synthesis of synchronous distributed systems

Back to external specifications

u v y z b c x a

Nathalie Sznajder PhD defense - November 12th, 2009 , p.16

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SLIDE 41

Synthesis of synchronous distributed systems

Back to external specifications

u v y z b c x a

Nathalie Sznajder PhD defense - November 12th, 2009 , p.16

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SLIDE 42

Synthesis of synchronous distributed systems

Back to external specifications

u v y z b c x a

Finkbeiner-Schewe (LICS’05)

Synthesis problem is undecidable over this architecture with LTL total specifications.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.16

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SLIDE 43

Synthesis of synchronous distributed systems

Back to external specifications

u v y z b c x a

Finkbeiner-Schewe (LICS’05)

Synthesis problem is undecidable over this architecture with LTL total specifications.

Pnueli-Rosner (FOCS’90)

Synthesis problem is decidable over this architecture with LTL ex- ternal specifications.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.16

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SLIDE 44

Synthesis of synchronous distributed systems

What if we consider external specifications?

u y v z a b x y1 y2 y3 z1 z2 z3 a1 a2 a3

?

Nathalie Sznajder PhD defense - November 12th, 2009 , p.17

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SLIDE 45

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. u v x y

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 46

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. Otherwise it is said to have linearly preordered information. u v x y u1 x1 u2 x2 u3 x3 u4 x4

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 47

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. Otherwise it is said to have linearly preordered information. u v x y u1 x1 u2 x2 u3 x3 u4 x4

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 48

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. Otherwise it is said to have linearly preordered information. u v x y u1 x1 u2 x2 u3 x3 u4 x4

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 49

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. Otherwise it is said to have linearly preordered information. u v x y u1 x1 u2 x2 u3 x3 u4 x4

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 50

Synthesis of synchronous distributed systems

Architectures with uncomparable information

View of a variable

For an output variable x, View(x) is the set of input variables u such that x is accessible from u.

Uncomparable information (FSTTCS’06)

An architecture has uncomparable information if there exist x,y out- put variables such that View(x) \ View(y) = ∅ and View(y) \ View(x) = ∅. Otherwise it is said to have linearly preordered information. u v x y u1 x1 u2 x2 u3 x3 u4 x4

Nathalie Sznajder PhD defense - November 12th, 2009 , p.18

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SLIDE 51

Synthesis of synchronous distributed systems

Uncomparable information yields undecidability

Theorem (FSTTCS’06,FMSD’09)

Synthesis problem is undecidable for architectures with uncompara- ble information and LTL or CTL external specifications. u v x y

Nathalie Sznajder PhD defense - November 12th, 2009 , p.19

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SLIDE 52

Synthesis of synchronous distributed systems

Uniformly well connected architectures

Definition

An architecture is uniformly well connected (UWC) if there is a unique routing which, for each output variable x, sends variables in View(x) to x. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.20

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SLIDE 53

Synthesis of synchronous distributed systems

Uniformly well connected architectures

Definition

An architecture is uniformly well connected (UWC) if there is a unique routing which, for each output variable x, sends variables in View(x) to x. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.20

slide-54
SLIDE 54

Synthesis of synchronous distributed systems

Uniformly well connected architectures

Definition

An architecture is uniformly well connected (UWC) if there is a unique routing which, for each output variable x, sends variables in View(x) to x. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.20

slide-55
SLIDE 55

Synthesis of synchronous distributed systems

Uniformly well connected architectures

Definition

An architecture is uniformly well connected (UWC) if there is a unique routing which, for each output variable x, sends variables in View(x) to x. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.20

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SLIDE 56

Synthesis of synchronous distributed systems

Uniformly well connected architectures

Definition

An architecture is uniformly well connected (UWC) if there is a unique routing which, for each output variable x, sends variables in View(x) to x. w u v p1 p2 s t u ⊕ v v ⊕ w p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.20

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SLIDE 57

Synthesis of synchronous distributed systems

Decidability results

Proposition

Checking if an architecture is UWC is decidable, in 2-NEXPTIME and NP-hard.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.21

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SLIDE 58

Synthesis of synchronous distributed systems

Decidability results

Proposition

Checking if an architecture is UWC is decidable, in 2-NEXPTIME and NP-hard.

Theorem (FSTTCS’06, FMSD’09)

Synthesis problem is decidable for UWC architectures with linearly preordered information and external specifications (branching or lin- ear time).

Proof idea

Routing is used for memoryless internal strategies.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.21

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SLIDE 59

Synthesis of synchronous distributed systems

Robust specifications

Definition (FSTTCS’06, FMSD’09)

A formula ϕ in CTL∗ is robust if ϕ =

z∈Out ψz where ψz only

depends on View(z) ∪ {z}.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.22

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SLIDE 60

Synthesis of synchronous distributed systems

Robust specifications

Definition (FSTTCS’06, FMSD’09)

A formula ϕ in CTL∗ is robust if ϕ =

z∈Out ψz where ψz only

depends on View(z) ∪ {z}. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.22

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SLIDE 61

Synthesis of synchronous distributed systems

Robust specifications

Definition (FSTTCS’06, FMSD’09)

A formula ϕ in CTL∗ is robust if ϕ =

z∈Out ψz where ψz only

depends on View(z) ∪ {z}. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.22

slide-62
SLIDE 62

Synthesis of synchronous distributed systems

Robust specifications

Definition (FSTTCS’06, FMSD’09)

A formula ϕ in CTL∗ is robust if ϕ =

z∈Out ψz where ψz only

depends on View(z) ∪ {z}. w u v p1 p2 s t p3 p4 p5 y x z

Nathalie Sznajder PhD defense - November 12th, 2009 , p.22

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SLIDE 63

Synthesis of synchronous distributed systems

Robust specifications

Definition (FSTTCS’06,FMSD’09)

A formula ϕ ∈ CTL∗ is robust if ϕ =

z∈Out ψz where ψz only

depends on View(z) ∪ {z}.

Theorem (FSTTCS’06, FMSD’09)

Synthesis problem is decidable for uniformly well connected archi- tectures and external, robust CTL∗ specifications.

Nathalie Sznajder PhD defense - November 12th, 2009 , p.23

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SLIDE 64

Synthesis of synchronous distributed systems

Undecidable and decidable architectures - Total specifications

Information fork u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.24

slide-65
SLIDE 65

Synthesis of synchronous distributed systems

Undecidable and decidable architectures - External specifications

Uncomparable information

?

u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.24

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SLIDE 66

Synthesis of synchronous distributed systems

Undecidable and decidable architectures - External specifications

Uncomparable information Uncomparable information UWC architectures

?

u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.24

slide-67
SLIDE 67

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-68
SLIDE 68

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z1 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-69
SLIDE 69

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z1 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-70
SLIDE 70

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z1 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-71
SLIDE 71

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-72
SLIDE 72

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-73
SLIDE 73

Synthesis of synchronous distributed systems

Well Connected Architectures

Definition

An architecture is well connected if, for each output variable v, the subarchitecture formed by its ‘ancestors’ is UWC.

A well-connected architecture, but not UWC (from Rasala Lehman-Lehman, SODA’04)

u w z1 z2 z3 z4 z2 z3 z4 z12 z13 z14 z23 z24 z34

Nathalie Sznajder PhD defense - November 12th, 2009 , p.25

slide-74
SLIDE 74

Synthesis of synchronous distributed systems

Undecidability for well connected architectures with linearly preordered information

w u v x y z0 q0 p6 p z1 z2 z3 z4 p1 p2 p3 p4 p5 u1 w1 u2 w2 u3 w3 u4 w4 u5 w5 u6 w6

Nathalie Sznajder PhD defense - November 12th, 2009 , p.26

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SLIDE 75

Synthesis of synchronous distributed systems

Undecidability for well connected architectures with linearly preordered information

w u v x y z0 q0 p6 p z1 z2 z3 z4 p1 p2 p3 p4 p5 u1 w1 u2 w2 u3 w3 u4 w4 u5 w5 u6 w6

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slide-76
SLIDE 76

Synthesis of synchronous distributed systems

Undecidability for well connected architectures with linearly preordered information

w u v x y z0 q0 p6 p z1 z2 z3 z4 p1 p2 p3 p4 p5 u1 w1 u2 w2 u3 w3 u4 w4 u5 w5 u6 w6 Process p6 knowing no value of u yields undecidability

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slide-77
SLIDE 77

Synthesis of synchronous distributed systems

Undecidability for well connected architectures with linearly preordered information

w u v x y z0 q0 p6 p z1 z2 z3 z4 p1 p2 p3 p4 p5 u1 w1 u2 w2 u3 w3 u4 w4 u5 w5 u6 w6 Process p6 knowing all values of u yields decidability

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slide-78
SLIDE 78

Synthesis of synchronous distributed systems

Undecidability for well connected architectures with linearly preordered information

w u v x y z0 q0 p6 p z1 z2 z3 z4 p1 p2 p3 p4 p5 u1 w1 u2 w2 u3 w3 u4 w4 u5 w5 u6 w6 Process p6 missing one bit of u yields undecidability

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SLIDE 79

Synthesis of synchronous distributed systems

Undecidable and decidable architectures - External specifications

Uncomparable information Uncomparable information UWC architectures WC architectures

?

u y v z a b x y1 y2 z1 z2 z3 a1 a2 a3

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slide-80
SLIDE 80

Synthesis of synchronous distributed systems

Related work

◮ Total specifications: [Kupferman-Vardi, LICS’01],

[Finkbeiner-Schewe, LICS’05]

◮ External specifications: [Pnueli-Rosner, FOCS’90], [S.,

PhD’09]

◮ Local specifications: [Madhusudan-Thiagarajan, ICALP’01] ◮ Distributed games framework: [Peterson-Reif, FOCS’79],

[Mohalik-Walukiewicz, FSTTCS’03], [Bernet-Janin, FCT’05]

Nathalie Sznajder PhD defense - November 12th, 2009 , p.28

slide-81
SLIDE 81

Synthesis of asynchronous distributed systems

Outline

Introduction Synthesis of synchronous distributed systems Model and motivations Uncomparable information Uniformly well connected architectures Well connected architectures Synthesis of asynchronous distributed systems Model Specifications Decidability Results Conclusion

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slide-82
SLIDE 82

Synthesis of asynchronous distributed systems

Distributed Synthesis

Parameters

◮ Which semantics?

asynchronous executions are partial orders (Mazurkiewicz traces)

◮ What kind of memory for the programs?

local memory

◮ What kind of specification?

external, over partial orders

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SLIDE 83

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

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SLIDE 84

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

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slide-85
SLIDE 85

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

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slide-86
SLIDE 86

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.31

slide-87
SLIDE 87

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.31

slide-88
SLIDE 88

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.31

slide-89
SLIDE 89

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

Drawback: For an action to be played, the two processes have to take the same decision, maybe with different knowledge. 1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.31

slide-90
SLIDE 90

Synthesis of asynchronous distributed systems

Asynchronous semantics : communication through common actions

◮ Rendez-vous: two processes agree on a common action.

Drawback: For an action to be played, the two processes have to take the same decision, maybe with different knowledge.

◮ Signal: asymmetric rendez-vous. A common action is initiated

by only one process. 1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.31

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SLIDE 91

Synthesis of asynchronous distributed systems

Communication by signals

Architectures

◮ Communication graph (Proc, E)

1 2 3

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SLIDE 92

Synthesis of asynchronous distributed systems

Communication by signals

Architectures

◮ Communication graph (Proc, E) ◮ For each process i, sets Ini and Outi of input and output

signals: Γ =

i∈Proc Ini ∪ i∈Proc Outi

1 2 3

Nathalie Sznajder PhD defense - November 12th, 2009 , p.32

slide-93
SLIDE 93

Synthesis of asynchronous distributed systems

Communication by signals

Architectures

◮ Communication graph (Proc, E) ◮ For each process i, sets Ini and Outi of input and output

signals: Γ =

i∈Proc Ini ∪ i∈Proc Outi ◮ For each process i,

Σc

i is the set of signals it can send (control),

Σi is the set of signals it can observe. 1 2 3 1 2 3

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slide-94
SLIDE 94

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory. 1 2 3 f1 : b f2 : c f3 : d

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slide-95
SLIDE 95

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 f1 : b f2 : c f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-96
SLIDE 96

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a f1 : b′ f2 : c f3 : d

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slide-97
SLIDE 97

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a a′ f1 : b′ f2 : c′ f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-98
SLIDE 98

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a a′ a′ f1 : b′ f2 : c f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-99
SLIDE 99

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a a′ a′ b′ f1 : g f2 : h f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-100
SLIDE 100

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a a′ a′ b′ h f1 : g f2 : i f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-101
SLIDE 101

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events.

1 2 3 a a′ a′ b′ h g f1 : j f2 : i f3 : d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-102
SLIDE 102

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events. ◮ A run respects a strategy f = (fi)i∈Proc (is an f -run) if each

event of process i labelled with a controllable action respects the strategy fi. 1 2 3 a a′ a′ b′ h g f1 : j f2 : i f3 : d k

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slide-103
SLIDE 103

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events. ◮ A run respects a strategy f = (fi)i∈Proc (is an f -run) if each

event of process i labelled with a controllable action respects the strategy fi. 1 2 3 a a′ a′ b′ h g f1 : j f2 : i f3 : d d

Nathalie Sznajder PhD defense - November 12th, 2009 , p.33

slide-104
SLIDE 104

Synthesis of asynchronous distributed systems

Programs

◮ Strategies are partial functions fi : Σ∗ i → Σc i with local

memory.

◮ Signal semantics implies reactivity of processes to events. ◮ A run respects a strategy f = (fi)i∈Proc (is an f -run) if each

event of process i labelled with a controllable action respects the strategy fi. 1 2 3 a a′ a′ b′ h g f1 : j f2 : i f3 : d a′′

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SLIDE 105

Synthesis of asynchronous distributed systems

Fairness conditions

req1 req2 grant1 grant2 1 2

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SLIDE 106

Synthesis of asynchronous distributed systems

Fairness conditions

req1 req2 grant1 grant2 1 2 G(req1 → (F grant1)) ∧ G(req2 → (F grant2))

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SLIDE 107

Synthesis of asynchronous distributed systems

Fairness conditions

req1 req2 grant1 grant2 1 2 G(req1 → (F grant1)) ∧ G(req2 → (F grant2)) 1 2

req1 req1 req1 req1 req1 . . . req2 req2 req2 req2 req2 . . .

◮ Some runs are unfair for the processes.

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SLIDE 108

Synthesis of asynchronous distributed systems

Fairness conditions

req1 req2 grant1 grant2 1 2 G(req1 → (F grant1)) ∧ G(req2 → (F grant2)) 1 2

req1 req1 grant1 req1 grant1 . . . req2 req2 req2 req2 req2 . . .

◮ Some runs are unfair for the processes. ◮ Fairness has to be distributed.

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slide-109
SLIDE 109

Synthesis of asynchronous distributed systems

Fairness conditions

req1 req2 grant1 grant2 1 2 G(req1 → (F grant1)) ∧ G(req2 → (F grant2)) 1 2

req1 req1 grant1 req1 grant1 . . . req2 req2 req2 req2 req2 . . .

f1(σ) = grant1 f2(σ) = grant2 UNFAIR

◮ Some runs are unfair for the processes. ◮ Fairness has to be distributed.

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slide-110
SLIDE 110

Synthesis of asynchronous distributed systems

Models of an external specification

Parameters

◮ Which semantics?

asynchronous executions are partial orders (Mazurkiewicz traces)

◮ What kind of memory for the programs?

local memory

◮ What kind of specification?

external, over partial orders

Nathalie Sznajder PhD defense - November 12th, 2009 , p.35

slide-111
SLIDE 111

Synthesis of asynchronous distributed systems

Models of an external specification

Parameters

◮ What kind of specification?

external, over partial orders

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slide-112
SLIDE 112

Synthesis of asynchronous distributed systems

Models of an external specification

Observable runs

Given a run t = (V , λ, ≤), we define the observable run by πΓ(t) = (Γ, λ|Γ, ≤ ∩ (Γ × Γ)) where Γ is the set of external actions.

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SLIDE 113

Synthesis of asynchronous distributed systems

Models of an external specification

Observable runs

Given a run t = (V , λ, ≤), we define the observable run by πΓ(t) = (Γ, λ|Γ, ≤ ∩ (Γ × Γ)) where Γ is the set of external actions. 1 2 3 a a′ a′ b′ h g c d

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slide-114
SLIDE 114

Synthesis of asynchronous distributed systems

Models of an external specification

Observable runs

Given a run t = (V , λ, ≤), we define the observable run by πΓ(t) = (Γ, λ|Γ, ≤ ∩ (Γ × Γ)) where Γ is the set of external actions. 1 2 3 a a′ a′ b′ h g c d a a′ a′ h g d

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slide-115
SLIDE 115

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

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slide-116
SLIDE 116

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 b a c

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slide-117
SLIDE 117

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c b a

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slide-118
SLIDE 118

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c b a

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slide-119
SLIDE 119

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c b a

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slide-120
SLIDE 120

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c b a c

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slide-121
SLIDE 121

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c b a c b a c

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slide-122
SLIDE 122

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c a b c

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slide-123
SLIDE 123

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c a b c a b c

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slide-124
SLIDE 124

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c a b c

Nathalie Sznajder PhD defense - November 12th, 2009 , p.37

slide-125
SLIDE 125

Synthesis of asynchronous distributed systems

Acceptable Specifications

Communication induces order relation

1 2 3 1 2 3 1 2 3 b a c a b c a b c

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slide-126
SLIDE 126

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions

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slide-127
SLIDE 127

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions 1 2 3 b a c

Nathalie Sznajder PhD defense - November 12th, 2009 , p.38

slide-128
SLIDE 128

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions 1 2 3 b a c 1 2 3 b a c 1 2 3 b a c 1 2 3 b a c

Nathalie Sznajder PhD defense - November 12th, 2009 , p.38

slide-129
SLIDE 129

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3

req grant req’ Nathalie Sznajder PhD defense - November 12th, 2009 , p.39

slide-130
SLIDE 130

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

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slide-131
SLIDE 131

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

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slide-132
SLIDE 132

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

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slide-133
SLIDE 133

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

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slide-134
SLIDE 134

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

req grant req’ req grant req’ grant req req’ Nathalie Sznajder PhD defense - November 12th, 2009 , p.39

slide-135
SLIDE 135

Synthesis of asynchronous distributed systems

Acceptable Specifications

Input events are not controllable by processes

1 2 3 1 2 3 1 2 3

req grant req’ req grant req’ grant req req’ Nathalie Sznajder PhD defense - November 12th, 2009 , p.39

slide-136
SLIDE 136

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions

◮ Input events are not controllable: specifications should not

discriminate between a partial order and its “weakenings”

Nathalie Sznajder PhD defense - November 12th, 2009 , p.40

slide-137
SLIDE 137

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions

◮ Input events are not controllable: specifications should not

discriminate between a partial order and its “weakenings” 1 2 3 b a In

Nathalie Sznajder PhD defense - November 12th, 2009 , p.40

slide-138
SLIDE 138

Synthesis of asynchronous distributed systems

Acceptable Specifications

Restrictions on specifications

◮ Communication induces order relation: specifications should

not discriminate between a partial order and its order extensions

◮ Input events are not controllable: specifications should not

discriminate between a partial order and its “weakenings” 1 2 3 b a In 1 2 3 b a In

Nathalie Sznajder PhD defense - November 12th, 2009 , p.40

slide-139
SLIDE 139

Synthesis of asynchronous distributed systems

Fair synthesis problem

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slide-140
SLIDE 140

Synthesis of asynchronous distributed systems

Fair synthesis problem

Given an architecture a specification

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slide-141
SLIDE 141

Synthesis of asynchronous distributed systems

Fair synthesis problem

Given an architecture a specification Decide whether there exists a distributed program such that all its fair runs meet the specification.

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slide-142
SLIDE 142

Synthesis of asynchronous distributed systems

Fair synthesis problem

Given an architecture a specification Decide whether there exists a distributed program such that all its fair runs meet the specification.

Theorem (SOFSEM’09 + PhD)

The fair synthesis problem over singleton architectures is decidable for regular specifications.

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slide-143
SLIDE 143

Synthesis of asynchronous distributed systems

Fair synthesis problem

Given an architecture a specification Decide whether there exists a distributed program such that all its fair runs meet the specification.

Theorem (SOFSEM’09 + PhD)

The fair synthesis problem over singleton architectures is decidable for regular specifications.

Theorem (SOFSEM’09 + PhD)

The fair synthesis problem over strongly connected architectures is decidable for acceptable specifications.

Proof idea

By reduction to the singleton

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slide-144
SLIDE 144

Synthesis of asynchronous distributed systems

Distributing a centralized strategy

Proof

1 2 3 4 1 2 3

◮ We select a cycle. ◮ The processes will use a token to play one at a time and

collect information on what happened in their past

◮ Aim: create a run that will be a weakening of some f -run over

the singleton

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SLIDE 145

Synthesis of asynchronous distributed systems

Token passing

Example

1 2 3 1,2,3

Process 1 has the token at the beginning

1 2 3 t: t′

1:

t′

2:

t′

3: a a c req3 a a (Token,a·a)a c a a c c (Token,a·a·c·c) b a a c c req3 b

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slide-146
SLIDE 146

Synthesis of asynchronous distributed systems

Examples of strongly connected architectures

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slide-147
SLIDE 147

Synthesis of asynchronous distributed systems

Related Work

◮ Causal memory: [Gastin-Lerman-Zeitoun, FSTTCS’04],

[Madhusudan-Thiagarajan-Yang, FSTTCS’05]

◮ Local memory: [Madhusudan-Thiagarajan, CONCUR’02], [S.,

PhD’09]

◮ Distributed games framework: [Mohalik-Walukiewicz,

FSTTCS’03]

Nathalie Sznajder PhD defense - November 12th, 2009 , p.45

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SLIDE 148

Conclusion

Outline

Introduction Synthesis of synchronous distributed systems Model and motivations Uncomparable information Uniformly well connected architectures Well connected architectures Synthesis of asynchronous distributed systems Model Specifications Decidability Results Conclusion

Nathalie Sznajder PhD defense - November 12th, 2009 , p.46

slide-149
SLIDE 149

Conclusion

Summary

Synthesis of synchronous systems

◮ Necessary condition for decidability for external specifications ◮ Exhibition of a new class of architectures for which it becomes

a sufficient condition

◮ New undecidability proof giving new insights

Synthesis of asynchronous systems

◮ Definition of a realistic model for synthesis of asynchronous

systems

◮ Decidability of a class which is undecidable in the synchronous

case

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slide-150
SLIDE 150

Conclusion

Open problems

◮ Synchronous case

◮ Definition of a general decidability criterion for external

specifications in the synchronous case

◮ Asynchronous case

◮ Obtain decidability of the problem on all architectures

◮ Fault-tolerant synthesis

Nathalie Sznajder PhD defense - November 12th, 2009 , p.48

slide-151
SLIDE 151

Conclusion

Thank you for your attention!

Nathalie Sznajder PhD defense - November 12th, 2009 , p.49