Sunrise Electronics Inc. 11/4/2002 11/4/2002 1 1 1 1 - - PowerPoint PPT Presentation

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Sunrise Electronics Inc. 11/4/2002 11/4/2002 1 1 1 1 - - PowerPoint PPT Presentation

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Sunrise Electronics Inc. 11/4/2002 11/4/2002 1 1 1 1 CONFIDENTIAL CONFIDENTIAL Presentation Agenda Corporate Overview Product Capability Advanced Technology Question & Answer 11/4/2002 11/4/2002 2 2 2 2

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CONFIDENTIAL CONFIDENTIAL

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Sunrise Electronics Inc.

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Presentation Agenda

  • Corporate Overview
  • Product Capability
  • Advanced Technology
  • Question & Answer
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Sunrise Value Proposition

  • Velocity to market
  • Service responsiveness
  • Engineering solutions
  • Manage inventory
  • Customer-centric
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Sunrise Mission

“Excel in customer service & velocity”

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Sunrise Vision

“Establish industry benchmark in total customer satisfaction & responsiveness”

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Sunrise Electronics

  • High mix and high service.
  • Engineering & tech solutions.
  • Maximum velocity fabrication.
  • QTA protos and production.
  • IPC 6012 Class 3 compliant.
  • ITAR system registered.
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Overview

  • 30,000 Square feet
  • 32 Associates
  • High reliability multilayers
  • QTA Protos & production
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Sunrise Electronics Inc

  • Since 1996
  • 30,000 Sq Ft Facility
  • Elk Grove, Illinois
  • Ph: 847-357-0500
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Features & Benefits

  • Quotes in 4 hours or less.
  • QTA fabrication in 12 hours to 10 days.
  • Standard lead times from 3 days.
  • Value-added engineering solutions.
  • Enable technology solutions.
  • Lead free laminates & surface finishes.
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Capabilities

  • 1 To 30 layer multilayers
  • BBV’s & Via in pad
  • Via fill options
  • High speed digital & RF
  • 20:1 Aspect ratio
  • IPC Class 3 compliant
  • High Velocity Fabrication
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Advanced Technology

  • BBV’s and Micro Via Technology
  • Sequential Lamination
  • Via in Pad – Epoxy & Silver Fill
  • Back drilling – stub removal
  • High Speed & RF packages
  • Hybrid dielectric packages
  • Thin capacitance layers
  • Metal core fabrication
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Blind & Buried Vias

  • Type I and II uVias.
  • 6 Mil mechanical drills.
  • 10 Mil via pads.
  • 18 Mil via pads standard.
  • 8 Mil standard drills.
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Blind & Buried Vias

  • Wide variety of process

disciplines.

  • Increase routing density.
  • Increase component

density.

  • Enhanced signal integrity.
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Via In Pad

  • Non-conductive epoxy fill

preferred.

  • Reduces inductance.
  • Increases routing density.
  • Increases component

density

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Peters Via Fill DFM

  • Min board thickness

0.010”

  • Max board thickness

0.250”

  • Min drill size

.0098”

  • Max drill size

0.020”

  • Max Aspect Ratio 14:1
  • Post Plating

Micro Via In Pad

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Via in Pad

50% Increased Component Density

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Back drilling

  • Post plating process to define

via stub length.

  • Reduce signal attenuation.
  • Improve impedance matching.
  • Reduce via to via crosstalk.
  • Decrease high speed signal

distortion.

  • Increase channel bandwidth.
  • Blind via’s without the cost.
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Back drilling DFM

  • Back drill DFM Rule
  • BD = PD + 14
  • Clearance DFM Rule
  • CL = BD + 18
  • Z-Axis position +/- .005”
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Thin Dielectric Layers

  • Dielectric electrostatic

capacitance.

  • Reduced noise & EMI.
  • Reduced component cost.
  • Reduced assembly cost.
  • 90% reduced bypass caps.
  • 500 Pico-Farads per in2.
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Dielectric Options

  • FR 406 & FR 408
  • Isola IS 410
  • Isola IS 620
  • Polyclad 370HR
  • Nelco 4000-13
  • Bergquist MP/HT
  • Cu/Al core
  • ITEQ & TUV
  • Ventec VT47
  • Rogers 3000 & 4000

& 5000 & ultralam

  • Taconic
  • Polyimide
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Controlled Impedance

  • Single-ended Structures
  • Micro strip
  • Stripline
  • Dual Stripline / Offset Stripline
  • Edge-coupled Structures / Differential
  • Micro strip
  • Stripline
  • Offset Stripline
  • Broadside Coupled Structures
  • Coplanar Waveguide
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Technology Roadmap

Current Near Term Long Term 2014 2014-2015 2015-2016 Inner Layers (Line/Space) 3/3 mil 2.5/3 mil 2/2 mil Outer Layers (Line/Space) 3/4 mil 3/3 mil 2.5/2.5 mil Mechanical (Drilled Hole/Land) 5.9/12 mil 4/10 mil 3.5/8 mil Laser Drill (Drilled Hole/Land) NA 4/10 mil 4/10 mil Controlled Depth Drilling - Blind Vias Yes Yes Yes Sequential Lamination - Buried Vias Yes Yes Yes Via in Pad Technology - Silver Epoxy Yes Yes Yes Via in Pad Technology - Non Conductive Epoxy Yes Yes Yes Edge Plating Yes Yes Yes High TD - RoHS Yes Yes Yes Halogen Free Yes Yes Yes High Performance Dk=3.0 Df<0.005 Dk<3.0 Df<0.003 Dk<3.0 Df<0.002 Polyimide - High Temp Yes Yes Yes Teflon Yes Yes Yes High Speed RF Signals Yes Yes Yes Drilled Hole/Land 5.9/12 mil 4/10 mil 3.5/8 mil Registration to internal Land +/- 5.0 mil +/- 4.5 mil +/- 4.0 mil Maximum Copper Plating Aspect Ratio 15 : 1.0 18 : 1.0 20 : 1.0 Maximum Layer Count 50 Layer 60 Layer 60+ Layer Maximum Thickness 0.42 0.62 0.9 Maximum Process Panel Size 24" x 30" 24" x 30" 24" x 30" Impedance Single ended & Differential Pair Tolerance +/- 5% +/- 4% +/- 3% Resistors N/A +/- 15% +/- 10% Capacitance/Capacitors 2.0 mil Core 1.0 mil Core Thin Film SMOBC Yes Yes Yes HASL Yes Yes Yes Lead Free HASL Yes Yes Yes Electrolytic Hard Gold Yes Yes Yes Electrolytic Soft Gold Yes Yes Yes Palladium No Yes Yes Nickel Yes Yes Yes Carbon Ink Yes Yes Yes Electroless Ni/Au Yes Yes Yes Immersion Silver Yes Yes Yes Immersion Tin Yes Yes Yes Organic Surface Protection (Entek) Yes Yes Yes ISO 9001/2000 Yes Yes Yes IPC 6012 Class 1,2,3 Yes Yes Yes TL 9000 No Yes Yes Mil-PRF-31032 No No Yes Embedded Passives Surface Finish Quality Standards Materials Through Via Holes Panel / Board Special Processing Category Attribute Fine Line/Space Buried Core Holes

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Thank you!

The Sunrise team is anxious to support you!