Status of the Padova DS electronics Completely redesign NIM modules - PowerPoint PPT Presentation

Nov 18, 2023 •240 likes •297 views

Status of the Padova DS electronics Completely redesign NIM modules Signal conditioning board ADC boards Gain jumpers Offset front panel screw Diff. Input Signal polarity 100 Msps 14 bit Offset SE Input LVDS transmitters

Status of the Padova DS electronics Completely redesign NIM modules Signal conditioning board ADC boards Gain – jumpers Offset – front panel screw Diff. Input Signal polarity 100 Msps 14 bit Offset SE Input LVDS transmitters Collaboration Padova - Milano
Status of the Padova DS electronics Noise measurement without input signal ENOB = 11.5 bit
Status of the Padova DS electronics Rack-mounted PC - 6x64 bit PCI slots - 1 TB Ethernet disk DMA data transfer on the way
Status of the Padova DS electronics Data acquisition and control (Linux) Graphical viewer - Platform independent (Java) On-line monitoring - Server – Client over IP Two-dimensional matrices generation and visualization

Download Presentation

Download Policy: The content available on the website is offered to you 'AS IS' for your personal information and use only. It cannot be commercialized, licensed, or distributed on other websites without prior consent from the author. To download a presentation, simply click this link. If you encounter any difficulties during the download process, it's possible that the publisher has removed the file from their server.

Recommend

Status of the Electronics upgrade for the ICARUS T600 Sandro Centro, Universit di Padova &

Status of the Electronics upgrade for the ICARUS T600 Sandro Centro, Universit di Padova & INFN Directors Progress Review of SBN 15-17 December 2015 Outline T600 Electronics performance New Flange & new Electronics

601 views • 43 slides

MDT Electronics ATLAS "Lite" Electronics Status ASD Lite STATUS 16,000 chips in house

ATLAS Week, Sept 1999 - E. Hazen MDT Electronics ATLAS "Lite" Electronics Status ASD Lite STATUS 16,000 chips in house - 4,400 packaged in TQFP 64 Packaged prototypes tested on chamber - AOK Test station is ready . MEZZANINE Lite

533 views • 5 slides

AGATA: Status AGATA: Status and Perspectives and Perspectives E.Farnea INFN Sezione di Padova,

AGATA: Status AGATA: Status and Perspectives and Perspectives E.Farnea INFN Sezione di Padova, Italy on behalf of the AGATA Collaboration Outline Outline Basic concepts: pulse shape analysis and gamma-ray tracking Gamma-ray

623 views • 48 slides

Digital HCAL Electronics Status of Electronics Production Gary Drake Argonne National Laboratory

Digital HCAL Electronics Status of Electronics Production Gary Drake Argonne National Laboratory CALICE Collaboration Meeting Arlington, TX Mar. 10-12, 2010 RPC DHCAL Collaboration: 36 People, 7 Institutions Argonne National Laboratory

633 views • 26 slides

HCAL Status HCAL Status HCAL Status CMS HCAL Status Jim Freeman Simulation Workshop on CMS

HCAL Status HCAL Status HCAL Status CMS HCAL Status Jim Freeman Simulation Workshop on CMS Calorimetry, Ooty, Feb 18 20, 2002 1 Outline Outline Outline Absorber Optics Status at CERN HPDs Front End Electronics

416 views • 40 slides

Galileo Readout Electronics For the AGATA Upgrade M. Bellato INFN Padova The Target

Galileo Readout Electronics For the AGATA Upgrade M. Bellato INFN Padova The Target Instrument Galileo with a readout that is AGATA 100% compatible Use the new readout as un upgrade to AGATA FEE Exploit state of the art

450 views • 17 slides

Status report of the gravitational wave detector AURIGA J.P. Zendri * For the Auriga Collaboration

Status report of the gravitational wave detector AURIGA J.P. Zendri * For the Auriga Collaboration I.N.F.N. Padova Section, Via Marzolo 8, 35010 Padova, Italy, Zendri@lnl.infn.it Next Auriga run 1. More sensitive readout 2. New cryogenic

200 views • 17 slides

PCI based DDAQ PCI based DDAQ status and perspectives status and perspectives INFN Padova INFN

PCI based DDAQ PCI based DDAQ status and perspectives status and perspectives INFN Padova INFN & University Milano Calin A. Ur Calin A. Ur Installed at LNGS Installed at LNGS ALTERA APEX 20K200EFC484 Main features Main features

491 views • 12 slides

TECO Electronics AS Marine Electronics TECO Electronics AS Teco Electronics AS PORSGRUNN

TECO Electronics AS Marine Electronics TECO Electronics AS Teco Electronics AS PORSGRUNN ROTTERDAM NORWAY SINGAPORE TECO Electronics AS Marine Electronics TECO are able to conduct repairs and maintenance onboard ships while in

547 views • 15 slides

H.E.S.S. II Camera Status Overview Mechanics Electronics Conclusions 1 P.

H.E.S.S. II Camera Status Overview Mechanics Electronics Conclusions 1 P. Nayman H.E.S.S. II Biennale LPNHE Septembre 2007 Overview Camera Mechanics Structure (LLR) Cones (APC) Auto-Focus (LAPP)

1.55k views • 24 slides

Key Experiments Key Experiments and Simulation: and Simulation: Status Report Status Report

Key Experiments Key Experiments and Simulation: and Simulation: Status Report Status Report E.Farnea INFN Sezione di Padova, Italy AGATA Week, Strasbourg, November 24 th , 2005 Outline Outline Performance of the Demonstrator Some

317 views • 19 slides

Open Source Practice of LG Electronics Hyo Jun Im Software Platform Laboratory, LG Electronics

Open Source Practice of LG Electronics Hyo Jun Im Software Platform Laboratory, LG Electronics Introduction to LG Electronics LG Electronics is a global leader and technology innovator in consumer electronics, mobile communications and home

423 views • 31 slides

GERDA GeDDAQ GERDA GeDDAQ Status, operation, integration INFN Padova INFN & University

GERDA GeDDAQ GERDA GeDDAQ Status, operation, integration INFN Padova INFN & University Milano Calin A. Ur The GeDDAQ System The GeDDAQ System Channels 4/module Channels FADC bits 14 FADC rate (MHz) 100 Internal trigger yes Trace

441 views • 17 slides

Status of front end electronics When mezzanine present, JTAG chain is lost ... PROBLEM When

15 October 2018 Cayetano Santos - On behalf of the IN2P3 group APC - Astroparticule et Cosmologie Status of front end electronics When mezzanine present, JTAG chain is lost ... PROBLEM When mezzanine present, FINE uCLinux is lost ... CORRECTED

465 views • 9 slides

ATLAS MDT Electronics Status ASD Chip Design (with Harvard) and Production Full Rad-Hard test

ATLAS MDT Electronics Status ASD Chip Design (with Harvard) and Production Full Rad-Hard test campaign completed Production order for 67,400 parts placed 10/1 Automatic tester designed and prototyped

213 views • 9 slides

Updates on the STRAW front-end electronics STT layout; The readout concept;

Updates on the STRAW front-end electronics STT layout; The readout concept; Electronics developments; Status and perspectives. 1 P.Gianotti for the STT group 28/4/13 Detectors requirements and layout 4636 Straw tubes

882 views • 18 slides

H0K03a : Advanced Process Control Model-based Predictive Control 1 : Introduction Bert Pluymers

H0K03a : Advanced Process Control Model-based Predictive Control 1 : Introduction Bert Pluymers Prof. Bart De Moor Katholieke Universiteit Leuven, Belgium Faculty of Engineering Sciences Department of Electrical Engineering (ESAT) Research Group

2.13k views • 48 slides

Outline Morning program Preliminaries Text matching I Text matching II Afternoon program

Outline Morning program Preliminaries Text matching I Text matching II Afternoon program Learning to rank Modeling user behavior Generating responses Wrap up 8 Outline Morning program Preliminaries Feedforward neural network Back

1.05k views • 43 slides

Phonology and speech applications with weighted automata Natural Language Processing LING/CSCI

Phonology and speech applications with weighted automata Natural Language Processing LING/CSCI 5832 Mans Hulden Dept. of Linguistics mans.hulden@colorado.edu Feb 19 2014 Overview (1) Recap unweighted finite automata and transducers (2)

597 views • 42 slides

Alphabet An alphabet is a set of letters . e.g., { a, b, c, . . . , z } e.g., { , , . . . ,

Alphabet An alphabet is a set of letters . e.g., { a, b, c, . . . , z } e.g., { , , . . . , } e.g., { a, b, c } e.g., { a, b } e.g., { 0 } (unary alphabet) e.g., { 0 , 1 } (binary alphabet) e.g., { N, S, E, W } (compass alphabet) We use the

239 views • 10 slides

Pattern Recognition Part 10: (Artificial) Neural Networks Gerhard Schmidt

Pattern Recognition Part 10: (Artificial) Neural Networks Gerhard Schmidt Christian-Albrechts-Universitt zu Kiel Faculty of Engineering Institute of Electrical and Information Engineering Digital Signal Processing and System Theory Neural

577 views • 54 slides

Reactive Probabilistic Programming Semantics with Mixed Nondeterministic/Probabilistic Automata

Reactive Probabilistic Programming Semantics with Mixed Nondeterministic/Probabilistic Automata Albert Benveniste Jean-Baptiste Raclet INRIA Rennes and IRIT Toulouse September 18, 2020 What is Probabilistic Programming? Bringing the

855 views • 59 slides

Last time Need for synchronization primitives 7: Synchronization Locks and building locks

Last time Need for synchronization primitives 7: Synchronization Locks and building locks from HW primitives Semaphores and building semaphores from Last Modified: locks 10/8/2002 9:37:06 PM -1 -2 Uses of Semaphores Semaphores

410 views • 6 slides

Monitors CoSc 450: Programming Paradigms 07 Monitor Purpose: To consolidate the wait and signal

CoSc 450: Programming Paradigms Chapter 7 Monitors CoSc 450: Programming Paradigms 07 Monitor Purpose: To consolidate the wait and signal operations in a single class. Instead of having semaphores and critical sections spread throughout the

889 views • 87 slides