Status of the Mu3e Detector
Dirk Wiedner, Heidelberg On Behalf of the Mu3e Collaboration
28.02.2017 Dirk Wiedner, on behalf of the Mu3e collaboration 1
Status of the Mu3e Detector Dirk Wiedner, Heidelberg On Behalf of - - PowerPoint PPT Presentation
Status of the Mu3e Detector Dirk Wiedner, Heidelberg On Behalf of the Mu3e Collaboration Dirk Wiedner, on behalf of the Mu3e collaboration 28.02.2017 1 The Mu3e Signal + e + e - e + rare in SM o Branching ratio <10 -54
Dirk Wiedner, Heidelberg On Behalf of the Mu3e Collaboration
28.02.2017 Dirk Wiedner, on behalf of the Mu3e collaboration 1
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→unobservable
Signal properties:
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required
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resolution
(R. M. Djilkibaev, R. V. Konoplich, Phys.Rev. D79 (2009) 073004)
up to 108 μ/s
100 ps
~200 μm
~ 0.5 MeV/c
1‰ X0 per Si-Tracker Layer
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𝝉𝒒~ 𝟐 𝒒 𝒚 𝒀𝟏
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Phase I
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Paul Scherrer Institute Switzerland:
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Paul Scherrer Institute Switzerland:
O(108 µ/s)
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50 ns
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0.1 ns
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Fiber ribbon modules
Scintillating fiber ribbons Talk: “Scintillating Fibre Detector for the Mu3e Experiment”, Simon Corrodi on Monday
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Rendering of Tile Detector station
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2 tiles in a row
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Successful feasibility studies for:
Module mechanics He-cooling with low vibration Ultra-thin flexible circuit boards HV-CMOS small prototypes Readout board prototype
Pixel Tracker Rendering of CAD study
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design (top)
automated bonding
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design (top)
Material Thickness [μm] X/X0 upper Al layer 14 1.57 · 10−4 isolator (PI) 35 1.22 · 10−4 glue 10 0.25 · 10−4 lower Al layer 14 1.57 · 10−4 lower PI shield 10 0.35 · 10−4 total 83 < 5 · 10−4
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by Ivan Perić
particle detector implemented in high- voltage CMOS technology Nucl.Instrum.Meth., 2007, A582, 876
P substrate N well
NMOS PMOS
See talk: “Characterisation of novel prototypes of monolithic HV-CMOS pixel detectors for high energy physics experiments”, Dr. Stefano Terzo on Friday
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by Ivan Perić
particle detector implemented in high- voltage CMOS technology Nucl.Instrum.Meth., 2007, A582, 876
P substrate depletion layer N well
~9μm
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MuPix7
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On Chip:
Eye diagram MuPix7; eye height > 130mV, eye width > 0.65 UI
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X-talk to both sides
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comparator
layout
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X-talk to both sides
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MuPix7 Efficiency
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MuPix7 Efficiency MUPIX7 MuPix7 under angle e+
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registered in MuPix 7 and scintillator
Time Resolution of Pixels
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MuPix8
MuPix7
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Single event sensitivity (SES) and the corresponding 90% and 95% C.L. upper limits versus data taking days for the Mu3e detector
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been performed at the Test Beam Facility at DESY Hamburg (Germany), a member of the Helmholtz Association (HGF)
and our LHCb colleagues, especially Heinrich, Kazu and Martin.
Gutenberg University Mainz for giving us the
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models
Tree level SUSY
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“(Charged) Lepton Flavor Violation”,
188 303–308, 2009.
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staggered layers
254 μm 433 μm
Thickness:
< 1 g of glue / ribbon
700 μm Horizontal gap between fibers ~ 4 μm 250 μm
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Alternative: Square shape fibers
fiber U channel
More R&D to optimize the construction of the ribbons ~ 40 cm 16 mm
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Si-PMs (MPPCs) at both fiber ends SciFi column readout with Si-PM arrays
LHCb type detector
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Si-PMs (MPPCs) at both fiber ends SciFi column readout with Si-PM arrays
Reduced # of readout channels (2 64) Easy, direct coupling Higher occupancy “Optical” cross talk
LHCb type detector
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light travels preferentially in the cladding and exits the fiber at large angles “optical” cross talk between Si-PM columns
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rate
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STiC
2-3 layers of 250 mm square double cladding scint. fibers 128 fibers/layer Single fiber Al coating (minimum “optical” cross-talk)
16 mm 0.8 mm
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Fiber test setup developed at PSI
250 µm square fiber
timing performance Cross talk:
By sputtering 30 nm Al coating on the fiber cross talk < 1% was achieved
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0.5 Nphe threshold σ = 750 ± 17 ps
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column
channel
e- tiles
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station
Tile detector 4 x 4 prototype
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STiC 3.0 STiC 2.0
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STiC 3.0 STiC 2.0
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Prototype Active Area Functionality Bugs Improvements MuPix1 1.77 mm2 Sensor + analog Comparator “ringing” First MuPix prototype MuPix2 1.77 mm2 Sensor + analog Temperature dependence No ringing MuPix3 9.42 mm2 Sensor, analog, dig. bad pixel
First part of dig. readout MuPix4 9,42 mm2 Sensor, analog, dig. Zero time-stamp and row address for 50%
Working digital readout, timestamp, temperature stable MuPix6 10.55 mm2 Sensor, analog, dig. ? Removed zero time-stamp and address bug MuPix7 10.55 mm2 System on Chip X-talk Fast serial readout
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chips
MuPix4 thinned to 50μm
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Heidelberg
MuPix7 @ DESY test-beam in EUDET telescope
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and projections for 2×2 pixel array
enhance the inefficient regions
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temperature
discriminator output
resolution
MUPIX7 High bias currents (1W/cm2) HV -85V
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temperature
discriminator output
resolution
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108 inner sensors 2736 outer sensors ~180 000 000 pixel
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0.11% of X0
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MuPix3 thinned to < 90μm
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Laser-cut flex print prototype
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CAD of Kapton™ frames
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CAD of Kapton™ frames
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Rendering of vertex detector CAD
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Layer 3 Prototype in Assembling Frame with 50 μm Glass
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Pixel detector CAD rendering
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plates
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scattering
volume
400mW/cm2 x 11664cm2 ≈ 4.7 KW
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He cooling 400mW/cm2
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attached to foil
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Front end FPGA 1250 Mbit/s LVDS in x 45 6.4 Gbit/s
Readout board
Pixel Sensor
Front end FPGA
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Readout board 6.4 Gbit/s Optical x48 PC 10 Gbit/s Optical PC Front end FPGA Front end FPGA Front end FPGA PC x12
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Front end FPGA Readout board 6.4 Gbit/s Optical PC 10 Gbit/s Optical PC Front end FPGA Front end FPGA Front end FPGA PC x12
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FPGA
room
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FPGA
room
Pixel Sensor Silicon FPGAs x86 Readout board x4 PC x12
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FPGA
room
Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Silicon FPGAs x86 Fiber FPGAs 12x Tile FPGAs x14 Readout board x4 Readout board x2 Readout board x2 x2844 x192 x196 PC x12 O(Tbit/s)
Tile
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FPGA
room
Pixel Sensor Fiber Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Silicon FPGAs x86 Fiber FPGAs x12 Tile FPGAs x14 Readout board x4 Readout board x2 Readout board x2 PC x12 x128
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FPGA
room
Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Silicon FPGAs x86 Fiber FPGAs x12 Tile FPGAs x14 Readout board x4 Readout board x2 Readout board x2 PC x12 x128 x48 x56 O(Tbit/s)
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FPGA
room
Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Silicon FPGAs x86 Fiber FPGAs x12 Tile FPGAs x14 Readout board x4 Readout board x2 Readout board x2 PC x12 x48 x24 x24 O(Tbit/s)
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GPU computer
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FPGA PCIe board GPU computer Optical mezzanine connectors
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1 3 2 Under discussion
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1 3 2 Under discussion
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1 3 2
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1 3 2
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Sensor and read-out chip in one Deliver zero- suppressed serialized data
suppressed serialized data
system
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Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel Sensor Fiber Tile Pixel MuPix Fiber MuTRiG Tile MuTRiG FE-PCB FE-PCB FE-PCB Readout board Readout board Readout board PCs
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Front-end PCB
and tile detector Data acquisition Clock distribution Slow control distribution
Prototype functional
Q3/2017
(pixel) module to PC
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