Single-Armed Cluster Tools ISysE, KAIST Yuchul Lim and Tae-Eog Lee - - PowerPoint PPT Presentation

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Single-Armed Cluster Tools ISysE, KAIST Yuchul Lim and Tae-Eog Lee - - PowerPoint PPT Presentation

Schedulability Analysis and Cyclic Scheduling of Single-Armed Cluster Tools ISysE, KAIST Yuchul Lim and Tae-Eog Lee Introduction What is cluster tools? Wafer processing modules which are widely used in manufacturing systems.


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SLIDE 1

Schedulability Analysis and Cyclic Scheduling of Single-Armed Cluster Tools

ISysE, KAIST Yuchul Lim and Tae-Eog Lee

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SLIDE 2

Introduction

2

  • What is cluster tools?
  • Wafer processing modules which are widely used in manufacturing systems.
  • Consist of processing modules, a transporting module, and loadlocks.
  • How to wafers in a cluster tools are processed
  • A wafer is unloaded which is pumped to the loadlock from outside.
  • A wafer visits PMs with specified recipe

(generally series-parallel wafer flow pattern)

  • A wafer can be transported only by a robot.

(transporting module)

  • A wafer is loaded into the loadlock and vented.
  • A robot in a tool can be single or dual armed.

<Loadlock> <Loadlock> <PM1> <PM2> <PM2> <PM3> < Singleβˆ’armed Cluster tools with (1,2,1) wafer flow pattern >

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SLIDE 3

Introduction

3

  • Here, we focused on the time-constrained single-armed cluster tools
  • The single-armed robot is equipped in a tool.
  • PMs in a tool have wafer residency time constraints.
  • Schedulability analysis of cluster tools
  • We analyze the schedulability of the backward sequence for cluster tools.
  • The backward sequence is always feasible in a general cluster tool, and guarantees

minimum cycle time.

  • In a general cluster tool, there always exists feasible schedules of the sequence

which has no deadlock by the resources.

  • However, in consideration of the wafer residency time constraints, feasible sequence

in a general cluster tool does not always have feasible schedules.

  • Schedulability of the sequence in a time-constrained cluster tools is equivalent to

the existence of feasible schedules that satisfies all time constraints in the sequence.

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SLIDE 4

4

𝑉𝑀𝑀 𝑀1 𝑉1 𝑀2 𝑉2 𝑀𝐽𝐢

<Petri-net modeling of single-armed cluster tools>

𝑉2 𝑀𝑀𝑀 𝑉1 𝑀2 𝑉𝑀𝑀 𝑀1

<Timed event graph of backward sequence>

Introduction

  • Single-armed cluster tools and Backward sequence
  • We will use timed event graphs(TEG) which is subclass of timed Petri nets.
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SLIDE 5

Research Classification

  • Scheduling Method
  • Generation of the sequences
  • Controlling delay on the backward sequence
  • How we can know that certain sequence is schedulable or not???
  • Process time
  • Deterministic
  • Bounded time variation
  • Residency Time Constraints
  • PM
  • TM
  • Loadlock
  • Controllable TM Task
  • All TM Task
  • Limited Task

5

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SLIDE 6

1) Controlling delays on the backward sequence(deterministic)

  • A. Existing schedulability analysis of the backward sequence
  • B. Schedulability analysis of the backward sequence by joint delay control
  • A. Properties of the schedulability for the backward sequence
  • B. O(n) algorithm for the schedulability analysis

2) Controlling delays on the backward sequence(stochastic)

  • A. Cyclic scheduling with bounded time variation
  • B. Lower bound schedulability analysis

3) Workload balancing by controlling WIP(Work in Process)

Contents

6

1) Controlling delays on the backward sequence(deterministic)

  • A. Existing schedulability analysis of the backward sequence
  • B. Schedulability analysis of the backward sequence by joint delay control
  • A. Properties of the schedulability for the backward sequence
  • B. O(n) algorithm for the schedulability analysis

2) Controlling delays on the backward sequence(stochastic)

  • A. Cyclic scheduling with bounded time variation
  • B. Lower bound schedulability analysis

3) Workload balancing by controlling WIP(Work in Process)

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SLIDE 7

7

Interpretation of Definition 1-1 :

  • For TEG of general cluster tools, there exist (n+1) circuits; n for PMs, 1 for the TM.
  • TM circuit consists of all TM actions.
  • PMk circuit consists of TM actions from 𝑣𝑙 to π‘šπ‘™, and a processing of 𝑄𝑁𝑙.
  • For the processing of 𝑄𝑁𝑙, input transition is π‘šπ‘™, and output transition is 𝑣𝑙.
  • To reduce the wafer residency time on 𝐐𝐍π₯, we will give delay on TM actions

from 𝒗𝒍 to π’Žπ’, which are π’’π’Œ π’’π’Œ 𝝑 {𝑫𝒍 ∩ π‘«πŸ} . Definition 1-1 : Classification of the circuits

  • π‘žπ‘˜ πœ— 𝐷0 𝑗𝑔 π‘žπ‘˜ πœ— π‘„π‘ˆπ‘
  • π‘’π‘˜ πœ— 𝐷0 𝑔𝑝𝑠 π‘π‘šπ‘š π‘˜
  • π‘žπ‘˜ πœ— 𝐷𝑙 𝑗𝑔 π‘žπ‘˜ πœ— π‘„π‘ˆπ‘, π‘π‘œπ‘’ 𝑣𝑙 β†’ π‘žπ‘˜ β†’ π‘šπ‘™ 𝑔𝑝𝑠 𝑙 > 0
  • π‘žπ‘˜ πœ— 𝐷𝑙 𝑗𝑔 π‘žπ‘˜ πœ— 𝑄𝑄𝑁, π‘π‘œπ‘’ π‘šπ‘™ β†’ π‘žπ‘˜ β†’ 𝑣𝑙 𝑔𝑝𝑠 𝑙 > 0
  • π‘’π‘˜ πœ— 𝐷𝑙 π‘₯β„Žπ‘“π‘ π‘“ 𝑣𝑙 β†’ π‘’π‘˜ β†’ π‘šπ‘™ 𝑔𝑝𝑠 𝑙 > 0

Introduction

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SLIDE 8

8

𝑉2 𝑀𝑀𝑀 𝑉1 𝑀2 𝑉𝑀𝑀 𝑀1

<Timed event graph of backward sequence>

  • Existing schedulability analysis of the backward sequence

Controlling delays on the backward sequence(deterministic)

  • All-wait backward operation
  • controls delay between π‘šπ‘™βˆ’1 and 𝑣𝑙 for 𝑄𝑁𝑙
  • πœ‡π‘„π‘π‘™ =

β„Žπ‘„π‘π‘™+4π‘₯+3𝑀 𝑛𝑙

  • πœ‡π‘ˆπ‘ = 2 π‘œ + 1

π‘₯ + 𝑀

  • πœ‡βˆ— = max max

𝑙

πœ‡π‘„π‘π‘™ , πœ‡π‘ˆπ‘

  • 𝑠

𝑙 = 𝑛𝑙 Β· max 0, πœ‡βˆ— βˆ’ β„Žπ‘„π‘π‘™+4π‘₯+3𝑀+πœ€π‘„π‘π‘™ 𝑛𝑙

  • Schedulability :

𝜈0

β€² = πœ‡π‘ˆπ‘ + 𝑙β‰₯1

𝑠

𝑙

πœ‡βˆ— = 𝜈0 β‰₯ 𝜈0

β€²

πœ‡βˆ— = πœˆπ‘™ = πœ‡π‘„π‘π‘™ + 𝑠

𝑙

𝑛𝑙

𝑠

2

𝑠0 𝑠

1

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SLIDE 9

9

Linear Programming for the backward sequence(deterministic)

  • Schedulability of backward sequence is equivalent to feasibility of following LP.
  • Minimized cycle time is equivalent to optimal value of following LP.

π‘π‘—π‘œπ‘—π‘›π‘—π‘¨π‘“ πœ‡ π‘‡π‘£π‘π‘˜π‘“π‘‘π‘’ 𝑒𝑝 β„Žπ‘„π‘π‘™ + 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 + π‘žπ‘˜πœ—π·π‘™ π‘’π‘˜ = π‘›π‘™πœ‡ 𝑔𝑝𝑠 𝑙 > 0 2 π‘œ + 1 π‘₯ + 𝑀 + π‘žπ‘˜βˆˆπ·0 π‘’π‘˜ = πœ‡ π‘’π‘˜ β‰₯ 0 𝑔𝑝𝑠 π‘π‘šπ‘š π‘˜ 𝒆𝑸𝑡𝒍 ≀ πœΊπ‘Έπ‘΅π’ π’ˆπ’‘π’” 𝒍 > 𝟏

  • Schedulability analysis of the backward sequence by joint delay control

Controlling delays on the backward sequence(deterministic)

𝑀

𝑉2 𝑀𝑀𝑀 𝑉1 𝑀2 𝑉𝑀𝑀 𝑀1

π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ 𝑀 𝑀 𝑀 𝑀 𝑀

[β„Žπ‘„π‘2, β„Žπ‘„π‘2 + πœ€2] [β„Žπ‘„π‘1, β„Žπ‘„π‘1 + πœ€1]

πœ‡ ∢ π‘‘π‘§π‘‘π‘šπ‘“ 𝑒𝑗𝑛𝑓 β„Žπ‘„π‘π‘™ ∢ π‘žπ‘ π‘π‘‘π‘“π‘‘π‘‘π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑄𝑁𝑙 πœ€π‘„π‘π‘™ ∢ π‘₯𝑏𝑔𝑓𝑠 π‘ π‘“π‘‘π‘—π‘’π‘“π‘œπ‘‘π‘§ 𝑒𝑗𝑛𝑓 π‘šπ‘—π‘›π‘—π‘’ 𝑛𝑙 ∢ π‘’β„Žπ‘“ π‘œπ‘£π‘›π‘π‘“π‘  𝑝𝑔 π‘žπ‘π‘ π‘π‘šπ‘šπ‘“π‘šπ‘‘ 𝑝𝑔 𝑄𝑁𝑙 π‘₯ ∢ π‘£π‘œ π‘šπ‘π‘π‘’π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑏 𝑠𝑝𝑐𝑝𝑒 𝑀 ∢ π‘›π‘π‘€π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑏 𝑠𝑝𝑐𝑝𝑒

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SLIDE 10

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Theorem 1-1 :

  • For series-parallel single-armed cluster tools, if the backward sequence is schedulable

with cycle time 𝝁, the backward sequence with cycle time 𝝁′ π’–π’Šπ’ƒπ’– π’•π’ƒπ’–π’‹π’•π’ˆπ’‹π’‡π’• 𝝁 β‰₯ 𝝁′ β‰₯ πβˆ— is schedulable.

  • πœ‡βˆ— = max(max

𝑙>0 β„Žπ‘„π‘π‘™+4π‘₯+3𝑀 𝑛𝑙

, 2 π‘œ + 1 π‘₯ + 𝑀 ), which is minimum workload of the tool. Theorem 1-2 :

  • For series-parallel single-armed cluster tools, if the backward sequence is schedulable

with wafer residency time 𝐸 = 𝑒𝑄𝑁1, … , π‘’π‘„π‘π‘œ , the backward sequence with 𝑬′ = π’†π‘Έπ‘΅πŸ

β€²

, … , 𝒆𝑸𝑡𝒐

β€²

π’–π’Šπ’ƒπ’– π’•π’ƒπ’–π’‹π’•π’ˆπ’‹π’‡π’•

π’Šπ‘Έπ‘΅π’+πŸ“π’™+πŸ’π’˜+𝒆𝑸𝑡𝒍 𝒏𝒍

≀

π’Šπ‘Έπ‘΅π’+πŸ“π’™+πŸ’π’˜+𝒆𝑸𝑡𝒍

β€²

𝒏𝒍

≀ 𝝁 is schedulable.

  • Schedulability analysis of the backward sequence by joint delay control

Controlling delays on the backward sequence(deterministic)

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SLIDE 11

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Schedulability analysis for the backward sequence(deterministic)

  • Backward sequence is schedulable iff the optimal value of following LP with πœ‡βˆ— =

max

𝑙>0 β„Žπ‘„π‘π‘™+4π‘₯+3𝑀 𝑛𝑙

and 𝑒𝑄𝑁𝑙 = max 0, πœ‡βˆ— βˆ’

β„Žπ‘„π‘π‘™+4π‘₯+3𝑀+πœ€π‘„π‘π‘™ 𝑛𝑙

is less than πœ‡βˆ—. π‘π‘—π‘œπ‘—π‘›π‘—π‘¨π‘“ Ξ£ π‘žπ‘˜ ∈ 𝐷𝑙 ∩ 𝐷0 βˆ€π‘™ π‘’π‘˜ + 2(π‘œ + 1)(π‘₯ + 𝑀) π‘‡π‘£π‘π‘˜π‘“π‘‘π‘’ 𝑒𝑝 β„Žπ‘„π‘π‘™ + 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 + π‘žπ‘˜πœ—π·π‘™ π‘’π‘˜ = π‘›π‘™πœ‡βˆ— 𝑔𝑝𝑠 𝑙 > 0 π‘’π‘˜ β‰₯ 0 𝑔𝑝𝑠 π‘π‘šπ‘š π‘˜

  • Schedulability analysis of the backward sequence by joint delay control

Controlling delays on the backward sequence(deterministic)

𝑀

𝑉2 𝑀𝑀𝑀 𝑉1 𝑀2 𝑉𝑀𝑀 𝑀1

π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ 𝑀 𝑀 𝑀 𝑀 𝑀

[β„Žπ‘„π‘2, β„Žπ‘„π‘2 + πœ€2] [β„Žπ‘„π‘1, β„Žπ‘„π‘1 + πœ€1]

πœ‡ ∢ π‘‘π‘§π‘‘π‘šπ‘“ 𝑒𝑗𝑛𝑓 β„Žπ‘„π‘π‘™ ∢ π‘žπ‘ π‘π‘‘π‘“π‘‘π‘‘π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑄𝑁𝑙 πœ€π‘„π‘π‘™ ∢ π‘₯𝑏𝑔𝑓𝑠 π‘ π‘“π‘‘π‘—π‘’π‘“π‘œπ‘‘π‘§ 𝑒𝑗𝑛𝑓 π‘šπ‘—π‘›π‘—π‘’ 𝑛𝑙 ∢ π‘’β„Žπ‘“ π‘œπ‘£π‘›π‘π‘“π‘  𝑝𝑔 π‘žπ‘π‘ π‘π‘šπ‘šπ‘“π‘šπ‘‘ 𝑝𝑔 𝑄𝑁𝑙 π‘₯ ∢ π‘£π‘œ π‘šπ‘π‘π‘’π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑏 𝑠𝑝𝑐𝑝𝑒 𝑀 ∢ π‘›π‘π‘€π‘—π‘œπ‘• 𝑒𝑗𝑛𝑓 𝑝𝑔 𝑏 𝑠𝑝𝑐𝑝𝑒

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SLIDE 12

12

  • Schedulability analysis of the backward sequence by joint delay control

Controlling delays on the backward sequence(deterministic)

Theorem 1-3 : 𝑷 𝒐 algorithm for schedulability analysis of the backward sequence

  • For given πœ‡βˆ—, backward sequence is schedulable if and only if

πŸ‘ 𝒐 + 𝟐 𝒙 + π’˜ + 𝒔𝒍 βˆ’ 𝒔 𝒍,𝒍+𝟐 ≀ πβˆ— where

  • 𝑠

𝑙 = 𝑛𝑙 Β· max 0, πœ‡βˆ— βˆ’ β„Žπ‘„π‘π‘™+δ𝑄𝑁𝑙+4π‘₯+3𝑀 𝑛𝑙

  • 𝑠(𝑙,𝑙+1) = min 𝑠

𝑙 βˆ’ 𝑠 (π‘™βˆ’1,𝑙), 𝑠 𝑙+1

𝑔𝑝𝑠 𝑙 = 1, … , π‘œ βˆ’ 1

  • 𝑠(𝑙,𝑙+1) = 0 𝑔𝑝𝑠 𝑙 = 0
  • minimum cycle time : πœ‡βˆ— = max max

𝑙

πœ‡π‘„π‘π‘™ , πœ‡π‘ˆπ‘ = max(max

𝑙>0 β„Žπ‘„π‘π‘™+4π‘₯+3𝑀 𝑛𝑙

, 2 π‘œ + 1 π‘₯ + 𝑀 )

𝒔𝒍: intended delay while 𝐐𝐍π₯ is unloaded 𝒔(𝒍,𝒍+𝟐) : intended delay while both 𝐐𝐍π₯ and 𝐐𝐍π₯+𝟐 are unloaded

𝑀

1 3 5 2 4 𝑉2 𝑀𝑀𝑀 𝑉1 𝑀2 𝑉𝑀𝑀 𝑀1 6

π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ π‘₯ 𝑀 𝑀 𝑀 𝑀 𝑀

[β„Žπ‘„π‘2, β„Žπ‘„π‘2 + πœ€2] [β„Žπ‘„π‘1, β„Žπ‘„π‘1 + πœ€1]

𝑠

1 = 𝑒1 + 𝑒2 + 𝑒3

𝑠 1,2 = 𝑒3 𝑠2 = 𝑒3 + 𝑒4 + 𝑒5

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SLIDE 13

Contents

13

1) Controlling delays on the backward sequence(deterministic)

  • A. Existing schedulability analysis of the backward sequence
  • B. Schedulability analysis of the backward sequence by joint delay control
  • A. Properties of the schedulability for the backward sequence
  • B. O(n) algorithm for the schedulability analysis

2) Controlling delays on the backward sequence(stochastic)

  • A. Cyclic scheduling with bounded time variation
  • B. Lower bound schedulability analysis

3) Workload balancing by controlling WIP(Work in Process)

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SLIDE 14

1) For deterministic model, time interval between identical tasks are all πœ‡βˆ—. 2) For stochastic model, we cannot make cyclicity of all tasks. 1) We make cyclicity of loading tasks, while unloading tasks are conducted before specified time limit. 3) Unloading tasks may be done earlier/later than intended epoch. 1) If the processing time is longer, unloading task will be delayed. 2) If the processing time is shorter, unloading task will be pushed. 4) The objective for stochastic model is to conduct schedulability analysis and to propose the cyclic scheduling method.

Cyclic Scheduling of Cluster Tools

14

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SLIDE 15

Cyclic Scheduling of Cluster Tools

  • For the cyclic scheduling with bounded time variation, we first set the

deterministic process time β„Žπ‘„π‘π‘™

π‘š

≀ 𝑦𝑙 ≀ β„Žπ‘„π‘π‘™

𝑣

.

  • When the unloading task, 𝑣𝑙, should be done earlier than intended epoch of

𝑦𝑙, We should reduce the delay of the place, π‘ž π‘šπ‘™+2→𝑣𝑙 .

  • When the unloading task, 𝑣𝑙, should be done later than intended epoch of

𝑦𝑙, We should reduce the delay of the place, π‘ž π‘£π‘™β†’π‘šπ‘™+1 .

𝑉3 𝑀𝑀𝑀 𝑉2 𝑀3 𝑉1

w w w w w v v v v v v

[β„Ž3

π‘š , β„Ž3 𝑣]πœ€3

𝑀2 𝑉𝑀𝑀 𝑀1

w w w v v

[β„Ž2

π‘š , β„Ž2 𝑣]πœ€2

[β„Ž1

π‘š , β„Ž1 𝑣]πœ€1 15

: π‘ž π‘šπ‘™+2→𝑣𝑙 : π‘ž π‘£π‘™β†’π‘šπ‘™+1

slide-16
SLIDE 16

Controlling delays on the backward sequence(stochastic)

Linear Programming for the backward sequence(stochastic)

  • Schedulability of backward sequence is equivalent to feasibility of following LP.
  • Minimized cycle time is equivalent to optimal value of following LP.

π‘π‘—π‘œπ‘—π‘›π‘—π‘¨π‘“ πœ‡ π‘‡π‘£π‘π‘˜π‘“π‘‘π‘’ 𝑒𝑝 𝑦𝑙 + 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 + 𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™+1β†’π‘£π‘™βˆ’1 + 𝑒 π‘£π‘™βˆ’1β†’π‘šπ‘™ = π‘›π‘™πœ‡ 𝑔𝑝𝑠 1 ≀ 𝑙 ≀ π‘œ 2 π‘œ + 1 π‘₯ + 𝑀 + 1β‰€π‘™β‰€π‘œ+1(𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™β†’π‘£π‘™ ) = πœ‡ β„Žπ‘„π‘π‘™

π‘š

≀ 𝑦𝑙 ≀ β„Žπ‘„π‘π‘™

𝑣

𝑔𝑝𝑠 1 ≀ 𝑙 ≀ π‘œ 𝑒 π‘šπ‘™+2→𝑣𝑙 β‰₯ 𝑦𝑙 βˆ’ β„Žπ‘„π‘π‘™

π‘š

βˆ’ πœ€π‘„π‘π‘™ βˆ’ 𝑒𝑄𝑁𝑙 𝑔𝑝𝑠 1 ≀ 𝑙 ≀ π‘œ 𝑒 π‘£π‘™β†’π‘šπ‘™+1 β‰₯ β„Žπ‘„π‘π‘™

𝑣

βˆ’ 𝑦𝑙 βˆ’ 𝑒𝑄𝑁𝑙 𝑔𝑝𝑠 1 ≀ 𝑙 ≀ π‘œ 𝑒𝑄𝑁𝑙 ≀ πœ€π‘„π‘π‘™ 𝑔𝑝𝑠 1 ≀ 𝑙 ≀ π‘œ π‘π‘šπ‘š π‘€π‘π‘ π‘—π‘π‘π‘šπ‘“π‘‘ 𝑏𝑠𝑓 π‘œπ‘π‘œ βˆ’ π‘œπ‘“π‘•π‘π‘’π‘—π‘€π‘“

16

If P𝑁𝑙 should be unloaded earlier If P𝑁𝑙 should be unloaded later

slide-17
SLIDE 17

Controlling delays on the backward sequence(stochastic)

Theorem 2-1 : Lower Bound Schedulability Analysis(for βˆ†π’Šπ‘Έπ‘΅π’β‰€ πœΊπ‘Έπ‘΅π’)

  • Each 𝑄𝑁𝑙 has bounded process time β„Žπ‘„π‘π‘™

π‘š

≀ 𝑦𝑙 ≀ β„Žπ‘„π‘π‘™

𝑣

  • Each 𝑄𝑁𝑙 has wafer residency time constraint 𝑒𝑄𝑁𝑙 ≀ πœ€π‘„π‘π‘™.
  • If βˆ†β„Žπ‘„π‘π‘™β‰€ πœ€π‘„π‘π‘™ 𝑔𝑝𝑠 π‘π‘šπ‘š 𝑄𝑁𝑙,
  • If the backward sequence with πœ‡βˆ— = max

𝑙>0 β„Žπ‘„π‘π‘™

𝑣

+4π‘₯+3𝑀 𝑛𝑙

, 𝑦𝑙 = β„Žπ‘„π‘π‘™

π‘š

is schedulable, the backward sequence with bounded time variation is also schedulable.

  • πβˆ— β‰₯ πŸ‘ 𝒐 + 𝟐

𝒙 + π’˜ + 𝒔𝒍 βˆ’ 𝒔 𝒍,𝒍+𝟐

17

Proof) Let 𝑦𝑙 = β„Žπ‘„π‘π‘™

π‘š

+ πœπ‘™. 𝑦𝑙 βˆ’ β„Žπ‘„π‘π‘™

π‘š

βˆ’ πœ€π‘„π‘π‘™ βˆ’ 𝑒𝑄𝑁𝑙 ≀ 0 β„Žπ‘„π‘π‘™

𝑣

βˆ’ 𝑦𝑙 βˆ’ 𝑒𝑄𝑁𝑙 ≀ 0 βˆ†β„Žπ‘„π‘π‘™β‰€ πœπ‘™ + 𝑒𝑄𝑁𝑙 ≀ πœ€π‘„π‘π‘™ Let 𝑒𝑙

β€² = πœπ‘™ + 𝑒𝑄𝑁𝑙 . LP becomes equivalent to deterministic model by theorem 1-2.

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SLIDE 18

Controlling delays on the backward sequence(stochastic)

Theorem 2-2 : Lower Bound Schedulability Analysis(for βˆ†π’Šπ‘Έπ‘΅π’> πœΊπ‘Έπ‘΅π’)

  • Each 𝑄𝑁𝑙 has bounded process time β„Žπ‘„π‘π‘™

π‘š

≀ 𝑦𝑙 ≀ β„Žπ‘„π‘π‘™

𝑣

  • Each 𝑄𝑁𝑙 has wafer residency time constraint 𝑒𝑄𝑁𝑙 ≀ πœ€π‘„π‘π‘™.
  • If βˆ†β„Žπ‘„π‘π‘™> πœ€π‘„π‘π‘™ 𝑔𝑝𝑠 π‘π‘šπ‘š 𝑄𝑁𝑙,
  • If πβˆ— β‰₯ πŸ‘ 𝒐 + 𝟐

𝒙 + π’˜ + 𝒔𝒍 βˆ’ 𝒔 𝒍,𝒍+𝟐 + βˆ†π’Šπ‘Έπ‘΅π’ βˆ’ πœΊπ‘Έπ‘΅π’ π’™π’Šπ’‡π’”π’‡ πβˆ— = 𝐧𝐛𝐲

𝒍 π’Šπ‘Έπ‘΅π’

𝒗

+πŸ“π’™+πŸ’π’˜+(βˆ†π’Šπ‘Έπ‘΅π’βˆ’πŸβˆ’πœΊπ‘Έπ‘΅π’βˆ’πŸ) 𝒏𝒍

, π’šπ’ = π’Šπ‘Έπ‘΅π’

π’Ž

+ 𝒋= 𝒍,π’βˆ’πŸ (βˆ†π’Šπ‘Έπ‘΅π’‹ βˆ’ πœΊπ‘Έπ‘΅π’‹), the backward sequence with bounded time variation is also schedulable.

18

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SLIDE 19

Controlling delays on the backward sequence(stochastic)

19

Proof) Let 𝑦𝑙 = β„Žπ‘„π‘π‘™

π‘š

+ πœπ‘™. 𝑦𝑙 + 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 + 𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™+1β†’π‘£π‘™βˆ’1 + 𝑒 π‘£π‘™βˆ’1β†’π‘šπ‘™ β‰₯ β„Žπ‘„π‘π‘™

𝑣

+ 4π‘₯ + 3𝑀 + βˆ†β„Žπ‘„π‘π‘™βˆ’1 βˆ’ πœ€π‘„π‘π‘™βˆ’1 + 𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

+ 𝑒 π‘šπ‘™+1β†’π‘£π‘™βˆ’1

β€²

+ 𝑒 π‘£π‘™βˆ’1β†’π‘šπ‘™

β€²

π‘₯β„Žπ‘“π‘ π‘“ 𝑒 π‘šπ‘™+2→𝑣𝑙

β€²

= 𝑒 π‘šπ‘™+2→𝑣𝑙 βˆ’ max 0, 𝑦𝑙 βˆ’ β„Žπ‘„π‘π‘™

π‘š

βˆ’ πœ€π‘„π‘π‘™ βˆ’ 𝑒𝑄𝑁𝑙 𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

= 𝑒 π‘£π‘™β†’π‘šπ‘™+1 βˆ’ max 0, β„Žπ‘„π‘π‘™

𝑣

βˆ’ 𝑦𝑙 βˆ’ 𝑒𝑄𝑁𝑙 . Equality holds if πœ€π‘„π‘π‘™ ≀ πœπ‘™ + 𝑒𝑄𝑁𝑙 ≀ βˆ†β„Žπ‘„π‘π‘™ 𝑔𝑝𝑠 π‘π‘šπ‘š 𝑙. Then πœ‡βˆ— = max

𝑙 β„Žπ‘„π‘π‘™

𝑣

+4π‘₯+3𝑀+(βˆ†β„Žπ‘„π‘π‘™βˆ’1βˆ’πœ€π‘„π‘π‘™βˆ’1) 𝑛𝑙

and 𝑙=1

π‘œ

(𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™+2→𝑣𝑙 ) = 𝑙=1

π‘œ

(𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

+ 𝑒 π‘šπ‘™+2→𝑣𝑙

β€²

) + 𝑙=1

π‘œ

βˆ†β„Žπ‘„π‘π‘™ βˆ’ πœ€π‘„π‘π‘™ . 𝑦𝑙

β€² + 𝑒𝑄𝑁𝑙 β€²

= β„Žπ‘„π‘π‘™

𝑣

+ βˆ†β„Žπ‘„π‘π‘™βˆ’1 βˆ’ πœ€π‘„π‘π‘™βˆ’1 . We set 𝑦𝑙

β€² = β„Žπ‘„π‘π‘™ π‘š

+ 𝑗= 𝑙,π‘™βˆ’1 (βˆ†β„Žπ‘„π‘π‘— βˆ’ πœ€π‘„π‘π‘—), 𝑒𝑄𝑁𝑙

β€²

= πœ€π‘„π‘π‘™. Then LP becomes equivalent to deterministic model by theorem 1-2.

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SLIDE 20

Controlling delays on the backward sequence(stochastic)

Theorem 2-3 : Lower Bound Schedulability Analysis

  • Each 𝑄𝑁𝑙 has bounded process time β„Žπ‘„π‘π‘™

π‘š

≀ 𝑦𝑙 ≀ β„Žπ‘„π‘π‘™

𝑣

  • Each 𝑄𝑁𝑙 has wafer residency time constraint 𝑒𝑄𝑁𝑙 ≀ πœ€π‘„π‘π‘™.
  • If πβˆ— β‰₯ πŸ‘ 𝒐 + 𝟐

𝒙 + π’˜ + 𝒔𝒍 βˆ’ 𝒔 𝒍,𝒍+𝟐 + 𝐧𝐛𝐲 𝟏, βˆ†π’Šπ‘Έπ‘΅π’ βˆ’ πœΊπ‘Έπ‘΅π’ π’™π’Šπ’‡π’”π’‡ πβˆ— = 𝐧𝐛𝐲

𝒍 π’Šπ‘Έπ‘΅π’

𝒗

+πŸ“π’™+πŸ’π’˜+𝐧𝐛𝐲 𝟏,βˆ†π’Šπ‘Έπ‘΅π’βˆ’πœΊπ‘Έπ‘΅π’βˆ’πŸ 𝒏𝒍

, 𝒃𝒐𝒆 π’šπ’ = π’Šπ‘Έπ‘΅π’

π’Ž

+ 𝒋= 𝒍,π’βˆ’πŸ 𝐧𝐛𝐲 𝟏, βˆ†π’Šπ‘Έπ‘΅π’‹ βˆ’ πœΊπ‘Έπ‘΅π’‹ , the backward sequence with bounded time variation is also schedulable.

20

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SLIDE 21

Controlling delays on the backward sequence(stochastic)

21

Proof) Let 𝑦𝑙 = β„Žπ‘„π‘π‘™

π‘š

+ πœπ‘™. 𝑦𝑙 + 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 + 𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™+1β†’π‘£π‘™βˆ’1 + 𝑒 π‘£π‘™βˆ’1β†’π‘šπ‘™ β‰₯ β„Žπ‘„π‘π‘™

π‘š

+ πœπ‘™ + 𝑒𝑄𝑁𝑙 + max 0, βˆ†β„Žπ‘„π‘π‘™ βˆ’ πœπ‘™ βˆ’ 𝑒𝑄𝑁𝑙 + 4π‘₯ + 3𝑀 +max 0, βˆ†β„Žπ‘„π‘π‘™βˆ’1 βˆ’ πœ€π‘„π‘π‘™βˆ’1 + 𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

+ 𝑒 π‘šπ‘™+1β†’π‘£π‘™βˆ’1

β€²

+ 𝑒 π‘£π‘™βˆ’1β†’π‘šπ‘™

β€²

π‘₯β„Žπ‘“π‘ π‘“ 𝑒 π‘šπ‘™+2→𝑣𝑙

β€²

= 𝑒 π‘šπ‘™+2→𝑣𝑙 βˆ’ max 0, 𝑦𝑙 βˆ’ β„Žπ‘„π‘π‘™

π‘š

βˆ’ πœ€π‘„π‘π‘™ βˆ’ 𝑒𝑄𝑁𝑙 𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

= 𝑒 π‘£π‘™β†’π‘šπ‘™+1 βˆ’ max 0, β„Žπ‘„π‘π‘™

𝑣

βˆ’ 𝑦𝑙 βˆ’ 𝑒𝑄𝑁𝑙 . Equality holds if min βˆ†β„Žπ‘„π‘π‘™, πœ€π‘„π‘π‘™ ≀ πœπ‘™ + 𝑒𝑄𝑁𝑙 ≀ max βˆ†β„Žπ‘„π‘π‘™, πœ€π‘„π‘π‘™ 𝑔𝑝𝑠 π‘π‘šπ‘š 𝑙. Then πœ‡βˆ— = max

𝑙 β„Žπ‘„π‘π‘™

𝑣

+4π‘₯+3𝑀+max(0,βˆ†β„Žπ‘„π‘π‘™βˆ’1βˆ’πœ€π‘„π‘π‘™βˆ’1) 𝑛𝑙

and 𝑙=1

π‘œ

(𝑒 π‘£π‘™β†’π‘šπ‘™+1 + 𝑒 π‘šπ‘™+2→𝑣𝑙 ) = 𝑙=1

π‘œ

(𝑒 π‘£π‘™β†’π‘šπ‘™+1

β€²

+ 𝑒 π‘šπ‘™+2→𝑣𝑙

β€²

) + 𝑙=1

π‘œ

max 0, βˆ†β„Žπ‘„π‘π‘™ βˆ’ πœ€π‘„π‘π‘™ . 𝑦𝑙

β€² + 𝑒𝑄𝑁𝑙 β€²

= β„Žπ‘„π‘π‘™

π‘š

+ max βˆ†β„Žπ‘„π‘π‘™, πœπ‘™ + 𝑒𝑄𝑁𝑙 + max 0, βˆ†β„Žπ‘„π‘π‘™βˆ’1 βˆ’ πœ€π‘„π‘π‘™βˆ’1 . We set 𝑦𝑙

β€² = β„Žπ‘„π‘π‘™ π‘š

+ 𝑗= 𝑙,π‘™βˆ’1 max(0, βˆ†β„Žπ‘„π‘π‘— βˆ’ πœ€π‘„π‘π‘—), 𝑒𝑄𝑁𝑙

β€²

≀ πœ€π‘„π‘π‘™. Then LP becomes equivalent to deterministic model by theorem 1-2.

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SLIDE 22

Contents

22

1) Controlling delays on the backward sequence(deterministic)

  • A. Existing schedulability analysis of the backward sequence
  • B. Schedulability analysis of the backward sequence by joint delay control
  • A. Properties of the schedulability for the backward sequence
  • B. O(n) algorithm for the schedulability analysis

2) Controlling delays on the backward sequence(stochastic)

  • A. Cyclic scheduling with bounded time variation
  • B. Lower bound schedulability analysis

3) Workload balancing by controlling WIP(Work in Process)

slide-23
SLIDE 23

23

Theorem 3-1 :

  • For series-parallel single-armed cluster tools, if the backward sequence is schedulable

with given process condition, 𝐼, Ξ΄, 𝑁 = β„Žπ‘„π‘1, … , β„Žπ‘„π‘π‘œ , δ𝑄𝑁1, … , Ξ΄π‘„π‘π‘œ , 𝑛1, … , π‘›π‘œ , the backward sequence with 𝑰′, πœΊβ€², 𝑡′ , π’–π’Šπ’ƒπ’– π’•π’ƒπ’–π’‹π’•π’ˆπ’‹π’‡π’•

π’Šπ‘Έπ‘΅π’

β€²

+πŸ“π’™+πŸ’π’˜ 𝒏𝒍

β€²

≀ πβˆ— 𝒃𝒐𝒆

π’Šπ‘Έπ‘΅π’+πŸ“π’™+πŸ’π’˜+πœΊπ‘Έπ‘΅π’ 𝒏𝒍

≀

π’Šπ‘Έπ‘΅π’

β€²

+πŸ“π’™+πŸ’π’˜+πœΊπ‘Έπ‘΅π’

β€²

𝒏𝒍

β€²

, is schedulable.

Workload balancing by controlling WIP(Work in Process)

Theorem 3-2 : Optimization by controlling the work-in-process(WIP) 1) Conduct the schedulability analysis of π₯=𝟐

𝐨

(𝐧π₯βˆ’πŸ) cases.

1) Set the cycle time 𝝁 =

π’Šπ‘Έπ‘΅π’+πŸ“π’™+πŸ’π’˜ π’œπ’

, 𝟐 ≀ π’œπ’ ≀ 𝒏𝒍, 𝟐 ≀ 𝒍 ≀ 𝒐. 2) Set the WIP 𝑨𝑙 = min

πŸβ‰€π’œπ’β‰€π’π’ 𝑨𝑙 π’Šπ‘Έπ‘΅π’+πŸ“π’™+πŸ’π’˜ π’œπ’

≀ 𝝁 , βˆ€π‘™. 3) Conduct the schedulability analysis with the given WIP(𝑨 = {𝑨1, … , π‘¨π‘œ}).

2) Choose the feasible schedules with minimum cycle time among π₯=𝟐

𝐨

(𝐧π₯βˆ’πŸ) cases.

slide-24
SLIDE 24

24

Summary

  • We conduct the schedulability analysis of single-armed cluster tools

with deterministic/stochastic processing time.

  • We also derive some properties for the schedulability.
  • Moreover, we optimize the sequence by controlling the WIP.
  • Research plan : Extend the schedulability analysis to the general

sequences of cluster tools.

Any Questions?