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Reconfigurable Computing Computing Reconfigurable On- -line line communication communication strategies strategies On Chapter 7 7 Chapter Prof. Dr.- -Ing. Jrgen Teich Ing. Jrgen Teich Prof. Dr. Lehrstuhl fr Hardware- -Software


  1. Reconfigurable Computing Computing Reconfigurable On- -line line communication communication strategies strategies On Chapter 7 7 Chapter Prof. Dr.- -Ing. Jürgen Teich Ing. Jürgen Teich Prof. Dr. Lehrstuhl für Hardware- -Software Software- -Co Co- -Design Design Lehrstuhl für Hardware Reconfigurable Computing

  2. On- -line connection line connection - - Motivation Motivation On � Routing-conscious temporal placement algorithms consider distance among components during placement � However, they do not consider implementation of a dynamic connection mechanism required for communication among components. � In this section, we will investigate existing approaches for solving the communication problem between components dynamically placed on and removed from the device, namely: � Bus-based approaches � Circuit routing � Network-on-Chip (NoC) approaches Reconfigurable Computing 2

  3. 3 -based communication based communication Reconfigurable Computing BUS- BUS

  4. BUS - - oriented communication oriented communication BUS � Many components connected at fixed locations � One arbiter for BUS-Management � SoC (System on Chip): Buses can be used to connect different modules � ARM AMBA Mod4 Mod 1 Mod2 � Advance high-performance bus (AHB) � Advance peripheral bus (APB) � IBM CoreConnect Arbiter Mod3 � Processor local bus (PLB) � On-chip peripheral bus (OPB) � Silicore Whishbone Reconfigurable Computing 4

  5. BUS - - oriented communication oriented communication BUS � Using standard bus-arbiter (Becker) OS-frame � Device is divided into slots ICAP Module 2 Module 3 Module 4 Module 0 Module 1 Decompessor � Each task must be placed in a slot Quelle: ITIV, Uni Karlsruhe (TH) � Each component implements the Control bus-transaction Mod Mod Mod Mod Mod Com Com Com Com Com Controller Com � Each component can be a master Master- Bus-Macro Module � An arbiter manages the bus- Quelle: ITIV, Uni Karlsruhe (TH) assignment Reconfigurable Computing 5

  6. Communication via the OS Communication via the OS � Encapsulating the BUS-transaction Inter Frame Communication in a wrapper (Platzner, Walder) Channels (IFCC) OS-frame � Divide the device into slots � Each task must be placed in a given slot � A slot is enveloped in a wrapper which hides the bus-transaction process task- task- task- task- � slot slot slot Communication takes place through slo t a fixed module called the OS. � Each module can send a message by writing in its send buffer � The OS copies messages from the send buffers to the receive buffers of modules � The receive modules read their message from its receive buffer Reconfigurable Computing 6

  7. Communication via the OS Communication via the OS � Communication with off-chip module is also done via the OS OS-frame Reconfigurable Computing 7

  8. 8 Circuit switching Circuit switching Reconfigurable Computing

  9. Dynamic Networks – – circuit routing circuit routing Dynamic Networks � Architecture: � Set of Processing elements � Communication signals are set between two PEs using a set of switches on a path from the source to the destination � Advantage: � Direct communication. No need to process packets Prohibited area � Drawbacks: � Computing a route is expensive. Difficult to be done on-line � Routed lines create a large amount of prohibited area � Prohibited area can be overcome by using an extra layer exclusively for circuit routing Reconfigurable Computing 9

  10. The reconfigurable multiple bus (RMB) approach The reconfigurable multiple bus (RMB) approach � A set of n processing elements and k segmented buses � Crosspoints (switches) are used to set the connection between the segments at run-time Switches PE 1 PE 2 PE 3 PE 4 PE 5 Reconfigurable Computing 10

  11. The reconfigurable multiple bus (RMB) approach The reconfigurable multiple bus (RMB) approach � The sender always initiates a communication request and terminates (frees) an established communication path OS-frame � Each communication path is granted until the end of the communication PE 5 PE 1 PE 2 PE 3 PE 4 Reconfigurable Computing 11

  12. The reconfigurable multiple bus (RMB) approach The reconfigurable multiple bus (RMB) approach � On a columnwise reconfigurable device, the RMB provides a modular communication infrastructure OS-frame � All the switches in one column are grouped together � The separation of horizontal reconfigurable regions is Bus macros done via bus macros PE 3 PE 4 PE 5 PE 1 PE 2 Reconfigurable Computing 12

  13. Algorithms for for Reconfiguration Reconfiguration Algorithms T 1 T 1 T 2 1 M 1 T 3 T 4 T 5 T 1 T 2 … 1 M 1 1 M 1 T 6 T 3 T 7 1 M 1 T 8 T 9 Reconfigurable Computing 13

  14. Algorithms for for Reconfiguration Reconfiguration Algorithms T 1 T 2 M 1 M 2 FPGA M 3 T 3 RMB Reconfigurable Computing 14

  15. 15 M3 for Reconfiguration Reconfiguration Reconfigurable Computing M2 Algorithms for M1 RMB Algorithms FPGA

  16. 16 M3 for Reconfiguration Reconfiguration Reconfigurable Computing M2 Algorithms for M1 RMB Algorithms FPGA

  17. 17 for Reconfiguration Reconfiguration Reconfigurable Computing M3 M2 Algorithms for M1 RMB Algorithms FPGA

  18. 18 for Reconfiguration Reconfiguration Reconfigurable Computing M2 M3 Algorithms for M1 RMB Algorithms FPGA

  19. Algorithms for for Reconfiguration Reconfiguration Algorithms FPGA Minimum Bandwidth (MBW) ( ) ( ) FPGA σ − σ min max i j M2 ( ) σ ∈ i , j E M3 Minimum Cutwidth Linear Arrangement (MCLA) M1 } ( { ) ( ) ( ) } M2 ∈ σ ≤ ≤ σ M3 min max , , i j E i k j M1 FPGA { σ ∈ 1 K , , Optimal Linear Arrangement (OLA) k n RMB ∑ ( ) ( ) σ − σ min i j RMB M2 σ ( ) ∈ M3 i , j E M1 RMB Reconfigurable Computing 19

  20. 20 for Reconfiguration Reconfiguration Reconfigurable Computing M2 M3 Algorithms for M1 RMB Algorithms FPGA

  21. 21 Reconfigurable Computing Example: Video game Pong Example: Video game Pong

  22. Video game: Module Relocation Video game: Module Relocation User Input 4 20 Racket Position Ball Position 20 38 Visualization Reconfigurable Computing 22

  23. Video game: Module Relocation Video game: Module Relocation User Input 4 20 Racket Position Ball Position 20 38 Visualization Reconfigurable Computing 23

  24. Video game: Module Relocation Video game: Module Relocation Input User Position User Input Racket CP 4 Task: Position • Place modules such that the least number of CP 20 Ball bus segments is required Racket Position Ball Position Visualization Solution: • Integer Linear Program (FPL’06) 20 38 CP Visualization CP Reconfigurable Computing 24

  25. Video game: Module Relocation Video game: Module Relocation Visualization Position Position Racket Input User Input User Ball Position User Input Racket CP CP CP CP CP 4 Position CP 20 Ball 58 parallel segments Racket Position Ball Position Visualization 20 38 CP Visualization CP Reconfigurable Computing 25

  26. Video game: Module Relocation Video game: Module Relocation Visualization Position Position Racket Input User Ball CP CP CP CP Task: • Place modules such that for given maximal 58 parallel segments number of parallel bus segments the length of the longest connection Length of longest connection is 3 distance is minimized Solution: • Integer Linear Program (FPL’06) Reconfigurable Computing 26

  27. Video game: Module Relocation Video game: Module Relocation Visualization Position Position Racket Input User Ball CP CP CP CP Length of longest connection is 2 Reconfigurable Computing 27

  28. Video game: Module Relocation Video game: Module Relocation Visualization Position Position Racket Input User Ball CP CP CP CP Length of longest connection is 2 Reconfigurable Computing 28

  29. 29 Reconfigurable Computing Slot Machine Machine Erlangen Slot Erlangen

  30. Video game: Erlangen Erlangen Slot Machine (ESM) Slot Machine (ESM) Video game: Reconfigurable Computing 30

  31. Implementation Implementation Racket User Ball Display Position Input Position CP0 CP1 CP2 CP3 Reconfigurable Computing 31

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