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Reconfigurable Computing Reconfigurable Computing Introduction Introduction Chapter 1 1 Chapter Prof. Dr.- -Ing. Jrgen Teich Ing. Jrgen Teich Prof. Dr. Lehrstuhl fr Hardware- -Software Software- -Co Co- -Design Design


  1. Reconfigurable Computing Reconfigurable Computing Introduction Introduction Chapter 1 1 Chapter Prof. Dr.- -Ing. Jürgen Teich Ing. Jürgen Teich Prof. Dr. Lehrstuhl für Hardware- -Software Software- -Co Co- -Design Design Lehrstuhl für Hardware Reconfigurable Computing

  2. The Von Neumann Computer The Von Neumann Computer • Principle In 1945, the mathematician Von Neumann (VN) demonstrated in study of computation that a computer could have a simple structure, capable of executing any kind of program, given a properly programmed control unit, without the need of hardware modification. Reconfigurable Computing 2

  3. The Von Neumann Computer The Von Neumann Computer • Structure � A memory for storing program and data. The memory consists of the word with the same length � A control unit (control path) featuring a program counter for controlling program execution � An arithmetic and logic unit(ALU) also called data path for program execution Reconfigurable Computing 3

  4. The Von Neumann Computer The Von Neumann Computer • Coding A program is coded as a set of instructions to be sequentially executed • Program execution � Instruction Fetch (IF): The next instruction to be executed is fetched from the memory � Decode (D): The instruction is decoded to determine the operation � Read operand (R): The operands are read from the memory � Execute (EX): The required operation is executed on the ALU � Write result (W): The result of the operation is written back to the memory � Instruction execution in Cycle (IF, D, R, EX, W) Reconfigurable Computing 4

  5. The Von Neumann Computer The Von Neumann Computer Advantage: � Flexibility: any well coded program can be executed Drawbacks � Speed efficiency: Not efficient, due to the sequential program execution (temporal resource sharing). � Resource efficiency: Only one part of the hardware resources is required for the execution of an instruction. The rest remains idle. � Memory access: Memories are about 10 time slower than the processor � Drawbacks are compensated using high clock speed, pipelining, caches, instruction pre-fetching, etc. Reconfigurable Computing 5

  6. The Von Neumann Computer The Von Neumann Computer Sequential execution t cycle = cycle execution time One instruction needs t instrcution = 5*t cycle 3 instructions are executed in 15*t cycle Pipelining: One instruction needs t instruction = 5*t cycle no improvement. 3 instructions need 7*t cycle in the ideal case. 9*t cycle on a Harvard architecture. � Increased throughput � Even with pipeline and other improvements like cache, the execution remains sequential. Reconfigurable Computing 6

  7. Domain specific processors Domain specific processors Goal: Overcome the drawback of the von Neumann computer. Optimize the Data path for a given class of applications DSP (Digital Signal Processors) : Signal processing applications are usually multiply accumulate (MAC) dominated. � The data path is optimized to execute one or many MACs in only one cycle. � Instruction fetching and decoding overhead is removed � Memory access is limited by directly processing the input dataflow Reconfigurable Computing 7

  8. Domain specific processors Domain specific processors DSPs: Designed for high-performance, repetitive, numerically intensive tasks In one Instruction Cycle, can do: � many MAC-operations many memory accesses � � special support for efficient looping The hardware contains: � One or more MAC-Units � Multi-ported on-chip and off-chip memories � Multiple on-chip busses � Address generation unit supporting addressing modes tailored for DSP-applications Reconfigurable Computing 8

  9. Application- -specific specific processors processors Application Optimize the complete circuit for a given function ASIC: Application-Specific Integrated Circuit. Optimization is done by implementing the inherent parallel structure on a chip � The data path is optimized for only one application. � Instruction fetching and decoding overhead is removed � Memory access is limited by directly processing the input data flow � Exploitation of parallel computation Reconfigurable Computing 9

  10. Application- -specific specific processors processors Application ASIC implementation: ASIC Example: The complete execution is done in Implementation of a VN computer parallel in one clock cycle if (a < b) then run-time = t clock = delay longest path { from input to output d = a+b; c = a*a; } else { d = a+1; c = b-1; } At least 3 instructions run-time >= 3*t instruction The VN computer needs to be clocked at least 3 times faster Reconfigurable Computing 10

  11. Conclusion Conclusion • Von Neumann computer: General purpose, used for any kind of function. � High degree of flexibility. However, high restrictions on the program coding and execution scheme � the program have to adapt to the machine • DSPs are Adapted for a class of applications. � Flexibility and efficiency only for a given class of applications. • ASICs are Tailored for one application. � Very efficient in speed and resource. Cannot re-adapt to a new application � Not flexible Reconfigurable Computing 11

  12. Reconfigurable Computing: Definition Reconfigurable Computing: Definition The Ideal device should combine: � the flexibility of the Von Neumann computer � the efficiency of ASICs The ideal device should be able to � Optimally implement an application at a given time � Re-adapt to allow the optimal implementation of a new application. We call such a device a reconfigurable device. Reconfigurable computing can be defined as the study of computation involving reconfigurable devices. This includes architecture, algorithms and applications. Reconfigurable Computing 12

  13. Flexibility vs Efficiency Flexibility vs Efficiency Von Neumann General DSP Flexibility purpose Domain computing specific computing Reconfigurable systems Reconfigurable Computing ASIC Application specific computing Efficiency Reconfigurable Computing 13

  14. Fields of application Fields of application � Rapid prototyping � Post fabrication customization � Multi-modal computing tasks Adaptive computing systems � � Fault tolerance � High performance parallel computing Reconfigurable Computing 14

  15. Rapid Prototyping Rapid Prototyping Testing hardware in real conditions before fabrication � Software simulation � Relatively inexpensive APTIX System Explorer � Slow � Accuracy? � Hardware emulation � Hardware testing under real operation conditions ITALTEL FLEXBENCH � Fast � Accurate � Allow several iterations Reconfigurable Computing 15

  16. Post fabrication customization Post fabrication customization Time to market advantage Manufacturer � Ship the first version of a product � Remote upgrading with new product versions � Remote repairing Reconfigurable Computing 16

  17. Multi- -modal computing tasks modal computing tasks Multi Reconfigurable vehicles, mobile phones, etc.. � Built-in Digital Camera � Video phone service � Games service request � Internet configuration � Navigation system � Emergency � Diagnostics � Different standard and protocols � Monitoring � Entertainment Reconfigurable Computing 17

  18. Adaptive computing systems Adaptive computing systems Computing systems that are able to adapt their behaviour and structure to changing operating and environmental conditions, time-varying optimization objectives, and physical constraints like changing protocols, new standards, or dynamically changing operation conditions of technical systems. Jürgen Teich � Dynamic adaptation to environment � Dynamic adaptation to threats (DARPA) � Extended mission capabilities Reconfigurable Computing 18

  19. Fault tolerance Fault tolerance The RecoNets project at FAU: � Packet-oriented fault detection on communication lines � Detections of defect nodes � Task migration on node failure � Load balancing computation Reconfigurable Computing 19

  20. High performance parallel computing High performance parallel computing Traditional parallel implementation flow 1 1 1 2 3 4 1 2 3 4 Application Application 2 2 3 3 5 4 4 5 6 6 7 7 Physical Topology Virtual Topology Physical Topology Virtual Topology Exploiting reconfigurable topology Application Application 1 1 2 3 2 1 1 4 5 6 7 7 2 2 3 Physical Topology Physical Topology 4 5 6 7 Virtual Topology Virtual Topology Reconfigurable Computing 20

  21. Moore’s Law Moore’s Law Reconfigurable Computing 21

  22. Top View: Field- -Effect Transistor Effect Transistor Top View: Field Reconfigurable Computing 22

  23. The Microprocessor The Microprocessor � 10 years of Moore’s-law progress led to the microprocessor � The second generic component Raised engineers’ productivity � � Problem-solving became programming � Grew to billions of units/year � Stalled progress in design methods for thirty years Reconfigurable Computing 23

  24. The Personal Computer The Personal Computer � 10 years of microprocessor progress led to the PC � Dominated the industry for 20 years � Supply of performance grows with Moore’s law � Demand grows more slowly � Diverging growth in supply and demand leads to the value PC Reconfigurable Computing 24

  25. The Path To The Value PC The Path To The Value PC Reconfigurable Computing 25

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