Quad module development for pixel layer upgrades Katie Dunne - - PowerPoint PPT Presentation

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Jun 03, 2023 127 likes •280 views

Quad module development for pixel layer upgrades Katie Dunne Student Instrumentation Meeting - July 21 2017 FE-I4B Quad Module RD53A arrives September this year Preparation for arrival of RD53A has been building test quad modules using

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Quad module development for pixel layer upgrades

Katie Dunne Student Instrumentation Meeting - July 21 2017

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FE-I4B Quad Module

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RD53A arrives September this year
Preparation for arrival of RD53A has been building test quad

modules using FEI4B

Provides experience with flex circuit board design, module

handling/loading

Baseline power distribution design for HL-LHC is serial power
FE-I4B contains regulators suitable for serial power

distribution (like RD53A)

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Student Instrumentation Meeting Katie Dunne 3 Data Acquisition System

42 mm 36 mm

Quad Module Design

Digital Regulator Analog Regulator Vin Vout

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Shunt-LDO Regulators

Shunt Circuit Internal Resistor External Resistor

8k / 16k Analog / Digital

Fig. FEI4B Integrated Circuit Guide v2.3
Shunt maintains constant current mode by burning excess current
External resistors chosen so that

○ Analog Current = 350 mA ○ Digital Current = 150 mA

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Shunt-LDO Regulators Performance

Measured current fluctuation during front end configuration of one module PrmpVbp GDAC controls analog current - higher PrmpVbp ~ higher analog current FEC shunt circuit not connected Other FEs shunt current up to break down after PrmpVbp ~80

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Quad Module Status

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Name Sensor Functionality Comment

QM_1_Rosencrantz

Dummy (not bump bonded) FEA, FEB, FEC, FED

QM_2_Guildenstern

Dummy (not bump bonded) FEA, FEB, FEC, FED

QM_3_Titania

FEB, FEC, FED

FEA readout errors

QM_4_Oberon

FEA, FEB, FEC, FED

QM_5_Hippolyta

- - -

All FEs readout errors. experimental wire bonding but shouldn’t affect readout

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A B C D Tuning: Quad Module 4

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Minimum Threshold

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All FEs tuned to 1500e Decrement threshold GDAC by 1 Noise Scan Count pixels with Noise hit occupancy > 10-7 Minimum Threshold : <1% of pixels are noisy

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1% of pixels

581 ± 59 e- 1238 ± 42 e- 714 ± 52 e- 531 ± 102 e-

FEA 581 ± 59 e- FEB 1238 ± 42 e- FEC 714 ± 52 e- FED 531 ± 102 e-

Minimum threshold: Lowest GDAC before 1% of pixels are noisy

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Noise Occupancy: QM_1_Rosencrantz (dummy)

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Source Scan

Student Instrumentation Meeting Katie Dunne 11 Bias Voltage: -70V Source: Strontium-90 1.5 hour Self Trigger Scan

70V Bias

2.1V Vin

A B D C

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RD53A Quad and Single Chip Flex

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FEI4B RD53A

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Documentation

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Next Steps: Serial Power

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