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Prototyping Architectural Support for Program Rollback Using FPGAs - - PowerPoint PPT Presentation

Apr 26, 2023 16 likes •239 views

Prototyping Architectural Support for Program Rollback Using FPGAs Radu Teodorescu and Josep Torrellas http://iacoma.cs.uiuc.edu University of Illinois at Urbana - Champaign Motivation Problem: Software bugs major cause of system

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Prototyping Architectural Support for Program Rollback Using FPGAs

Radu Teodorescu and Josep Torrellas http://iacoma.cs.uiuc.edu University of Illinois at Urbana-Champaign

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Motivation

  • Problem:
  • Software bugs – major cause of system failure
  • Production software is hard to debug
  • Continuous debugging is needed
  • Software-based dynamic monitoring tools
  • Can catch a wide range of bugs
  • Orders of magnitude slowdowns

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Motivation

  • Alternative solutions
  • Hardware support for debugging
  • Low overhead
  • Exiting support is still modest
  • Our system:
  • Hardware-assisted, lightweight debugger
  • Monitoring, detection and recovery from bugs in

production systems

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Contributions

  • W

e implemented a hardware prototype of a debugging-aware processor

  • W

e show that simple changes to a general purpose processor can provide powerful debugging primitives

  • W

e run experiments on buggy programs

  • Implementation technology: FPGA
  • Ideal platform for rapid prototyping
  • V

alidate design, measure hardware overheads, run realistic experiments

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Debugging Production Code

  • Applications run in multiple states:
  • Normal
  • Speculative (can be undone)
  • Re-execute
  • T

ransition between states is controlled by software

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Dynamic execution

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

Debugging Production Code

p=m[a[*x]]+&y; ... if(pstate()==REEXEC) num++; num=1; exit_spec(flag);

Rollback

p=m[a[*x]]+&y; ... if(pstate()==REEXEC) { info_collect(); }

Replay

exit_spec(flag); enter_spec();

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Re-execute Normal Speculative

Dynamic execution

num=1; ... p=m[a[*x]]+&y; ... num++;

Original code Instrumented code

num=1; p=m[a[*x]]+&y; ... num++; if(pstate()==REEXEC) { info_collect(); } exit_spec(flag); enter_spec();

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

System Implementation

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

checkpointed state

Hardware Extensions

  • Undo program execution
  • Large code sections
  • Small overhead
  • Software control
  • Lightweight checkpointing
  • Hardware support needed:
  • Register checkpointing
  • Speculative data cache

CPU Data Cache Memory

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Register Checkpointing

  • Needed to allow restoration of processor state
  • Beginning of speculative execution
  • Register file is copied into a shadow register file
  • End of speculative execution
  • Commit: discard checkpoint
  • Rollback: restore registers & PC from checkpoint

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Speculative Data Cache

  • Holds both speculative and non-

speculative data

  • Each line has a “speculative” bit
  • Cache walk: merging or invalidating lines
  • Speculative lines cannot be evicted

TAG SPEC DIRTY

data cache line

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DATA Line A

Data cache CPU

Line B

CPU Rollback

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Software Control

  • Give the compiler control over speculative execution
  • Control instructions:
  • Begin speculation
  • End speculation (commit or rollback)
  • W

e use SPARC’s special access load

  • LDA [r0] code, r1

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Begin Speculative Execution

Data Cache CPU

Cache Controller Register Checkpoiting

begin checkpoint checkpoint done release pipeline 12

Speculative Normal Re-execute

IF ID EX MEM WB

BS BS BS BS BS

STALL!

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Limits

  • Size of the speculative window is affected by:
  • Cache size and associativity - cache overflow
  • I/O operations cannot be rolled back
  • In both cases exceptions are raised
  • Early commit
  • OS intervention: buffer speculative state or I/O

instructions

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

Experiments and Results

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Processor Prototype

  • LEON2 - SPARC V8 compliant processor
  • Single issue, 5-stage pipeline
  • Windowed register file
  • 2-32 sets, 16 registers
  • L1 instruction and data caches
  • 1-4 sets, up to 64KB/set
  • Synthesizable, open source VHDL code

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Experimental Infrastructure

  • System on a chip: PCI, Ethernet and serial interfaces
  • Development tools
  • RTL Simulation - ModelSIM
  • Synthesis - Xilinx ISE 6.1
  • Development board:
  • Xilinx Virtex II XC2V3000, 64 Mbytes SDRAM
  • Linux embedded

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

Deployment

Processor Netlist

J T A G

Binaries Communication Tool

PCI C O M

Output Terminal

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

Hardware Overhead Configurable Logic Blocks

1000 2000 3000 4000 5000 6000 7000 8000 9000 4KB 8KB 16KB 32KB 64KB Data Cache Size CLBs base base+reg_ckpt base+reg_ckpt+spec_cache

ba

Average overhead 4.5%

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Buggy Applications

  • Applications with known bugs
  • Manually instrument the code
  • Detection window contains:
  • bug location
  • bug manifestation
  • Determine if we can roll back the buggy code section
  • Test configuration: 32KB data cache, 4KB instruction

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DETECTION WINDOW bug manifestation bug location

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Radu Teodorescu - University of Illinois Architectural Support for Program Rollback

Buggy Applications

Application Bug Description Successful rollback Dynamic Instructions ncompress-4.2.4 Input file name longer than 1024 bytes corrupts stack return address Yes 10653 polymorph-0.4.0 Input file name longer than 2048 bytes corrupts stack return address No 103838 tar-1.13.25 Unexpected loop bounds causes heap

  • bject overflow

Yes 193 man-1.5h1 Wrong bounds checking causes static

  • bject corruption

Yes 54217 gzip-1.2.4 Input file name longer than 1024 bytes

  • verflows a global variable

Yes 17535

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Architectural Support for Program Rollback Radu Teodorescu - University of Illinois

Conclusions

  • W

e implemented a hardware prototype of a processor with software controlled speculative execution

  • W

e show that simple changes to a general purpose processor can provide powerful debugging primitives

  • Obtained an estimate of the hardware overhead and

run experiments on buggy programs

  • W

e are looking at the integration of our hardware with compiler and operating system support

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Prototyping Architectural Support for Program Rollback Using FPGAs

Radu Teodorescu and Josep Torrellas http://iacoma.cs.uiuc.edu University of Illinois at Urbana-Champaign

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