Prototyping Architectural Support for Program Rollback Using FPGAs - - PowerPoint PPT Presentation

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Prototyping Architectural Support for Program Rollback Using FPGAs - - PowerPoint PPT Presentation

Prototyping Architectural Support for Program Rollback Using FPGAs Radu Teodorescu Josep Torrellas http://iacoma.cs.uiuc.edu University of Illinois Summary Problem Production software is hard to debug Solution Always-on,


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Prototyping Architectural Support for Program Rollback Using FPGAs

Radu Teodorescu Josep Torrellas

http://iacoma.cs.uiuc.edu University of Illinois

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February 17, 2005 WARFP 2005, San Francisco 2

Summary

  • Problem

– Production software is hard to debug

  • Solution

– Always-on, lightweight debugger – Collect info about bug circumstances – Hardware support

  • FPGA platform

– Rapid prototyping – Design validation

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February 17, 2005 WARFP 2005, San Francisco 3

Debugging Production Code

  • Processor runs in two possible modes:

– Normal – Speculative

  • Rollback capability
  • Transition controlled by software

– Special instructions

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February 17, 2005 WARFP 2005, San Francisco 4

Debugging Production Code

non-speculative code begin speculation error-prone code collect info on re-execution end speculation non-speculative code num=a+b; ... begin_spec(); p1=m[a[*x]]+a[m[&y]]; p2=&p1; foo(p2); ... if (rlbk_state) { collect[0]=&p1; collect[1]=&y; } end_spec(flag); num=num+c; ...

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February 17, 2005 WARFP 2005, San Francisco 5

Hardware Support

Purpose New hardware Feedback Performance counters Instructions to mark the speculative section ISA support Restore processor state Register checkpointing Buffer speculative data Speculative cache

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February 17, 2005 WARFP 2005, San Francisco 6

Experimental Infrastructure

Xilinx Virtex II XC2V3000, 64 Mbytes SDRAM Development board Linux embedded Operating System PCI, Ethernet, serial interfaces System on a Chip 1-4 set associative, 1-64KB/set Caches SPARC V8 compliant In-order, single-issue, 5 stage pipeline Open source VHDL, Gaisler Research Baseline processor

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February 17, 2005 WARFP 2005, San Francisco 7

FPGA System Architecture

Processor Bit File Serial PCI J T A G Development Board Xilinx Virtex-II FPGA Config. PROM Boot PROM SDRAM Communication & Control App Binaries FPGA Prgramming Tool Output Terminal

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February 17, 2005 WARFP 2005, San Francisco 8

Ongoing Work

  • Operating system support

– Extend speculation coverage – Kernel debugging

  • Compiler support

– Analysis and instrumentation

  • Extend monitoring counters

– Collect information that can help debugging

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February 17, 2005 WARFP 2005, San Francisco 9

Conclusions

  • We implemented a hardware prototype

for software-controlled speculation

  • Use it to debug production software
  • FPGA platform

– Validate the design – Experiment with real applications, including the Linux kernel – Evaluate hardware overhead

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February 17, 2005 WARFP 2005, San Francisco 10

Prototyping Architectural Support for Program Rollback Using FPGAs

Contact: Radu Teodorescu and Josep Torrellas http://iacoma.cs.uiuc.edu