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PE Refresher Course Digital Systems and Computers Joanne Degroat degroat.1@osu.edu ece.osu.edu/~degroat 3/1/20007 PE Refresher Computer Area - 1 Joanne DeGroat The Basics Basic Switching Algebra Truth Tables of Basic Functions AND

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3/1/20007 PE Refresher Computer Area - Joanne DeGroat 1

PE Refresher Course

Digital Systems and Computers

Joanne Degroat degroat.1@osu.edu ece.osu.edu/~degroat

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3/1/20007 PE Refresher Computer Area - Joanne DeGroat 2

The Basics

Basic Switching Algebra

Truth Tables of Basic Functions AND and OR

A B C=A+B 1 1 1 1 1 1 1 OR A B C=A*B 1 1 1 1 1 AND

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The Basics (cont)

Inversion – The not or

inverter gate

Exclusive OR - XOR

A B Χ=Α ⊕ Β 1 1 1 1 1 1 XOR - exclusive OR

A A 1 1 NOT - inversion

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And two other common gates

The NAND – NOT AND The NOR – NOT OR

A B C=A*B 1 1 1 1 1 NAND

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Some Basic Theorems

A+0 = A A+1 = 1 A+B = B+A A+BC = (A+B)(A+C) A+A’ = 1 A+AB = A A1 = A A0 = 0 AB = BA A(B+C) = AB+AC A*A’ = 0 A(A+B) = A

Equality Identity Commutative Distributive Involution Absorption

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More Theorems

A+AB = A + B

A(Α + B) = AB

(A + B) = AB

(AB) = A + B

A*A = A

A + A = A

(A) = A AB + AC + BC = AB + AC Dual:

(A+B)(A+C)(B+C) = (A+B)(A+C)

DeMorgan’s Law

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Truth Tables

A B A+B 1 1 1 1 1 1 Proof of DeMorgan's Law 1 1 1 (A+B) 1 A B 1 1 1 A*B = Truth tables can be used to prove equalities

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Venn Diagram and Karnaugh Maps

A=1 B=1 C=1 000 001 010

011

100

101 110 111

00 01 11 10 1 A B C

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Function Simplification

f(a,b,c) = ab + bc + abc Simplify using Karnaugh map

Start with each term

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Function Simplification

f(a,b,c) = ab + bc + abc

A term with a Single element results In 4 ones A term with 2 elements Gives two A term with 3 elements Gives a single 1

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Simplify K maps

Conbining the previous three maps Can represent what a K map shows by a sum

f products

Take the largest group possible

On one line, a square, two
Group needs to be a
power of 2

00 01 11 10 1 A 1 1 1 1 1 BC

f(a,b,c) = a + bc

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4 variable functions

Also expressed in minterm notation f(a,b,c,d) = Σm(7,13,14,15)

So function is a 1 when abcd = 0111 (7)

1101 (13) 1110 (14) 1111 (15) 00 01 11 10 AB 1 1

1 1 CD 00 01 11 10

2 3 5 6 7 4 13 14 15 12 9 10 11 8

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Form into largest groups

For 4 variables form

into groups of

16 – function would be a

0 or a 1

8 – 1 variable
4 – 2 variables
2 – 3 variables

Simplifies to

F = ABD + BCD + ABC

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Another Example of function simplification

From a Truth Table Step 1 – map to

K- maps

x y z F1 F2 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1

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Step 2 – Generate simplified equation

For F1 For f2

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Example Problem

Design a circuit having 1 output Z and 4

inputs A B C D which represents a BCD number, such that Z = 1 if the BCD number is greater than 5.

BCD stands for binary coded decimal

Takes 4 binary digits
Only 0 through 9 are used

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Map onto K map

Fill in a 1 whenever

utput should be a 1

Here that would be 6,

7, 8 or 9

And a 0 for blocks 0

through 5

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The K map cont

Filled in What should other

blocks be?

They would be don’t

cares as in BCD notation they will never occur

And final K map for

simplification is

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Simplified using don’t cares

Form the largest power

f 2 grouping from 1’s

and don’t cares

Cover all the 1’s but

don’t need to cover all the don’t cares

Get Z = A + BC Gate implementation

1 2 3 5 6 7 4 13 14 15 12 9 10 11 8

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PLAs

PLA – Programmable

Logic Array

PAL – Programmable

Array Logic – much like a PLA but restricted connections

Formed of an AND

plane and an OR plane

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PLAs

PLA – Programmable

Logic Array

PAL – Programmable

Array Logic – much like a PLA but restricted connections

Formed of an AND

plane and an OR plane

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PLA example

Problem: A sequence box to control

automatic starting of a jet engine is to be

designed. It has the following signals

Problem stated on next slide.

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Problem statement

xx

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Problem statement translated to a table

The table

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K maps for the sequencer

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The logic implementation in gates

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And a PLA implementation

You will most like be asked for this in a

table representation form like this

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The PLA

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Basic Sequential Logic

Flip Flops Set Reset FF

Q*=S+R’Q

Toggle FF

Q*=Q’
Q* is next value
Or next state

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Basic Sequential Logic

D F/F

Q* = D

JK F/F

Q*=JQ’+K’Q

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A Simple up/down counter

Start with a state

diagram

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A Simple up/down counter

Start with a state diagram And a state table for T F/Fs

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K Maps for the toggle F/Fs

T1 = x’y2 + x y2’ = x xor y2 T2 = 1

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Implementation

Q Q

SET CLR

Q Q

SET CLR

PE Refresher Course

Digital Systems and Computers

Joanne Degroat degroat.1@osu.edu ece.osu.edu/~degroat

The Basics

The Basics (cont)

inverter gate

And two other common gates

Some Basic Theorems

A+0 = A A+1 = 1 A+B = B+A A+BC = (A+B)(A+C) A+A’ = 1 A+AB = A A*1 = A A*0 = 0 A*B = B*A A(B+C) = AB+AC A*A’ = 0 A(A+B) = A

More Theorems

A+AB = A + B

A(Α + B) = AB

(A + B) = AB

(AB) = A + B

A*A = A

A + A = A

(A) = A AB + AC + BC = AB + AC Dual:

(A+B)(A+C)(B+C) = (A+B)(A+C)

Truth Tables

A B A+B 1 1 1 1 1 1 Proof of DeMorgan's Law 1 1 1 (A+B) 1 A B 1 1 1 A*B = Truth tables can be used to prove equalities

Venn Diagram and Karnaugh Maps

A=1 B=1 C=1 000 001 010

100

00 01 11 10 1 A B C

Function Simplification

f(a,b,c) = ab + bc + abc Simplify using Karnaugh map

Start with each term

Function Simplification

f(a,b,c) = ab + bc + abc

A term with a Single element results In 4 ones A term with 2 elements Gives two A term with 3 elements Gives a single 1

Simplify K maps

Conbining the previous three maps Can represent what a K map shows by a sum

Take the largest group possible

00 01 11 10 1 A 1 1 1 1 1 BC

f(a,b,c) = a + bc

4 variable functions

1101 (13) 1110 (14) 1111 (15) 00 01 11 10 AB 1 1

1 1 CD 00 01 11 10

Form into largest groups

into groups of

0 or a 1

Another Example of function simplification

K- maps

Step 2 – Generate simplified equation

Example Problem

Design a circuit having 1 output Z and 4

inputs A B C D which represents a BCD number, such that Z = 1 if the BCD number is greater than 5.

BCD stands for binary coded decimal

Map onto K map

7, 8 or 9

through 5

The K map cont

blocks be?

cares as in BCD notation they will never occur

simplification is

Simplified using don’t cares

and don’t cares

don’t need to cover all the don’t cares

PLAs

Logic Array

Array Logic – much like a PLA but restricted connections

plane and an OR plane

PLAs

Logic Array

Array Logic – much like a PLA but restricted connections

plane and an OR plane

PLA example

Problem: A sequence box to control

automatic starting of a jet engine is to be

Problem stated on next slide.

Problem statement

xx

Problem statement translated to a table

The table

K maps for the sequencer

The logic implementation in gates

And a PLA implementation

You will most like be asked for this in a

table representation form like this

The PLA

A+0 = A A+1 = 1 A+B = B+A A+BC = (A+B)(A+C) A+A’ = 1 A+AB = A A1 = A A0 = 0 AB = BA A(B+C) = AB+AC A*A’ = 0 A(A+B) = A