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Compiler Development (CMPSC 401) Code Optimization Janyl Jumadinova April 15, 2019 Janyl Jumadinova Compiler Development (CMPSC 401) April 15, 2019 1 / 56 Code Optimization Goal: Optimize generated code by exploiting machine-dependent

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Compiler Development (CMPSC 401)

Code Optimization Janyl Jumadinova April 15, 2019

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Code Optimization

Goal: Optimize generated code by exploiting machine-dependent properties not visible at the IR level.

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Code Optimization

Goal: Optimize generated code by exploiting machine-dependent properties not visible at the IR level.

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Code Optimization

Goal: Optimize generated code by exploiting machine-dependent properties not visible at the IR level. Critical step in most compilers, but often very messy. Techniques developed for one machine may be completely useless on another. Techniques developed for one language may be completely useless with another.

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Machine Code

ARM vs. Intel’s x86 ARM has an advantage in terms of power consumption, making it attractive for all sorts of battery operated devices.

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x86 Overview

Address space: 232 Data types: – 8,16,32,64 bit int, signed and unsigned – 32 and 64-bit floating point – Binary coded decimal – 64,128,256 bit vectors of integers/floats

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x86 Registers Overview

16-bit integer registers General purpose (with exceptions): AX, BX, CX, DX Pointer registers: SP (Stack pointer), BP (Base Pointer) For array indexing: DI, SI Segment registers: CS, DS, SS, ES (legacy) FLAGS register to store flags, e.g. CF, OF, ZF Instruction Pointer: IP

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For instructions see Intel Software developers manual “The x86 isn’t all that complex... it just doesn’t make a lot of sense” Mike Johnson, AMD, 1994

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Code Optimization

Goal: Optimize generated code by exploiting machine-dependent properties not visible at the IR level.

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Processor Pipelines

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Instruction Scheduling

Because of processor pipelining, the order in which instructions are executed can impact performance. Instruction scheduling is the reordering or insertion of machine instructions to increase performance. All good optimizing compilers have some sort of instruction scheduling support.

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Data Dependencies

A data dependency in machine code is a set of instructions whose behavior depends on one another. Intuitively, a set of instructions that cannot be reordered around each

  • ther.

Three types of data dependencies:

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Finding Data Dependencies

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Finding Data Dependencies

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Finding Data Dependencies

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Data Dependencies

The graph of the data dependencies in a basic block is called the data dependency graph.

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Data Dependencies

The graph of the data dependencies in a basic block is called the data dependency graph. Always a directed acyclic graph: Directed : One instruction depends on the other. Acyclic : No circular dependencies allowed. Can schedule instructions in a basic block in any order as long we never schedule a node before all its parents.

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Data Dependencies

The graph of the data dependencies in a basic block is called the data dependency graph. Always a directed acyclic graph: Directed : One instruction depends on the other. Acyclic : No circular dependencies allowed. Can schedule instructions in a basic block in any order as long we never schedule a node before all its parents. Idea : Do a topological sort of the data dependency graph and

  • utput instructions in that order.

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Instruction Scheduling

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Instruction Scheduling

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Instruction Scheduling

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Small Problem

There can be many valid topological orderings of a data dependency graph. How do we pick one that works well with the pipeline? In general, finding the fastest instruction schedule is known to be NP-hard. Heuristics are used in practice:

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Small Problem

There can be many valid topological orderings of a data dependency graph. How do we pick one that works well with the pipeline? In general, finding the fastest instruction schedule is known to be NP-hard. Heuristics are used in practice:

Schedule instructions that can run to completion without interference before instructions that cause interference. Schedule instructions with more dependants before instructions with fewer dependants.

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More Advanced Scheduling

Modern optimizing compilers can do far more aggressive scheduling to obtain impressive performance gains. Loop unrolling

  • Expand out several loop iterations at once.
  • Use previous algorithm to schedule instructions more intelligently.

Can find pipelining-level parallelism across loop iterations.

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More Advanced Scheduling

Modern optimizing compilers can do far more aggressive scheduling to obtain impressive performance gains. Loop unrolling

  • Expand out several loop iterations at once.
  • Use previous algorithm to schedule instructions more intelligently.

Can find pipelining-level parallelism across loop iterations. Software pipelining

  • Loop unrolling on steroids; can convert loops using tens of cycles

into loops averaging two or three cycles.

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Memory Caches

Because computers use different types of memory, there are a variety

  • f memory caches in the machine.

Caches are designed to anticipate common use patterns. Compilers often have to rewrite code to take maximal advantage of these designs.

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Locality

Empirically, many programs exhibit temporal locality and spatial locality.

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Locality

Empirically, many programs exhibit temporal locality and spatial locality. Temporal locality: Memory read recently is likely to be read again. Spatial locality: Memory read recently will likely have nearby objects read as well. Most memory caches are designed to exploit temporal and spatial locality by

  • Holding recently-used memory addresses in cache.
  • Loading nearby memory addresses into cache.

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Memory Caches

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Memory Caches

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Memory Caches

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Memory Caches

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Memory Caches

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Memory Caches

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Memory Caches

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Improving Locality

Programmers frequently write code without understanding the locality implications. Languages don’t expose low-level memory details. Some compilers are capable of rewriting code to take advantage of locality.

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Improving Locality

Programmers frequently write code without understanding the locality implications. Languages don’t expose low-level memory details. Some compilers are capable of rewriting code to take advantage of locality. Loop reordering. Structure peeling.

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Loop Reordering

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Loop Reordering

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Loop Reordering

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Loop Reordering

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Loop Reordering

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Loop Reordering

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Structure Peeling

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Summary

Instruction scheduling optimizations try to take advantage of the processor pipeline. Locality optimizations try to take advantage of cache behavior. Parallelism optimizations try to take advantage of multi-core machines. There are many more optimizations out there!

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Where we have been

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Where we have been

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Why Study Compilers?

Build a large, ambitious software system. See theory come to life. Learn how programming languages work. Learn tradeoffs in language design.

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