Overview of Assembly Language Chapter 9 S. Dandamudi Outline - - PowerPoint PPT Presentation

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Overview of Assembly Language Chapter 9 S. Dandamudi Outline - - PowerPoint PPT Presentation

Overview of Assembly Language Chapter 9 S. Dandamudi Outline Assembly language Overview of assembly statements language instructions Arithmetic Data allocation Conditional Where are the operands? Logical


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SLIDE 1

Overview of Assembly Language

Chapter 9

  • S. Dandamudi
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To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 2

Outline

  • Assembly language

statements

  • Data allocation
  • Where are the operands?

∗ Addressing modes

» Register » Immediate » Direct » Indirect

  • Data transfer instructions

∗ mov, xchg, and xlat ∗ PTR directive

  • Overview of assembly

language instructions

∗ Arithmetic ∗ Conditional ∗ Logical ∗ Shift ∗ Rotate

  • Defining constants

∗ EQU and = directives

  • Macros
  • Illustrative examples
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 S. Dandamudi Chapter 9: Page 3

Assembly Language Statements

  • Three different classes

∗ Instructions

» Tell CPU what to do » Executable instructions with an op-code

∗ Directives (or pseudo-ops)

» Provide information to assembler on various aspects of the assembly process » Non-executable – Do not generate machine language instructions

∗ Macros

» A shorthand notation for a group of statements » A sophisticated text substitution mechanism with parameters

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 S. Dandamudi Chapter 9: Page 4

Assembly Language Statements (cont’d)

  • Assembly language statement format:

[label] mnemonic [operands] [;comment]

∗ Typically one statement per line ∗ Fields in [ ] are optional ∗ label serves two distinct purposes:

» To label an instruction – Can transfer program execution to the labeled instruction » To label an identifier or constant

∗ mnemonic identifies the operation (e.g., add, or) ∗ operands specify the data required by the operation

» Executable instructions can have zero to three operands

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 S. Dandamudi Chapter 9: Page 5

Assembly Language Statements (cont’d)

∗ comments

» Begin with a semicolon (;) and extend to the end of the line

Examples

repeat: inc result ; increment result CR EQU 0DH ; carriage return character

  • White space can be used to improve readability

repeat: inc result

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 S. Dandamudi Chapter 9: Page 6

Data Allocation

  • Variable declaration in a high-level language such

as C

char response int value float total double average_value

specifies

» Amount storage required (1 byte, 2 bytes, …) » Label to identify the storage allocated (response, value, …) » Interpretation of the bits stored (signed, floating point, …) – Bit pattern 1000 1101 1011 1001 is interpreted as −29,255 as a signed number 36,281 as an unsigned number

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 S. Dandamudi Chapter 9: Page 7

Data Allocation (cont’d)

  • In assembly language, we use the define directive

∗ Define directive can be used

» To reserve storage space » To label the storage space » To initialize » But no interpretation is attached to the bits stored – Interpretation is up to the program code

∗ Define directive goes into the .DATA part of the assembly language program

  • Define directive format

[var-name] D? init-value [,init-value],...

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 S. Dandamudi Chapter 9: Page 8

Data Allocation (cont’d)

  • Five define directives

DB Define Byte ;allocates 1 byte DW Define Word ;allocates 2 bytes DD Define Doubleword ;allocates 4 bytes DQ Define Quadword ;allocates 8 bytes DT Define Ten bytes ;allocates 10 bytes

Examples

sorted DB ’y’ response DB ? ;no initialization value DW 25159 float1 DD 1.234 float2 DQ 123.456

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 S. Dandamudi Chapter 9: Page 9

Data Allocation (cont’d)

  • Multiple definitions can be abbreviated

Example

message DB ’B’ DB ’y’ DB ’e’ DB 0DH DB 0AH can be written as message DB ’B’,’y’,’e’,0DH,0AH

  • More compactly as

message DB ’Bye’,0DH,0AH

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 S. Dandamudi Chapter 9: Page 10

Data Allocation (cont’d)

  • Multiple definitions can be cumbersome to

initialize data structures such as arrays Example

To declare and initialize an integer array of 8 elements marks DW 0,0,0,0,0,0,0,0

  • What if we want to declare and initialize to zero

an array of 200 elements?

∗ There is a better way of doing this than repeating zero 200 times in the above statement

» Assembler provides a directive to do this (DUP directive)

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 S. Dandamudi Chapter 9: Page 11

Data Allocation (cont’d)

  • Multiple initializations

∗ The DUP assembler directive allows multiple initializations to the same value ∗ Previous marks array can be compactly declared as marks DW 8 DUP (0)

Examples

table1 DW 10 DUP (?) ;10 words, uninitialized message DB 3 DUP (’Bye!’) ;12 bytes, initialized ; as Bye!Bye!Bye! Name1 DB 30 DUP (’?’) ;30 bytes, each ; initialized to ?

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 S. Dandamudi Chapter 9: Page 12

Data Allocation (cont’d)

  • The DUP directive may also be nested

Example

stars DB 4 DUP(3 DUP (’*’),2 DUP (’?’),5 DUP (’!’))

Reserves 40-bytes space and initializes it as ***??!!!!!***??!!!!!***??!!!!!***??!!!!!

Example

matrix DW 10 DUP (5 DUP (0)) defines a 10X5 matrix and initializes its elements to 0 This declaration can also be done by matrix DW 50 DUP (0)

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 S. Dandamudi Chapter 9: Page 13

Data Allocation (cont’d)

Symbol Table

∗ Assembler builds a symbol table so we can refer to the allocated storage space by the associated label

Example

.DATA

name

  • ffset

value DW 0 value sum DD 0 sum 2 marks DW 10 DUP (?) marks 6 message DB ‘The grade is:’,0 message 26 char1 DB ? char1 40

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 S. Dandamudi Chapter 9: Page 14

Data Allocation (cont’d)

Correspondence to C Data Types

Directive C data type DB char DW int, unsigned DD float, long DQ double DT internal intermediate float value

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 S. Dandamudi Chapter 9: Page 15

Data Allocation (cont’d)

LABEL Directive

∗ LABEL directive provides another way to name a memory location ∗ Format: name LABEL type

type can be BYTE 1 byte WORD 2 bytes DWORD 4 bytes QWORD 8 bytes TWORD 10 bytes

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 S. Dandamudi Chapter 9: Page 16

Data Allocation (cont’d)

LABEL Directive Example

.DATA count LABEL WORD Lo-count DB 0 Hi_count DB 0 .CODE ... mov Lo_count,AL mov Hi_count,CL

∗ count refers to the 16-bit value ∗ Lo_count refers to the low byte ∗ Hi_count refers to the high byte

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 S. Dandamudi Chapter 9: Page 17

Where Are the Operands?

  • Operands required by an operation can be

specified in a variety of ways

  • A few basic ways are:

∗ operand in a register

– register addressing mode

∗ operand in the instruction itself

– immediate addressing mode

∗ operand in memory

– variety of addressing modes direct and indirect addressing modes

∗ operand at an I/O port

– discussed in Chapter 19

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 S. Dandamudi Chapter 9: Page 18

Where Are the Operands? (cont’d)

Register addressing mode ∗ Operand is in an internal register Examples

mov EAX,EBX ; 32-bit copy mov BX,CX ; 16-bit copy mov AL,CL ; 8-bit copy ∗ The mov instruction mov destination,source copies data from source to destination

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 S. Dandamudi Chapter 9: Page 19

Where Are the Operands? (cont’d)

Register addressing mode (cont’d)

∗ Most efficient way of specifying an operand

» No memory access is required

∗ Instructions using this mode tend to be shorter

» Fewer bits are needed to specify the register

  • Compilers use this mode to optimize code

total := 0 for (i = 1 to 400) total = total + marks[i] end for ∗ Mapping total and i to registers during the for loop optimizes the code

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 S. Dandamudi Chapter 9: Page 20

Where Are the Operands? (cont’d)

Immediate addressing mode

∗ Data is part of the instruction

» Ooperand is located in the code segment along with the instruction » Efficient as no separate operand fetch is needed » Typically used to specify a constant

Example

mov AL,75 ∗ This instruction uses register addressing mode for destination and immediate addressing mode for the source

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Where Are the Operands? (cont’d)

Direct addressing mode

∗ Data is in the data segment

» Need a logical address to access data – Two components: segment:offset » Various addressing modes to specify the offset component – offset part is called effective address

∗ The offset is specified directly as part of instruction ∗ We write assembly language programs using memory labels (e.g., declared using DB, DW, LABEL,...)

» Assembler computes the offset value for the label – Uses symbol table to compute the offset of a label

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 S. Dandamudi Chapter 9: Page 22

Where Are the Operands? (cont’d)

Direct addressing mode (cont’d) Examples

mov AL,response

» Assembler replaces response by its effective address (i.e., its

  • ffset value from the symbol table)

mov table1,56

» table1 is declared as table1 DW 20 DUP (0) » Since the assembler replaces table1 by its effective address, this instruction refers to the first element of table1 – In C, it is equivalent to table1[0] = 56

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Where Are the Operands? (cont’d)

Direct addressing mode (cont’d)

  • Problem with direct addressing

∗ Useful only to specify simple variables ∗ Causes serious problems in addressing data types such as arrays

» As an example, consider adding elements of an array – Direct addressing does not facilitate using a loop structure to iterate through the array – We have to write an instruction to add each element of the array

  • Indirect addressing mode remedies this problem
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Where Are the Operands? (cont’d)

Indirect addressing mode

  • The offset is specified indirectly via a register

∗ Sometimes called register indirect addressing mode ∗ For 16-bit addressing, the offset value can be in one of the three registers: BX, SI, or DI ∗ For 32-bit addressing, all 32-bit registers can be used

Example

mov AX,[BX] ∗ Square brackets [ ] are used to indicate that BX is holding an offset value

» BX contains a pointer to the operand, not the operand itself

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Where Are the Operands? (cont’d)

  • Using indirect addressing mode, we can process

arrays using loops Example: Summing array elements

∗ Load the starting address (i.e., offset) of the array into BX ∗ Loop for each element in the array

» Get the value using the offset in BX – Use indirect addressing » Add the value to the running total » Update the offset in BX to point to the next element of the array

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Where Are the Operands? (cont’d)

Loading offset value into a register

  • Suppose we want to load BX with the offset value
  • f table1
  • We cannot write

mov BX,table1

  • Two ways of loading offset value

» Using OFFSET assembler directive – Executed only at the assembly time » Using lea instruction – This is a processor instruction – Executed at run time

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Where Are the Operands? (cont’d)

Loading offset value into a register (cont’d)

  • Using OFFSET assembler directive

∗ The previous example can be written as mov BX,OFFSET table1

  • Using lea (load effective address) instruction

∗ The format of lea instruction is lea register,source ∗ The previous example can be written as lea BX,table1

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Where Are the Operands? (cont’d)

Loading offset value into a register (cont’d) Which one to use -- OFFSET or lea?

∗ Use OFFSET if possible

» OFFSET incurs only one-time overhead (at assembly time) » lea incurs run time overhead (every time you run the program)

∗ May have to use lea in some instances

» When the needed data is available at run time only – An index passed as a parameter to a procedure » We can write lea BX,table1[SI] to load BX with the address of an element of table1 whose index is in SI register » We cannot use the OFFSET directive in this case

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Default Segments

  • In register indirect addressing mode

∗ 16-bit addresses

» Effective addresses in BX, SI, or DI is taken as the offset into the data segment (relative to DS) » For BP and SP registers, the offset is taken to refer to the stack segment (relative to SS)

∗ 32-bit addresses

» Effective address in EAX, EBX, ECX, EDX, ESI, and EDI is relative to DS » Effective address in EBP and ESP is relative to SS

∗ push and pop are always relative to SS

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Default Segments (cont’d)

  • Default segment override

∗ Possible to override the defaults by using override prefixes

» CS, DS, SS, ES, FS, GS

∗ Example 1

» We can use

add AX,SS:[BX]

to refer to a data item on the stack

∗ Example 2

» We can use

add AX,DS:[BP]

to refer to a data item in the data segment

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Data Transfer Instructions

  • We will look at three instructions

∗ mov (move)

» Actually copy

∗ xchg (exchange)

» Exchanges two operands

∗ xlat (translate)

» Translates byte values using a translation table

  • Other data transfer instructions such as

movsx (move sign extended) movzx (move zero extended) are discussed in Chapter 12

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Data Transfer Instructions (cont’d)

The mov instruction

∗ The format is mov destination,source

» Copies the value from source to destination

» source is not altered as a result of copying

» Both operands should be of same size

» source and destination cannot both be in memory

– Most Pentium instructions do not allow both operands to be located in memory – Pentium provides special instructions to facilitate memory-to-memory block copying of data

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Data Transfer Instructions (cont’d)

The mov instruction

∗ Five types of operand combinations are allowed: Instruction type Example

mov register,register mov DX,CX mov register,immediate mov BL,100 mov register,memory mov BX,count mov memory,register mov count,SI mov memory,immediate mov count,23

∗ The operand combinations are valid for all instructions that require two operands

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Data Transfer Instructions (cont’d)

Ambiguous moves: PTR directive

  • For the following data definitions

.DATA table1 DW 20 DUP (0) status DB 7 DUP (1) the last two mov instructions are ambiguous mov BX,OFFSET table1 mov SI,OFFSET status mov [BX],100 mov [SI],100 ∗ Not clear whether the assembler should use byte or word equivalent of 100

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Data Transfer Instructions (cont’d)

Ambiguous moves: PTR directive

  • The PTR assembler directive can be used to

clarify

  • The last two mov instructions can be written as

mov WORD PTR [BX],100 mov BYTE PTR [SI],100

∗ WORD and BYTE are called type specifiers

  • We can also use the following type specifiers:

DWORD for doubleword values QWORD for quadword values TWORD for ten byte values

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 S. Dandamudi Chapter 9: Page 36

Data Transfer Instructions (cont’d)

The xchg instruction

  • The syntax is

xchg operand1,operand2

Exchanges the values of operand1 and operand2

Examples

xchg EAX,EDX xchg response,CL xchg total,DX

  • Without the xchg instruction, we need a

temporary register to exchange values using only the mov instruction

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 S. Dandamudi Chapter 9: Page 37

Data Transfer Instructions (cont’d)

The xchg instruction

  • The xchg instruction is useful for conversion of

16-bit data between little endian and big endian forms

∗ Example: mov AL,AH converts the data in AX into the other endian form

  • Pentium provides bswap instruction to do similar

conversion on 32-bit data

bswap 32-bit register

∗ bswap works only on data located in a 32-bit register

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Data Transfer Instructions (cont’d)

The xlat instruction

  • The xlat instruction translates bytes
  • The format is

xlatb

  • To use xlat instruction

» BX should be loaded with the starting address of the translation table » AL must contain an index in to the table – Index value starts at zero » The instruction reads the byte at this index in the translation table and stores this value in AL – The index value in AL is lost » Translation table can have at most 256 entries (due to AL)

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Data Transfer Instructions (cont’d)

The xlat instruction Example: Encrypting digits

Input digits: 0 1 2 3 4 5 6 7 8 9 Encrypted digits: 4 6 9 5 0 3 1 8 7 2 .DATA xlat_table DB ’4695031872’ ... .CODE mov BX,OFFSET xlat_table GetCh AL sub AL,’0’ ; converts input character to index xlatb ; AL = encrypted digit character PutCh AL ...

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Pentium Assembly Instructions

  • Pentium provides several types of instructions
  • Brief overview of some basic instructions:

∗ Arithmetic instructions ∗ Jump instructions ∗ Loop instruction ∗ Logical instructions ∗ Shift instructions ∗ Rotate instructions

  • These instructions allow you to write reasonable

assembly language programs

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Arithmetic Instructions

INC and DEC instructions

∗ Format:

inc destination dec destination

∗ Semantics:

destination = destination +/- 1 » destination can be 8-, 16-, or 32-bit operand, in memory

  • r register

No immediate operand

  • Examples

inc BX dec value

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Arithmetic Instructions (cont’d)

Add instructions

∗ Format:

add destination,source

∗ Semantics:

destination = destination + source

  • Examples

add EBX,EAX add value,35

∗ inc EAX is better than add EAX,1

– inc takes less space – Both execute at about the same speed

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Arithmetic Instructions (cont’d)

Add instructions

∗ Addition with carry ∗ Format:

adc destination,source

∗ Semantics:

destination = destination + source + CF

  • Example: 64-bit addition

add EAX,ECX ; add lower 32 bits adc EBX,EDX ; add upper 32 bits with carry

∗ 64-bit result in EBX:EAX

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Arithmetic Instructions (cont’d)

Subtract instructions

∗ Format:

sub destination,source

∗ Semantics:

destination = destination - source

  • Examples

sub EBX,EAX sub value,35

∗ dec EAX is better than sub EAX,1

– dec takes less space – Both execute at about the same speed

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Arithmetic Instructions (cont’d)

Subtract instructions

∗ Subtract with borrow ∗ Format:

sbb destination,source

∗ Semantics:

destination = destination - source - CF

∗ Like the adc, sbb is useful in dealing with more than 32-bit numbers

  • Negation

neg destination

∗ Semantics:

destination = 0 - destination

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Arithmetic Instructions (cont’d)

CMP instruction

∗ Format:

cmp destination,source

∗ Semantics:

destination - source

∗ destination and source are not altered ∗ Useful to test relationship (>, =) between two operands ∗ Used in conjunction with conditional jump instructions for decision making purposes

  • Examples

cmp EBX,EAX cmp count,100

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Unconditional Jump

∗ Format:

jmp label

∗ Semantics:

» Execution is transferred to the instruction identified by label

  • Target can be specified in one of two ways

∗ Directly

» In the instruction itself

∗ Indirectly

» Through a register or memory » Discussed in Chapter 12

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Unconditional Jump (cont’d)

Example

  • Two jump instructions

∗ Forward jump

jmp CX_init_done

∗ Backward jump

jmp repeat1

  • Programmer specifies

target by a label

  • Assembler computes the
  • ffset using the symbol

table

. . . mov CX,10 jmp CX_init_done init_CX_20: mov CX,20 CX_init_done: mov AX,CX repeat1: dec CX . . . jmp repeat1 . . .

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Unconditional Jump (cont’d)

  • Address specified in the jump instruction is not the

absolute address

∗ Uses relative address

» Specifies relative byte displacement between the target instruction and the instruction following the jump instruction » Displacement is w.r.t the instruction following jmp – Reason: IP points to this instruction after reading jump

∗ Execution of jmp involves adding the displacement value to current IP ∗ Displacement is a signed 16-bit number

» Negative value for backward jumps » Positive value for forward jumps

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Target Location

  • Inter-segment jump

∗ Target is in another segment

CS = target-segment (2 bytes) IP = target-offset (2 bytes) » Called far jumps (needs five bytes to encode jmp)

  • Intra-segment jumps

∗ Target is in the same segment

IP = IP + relative-displacement (1 or 2 bytes)

∗ Uses 1-byte displacement if target is within −128 to +127

» Called short jumps (needs two bytes to encode jmp)

∗ If target is outside this range, uses 2-byte displacement

» Called near jumps (needs three bytes to encode jmp)

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Target Location (cont’d)

  • In most cases, the assembler can figure out the type
  • f jump

∗ For backward jumps, assembler can decide whether to use the short jump form or not

  • For forward jumps, it needs a hint from the

programmer

∗ Use SHORT prefix to the target label ∗ If such a hint is not given

» Assembler reserves three bytes for jmp instruction » If short jump can be used, leaves one byte of nop (no operation) – See the next example for details

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 S. Dandamudi Chapter 9: Page 52

Example

. . . 8 0005 EB 0C jmp SHORT CX_init_done 0013 - 0007 = 0C 9 0007 B9 000A mov CX,10 10 000A EB 07 90 jmp CX_init_done nop 0013 - 000D = 07 11 init_CX_20: 12 000D B9 0014 mov CX,20 13 0010 E9 00D0 jmp near_jump 00E3 - 0013 = D0 14 CX_init_done: 15 0013 8B C1 mov AX,CX

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SLIDE 53

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To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 53

Example (cont’d)

16 repeat1: 17 0015 49 dec CX 18 0016 EB FD jmp repeat1 0015 - 0018 = -3 = FDH . . . 84 00DB EB 03 jmp SHORT short_jump 00E0 - 00DD = 3 85 00DD B9 FF00 mov CX, 0FF00H 86 short_jump: 87 00E0 BA 0020 mov DX, 20H 88 near_jump: 89 00E3 E9 FF27 jmp init_CX_20 000D - 00E6 = -217 = FF27H

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SLIDE 54

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 54

Conditional Jumps (cont’d)

Format:

j<cond> lab – Execution is transferred to the instruction identified by label only if <cond> is met

  • Example: Testing for carriage return

read_char: . . . cmp AL,0DH ; 0DH = ASCII carriage return je CR_received inc CL jmp read_char . . . CR_received:

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SLIDE 55

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 55

Conditional Jumps (cont’d)

∗ Some conditional jump instructions

– Treats operands of the CMP instruction as signed numbers

je jump if equal jg jump if greater jl jump if less jge jump if greater or equal jle jump if less or equal jne jump if not equal

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SLIDE 56

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 56

Conditional Jumps (cont’d)

∗ Conditional jump instructions can also test values of the individual flags jz jump if zero (i.e., if ZF = 1) jnz jump if not zero (i.e., if ZF = 0) jc jump if carry (i.e., if CF = 1) jnc jump if not carry (i.e., if CF = 0) ∗ jz is synonymous for je ∗ jnz is synonymous for jne

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SLIDE 57

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 57

A Note on Conditional Jumps

target: . . . cmp AX,BX je target mov CX,10 . . . traget is out of range for a short jump

  • Use this code to get around

target: . . . cmp AX,BX jne skip1 jmp target skip1: mov CX,10 . . .

  • All conditional jumps are encoded using 2 bytes

∗ Treated as short jumps

  • What if the target is outside this range?
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SLIDE 58

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 58

Loop Instructions

Unconditional loop instruction

∗ Format:

loop target

∗ Semantics:

» Decrements CX and jumps to target if CX ≠ 0 – CX should be loaded with a loop count value

  • Example: Executes loop body 50 times

mov CX,50 repeat: <loop body> loop repeat ...

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SLIDE 59

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 59

Loop Instructions (cont’d)

  • The previous example is equivalent to

mov CX,50 repeat: <loop body> dec CX jnz repeat ...

∗ Surprisingly,

dec CX jnz repeat

executes faster than

loop repeat

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SLIDE 60

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 60

Loop Instructions (cont’d)

  • Conditional loop instructions

∗ loope/loopz

» Loop while equal/zero

CX = CX – 1 ff (CX = 0 and ZF = 1) jump to target ∗ loopne/loopnz

» Loop while not equal/not zero

CX = CX – 1 ff (CX = 0 and ZF = 0) jump to target

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SLIDE 61

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 61

Logical Instructions

∗ Format: and destination,source

  • r destination,source

xor destination,source not destination ∗ Semantics:

» Performs the standard bitwise logical operations – result goes to destination

∗ test is a non-destructive and instruction

test destination,source

∗ Performs logical AND but the result is not stored in destination (like the CMP instruction)

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SLIDE 62

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 62

Logical Instructions (cont’d)

Example:

. . . and AL,01H ; test the least significant bit jz bit_is_zero <bit 1 code> jmp skip1 bit_is_zero: <bit 0 code> skip1: . . .

  • test instruction is better in place of and
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SLIDE 63

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 63

Shift Instructions

  • Two types of shifts

» Logical » Arithmetic ∗ Logical shift instructions Shift left shl destination,count shl destination,CL Shift right shr destination,count shr destination,CL ∗ Semantics: » Performs left/right shift of destination by the value in count or CL register

– CL register contents are not altered

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SLIDE 64

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 64

Shift Instructions (cont’d)

Logical shift

∗ Bit shifted out goes into the carry flag

» Zero bit is shifted in at the other end

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SLIDE 65

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 65

Shift Instructions (cont’d)

∗ count is an immediate value

shl AX,5

∗ Specification of count greater than 31 is not allowed

» If a greater value is specified, only the least significant 5 bits are used

∗ CL version is useful if shift count is known at run time

» Ex: when the shift count value is passed as a parameter in a procedure call » Only the CL register can be used Shift count value should be loaded into CL mov CL,5 shl AX,CL

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SLIDE 66

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 66

Shift Instructions (cont’d)

Arithmetic shift

∗ Two versions as in logical shift

sal/sar destination,count sal/sar destination,CL

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SLIDE 67

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 67

Double Shift Instructions

  • Double shift instructions work on either 32- or 64-

bit operands

  • Format

∗ Takes three operands shld dest,src,count ; left shift shrd dest,src,count ; right shift ∗ dest can be in memory or register ∗ src must be a register ∗ count can be an immediate value or in CL as in other shift instructions

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SLIDE 68

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 68

Double Shift Instructions (cont’d)

∗ src is not modified by doubleshift instruction ∗ Only dest is modified ∗ Shifted out bit goes into the carry flag

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SLIDE 69

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 69

Rotate Instructions

∗ Two types of ROTATE instructions ∗ Rotate without carry

» rol (ROtate Left) » ror (ROtate Right)

∗ Rotate with carry

» rcl (Rotate through Carry Left) » rcr (Rotate through Carry Right)

∗ Format of ROTATE instructions is similar to the SHIFT instructions

» Supports two versions – Immediate count value – Count value in CL register

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SLIDE 70

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 70

Rotate Instructions (cont’d)

∗ Bit shifted out goes into the carry flag as in SHIFT instructions

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SLIDE 71

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 71

Rotate Instructions (cont’d)

∗ Bit shifted out goes into the carry flag as in SHIFT instructions

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SLIDE 72

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 72

Rotate Instructions (cont’d)

  • Example: Shifting 64-bit numbers

∗ Multiplies a 64-bit value in EDX:EAX by 16

» Rotate version mov CX,4 shift_left: shl EAX,1 rcl EDX,1 loop shift_left » Doubleshift version shld EDX,EAX,4 shl EAX,4

  • Division can be done in a similar a way
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SLIDE 73

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 73

Defining Constants

  • Assembler provides two directives:

» EQU directive – No reassignment – String constants can be defined » = directive – Can be reassigned – No string constants

  • Defining constants has two advantages:

∗ Improves program readability ∗ Helps in software maintenance » Multiple occurrences can be changed from a single place

  • Convention

» We use all upper-case letters for names of constants

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SLIDE 74

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 74

Defining Constants (cont’d)

The EQU directive

  • Syntax:

name EQU expression

∗ Assigns the result of expression to name ∗ The expression is evaluated at assembly time

Similar to #define in C

Examples

NUM_OF_ROWS EQU 50 NUM_OF_COLS EQU 10 ARRAY_SIZE EQU NUM_OF_ROWS * NUM_OF_COLS

∗ Can also be used to define string constants

JUMP EQU jmp

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SLIDE 75

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 75

Defining Constants (cont’d)

The = directive

  • Syntax:

name = expression

∗ Similar to EQU directive ∗ Two key differences:

» Redefinition is allowed count = 0 . . . count = 99 is valid » Cannot be used to define string constants or to redefine keywords or instruction mnemonics

Example: JUMP = jmp is not allowed

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SLIDE 76

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 76

Macros

  • Macros can be defined with MACRO and ENDM
  • Format

macro_name MACRO[parameter1, parameter2,...]

macro body ENDM

  • A macro can be invoked using

macro_name [argument1, argument2, …]

Example: Definition Invocation

multAX_by_16 MACRO ... sal AX,4 mov AX,27 ENDM multAX_by_16 ...

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SLIDE 77

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 77

Macros (cont’d)

  • Macros can be defined with parameters

» More flexible » More useful

  • Example

mult_by_16 MACRO operand sal operand,4 ENDM ∗ To multiply a byte in DL register mult_by_16 DL ∗ To multiply a memory variable count mult_by_16 count

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SLIDE 78

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 78

Macros (cont’d)

Example: To exchange two memory words

∗ Memory-to-memory transfer Wmxchg MACRO operand1, operand2 xchg AX,operand1 xchg AX,operand2 xchg AX,operand1 ENDM

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SLIDE 79

2003

To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer, 2003.

 S. Dandamudi Chapter 9: Page 79

Illustrative Examples

  • Five examples in this chapter

∗ Conversion of ASCII to binary representation (BINCHAR.ASM) ∗ Conversion of ASCII to hexadecimal by character manipulation (HEX1CHAR.ASM) ∗ Conversion of ASCII to hexadecimal using the XLAT instruction (HEX2CHAR.ASM) ∗ Conversion of lowercase letters to uppercase by character manipulation (TOUPPER.ASM) ∗ Sum of individual digits of a number (ADDIGITS.ASM)

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